295 lines
7.4 KiB
C++
295 lines
7.4 KiB
C++
#include <pro.h>
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#include <nalt.hpp>
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#include "arm_debmod.h"
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#ifdef ENABLE_LOWCNDS
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inline bool has_armv5(void) { return true; }
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static arm_debmod_t *ssmod; // pointer to the current debugger module
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#endif
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#include "arm_regs.hpp"
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#include "deb_arm.hpp"
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//--------------------------------------------------------------------------
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arm_debmod_t::arm_debmod_t()
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{
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static const uchar bpt[] = ARM_BPT_CODE;
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bpt_code.append(bpt, sizeof(bpt));
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sp_idx = R_SP;
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pc_idx = R_PC;
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lr_idx = R_LR;
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sr_idx = R_PSR;
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nregs = qnumber(arm_registers);
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is_xscale = false;
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for ( size_t i = 0; i < 2; i++ )
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{
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databpts[i] = BADADDR;
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codebpts[i] = BADADDR;
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dbptypes[i] = -1;
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cbptypes[i] = -1;
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}
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dbcon = 0;
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set_platform("linux");
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}
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//--------------------------------------------------------------------------
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int idaapi arm_debmod_t::dbg_is_ok_bpt(bpttype_t type, ea_t /*ea*/, int len)
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{
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if ( type == BPT_SOFT )
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return BPT_OK;
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if ( !is_xscale )
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return BPT_BAD_TYPE; // hardware bpts are supported only for xScale
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// For some reason hardware instruction breakpoints do not work
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if ( type == BPT_EXEC )
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return BPT_BAD_TYPE;
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if ( len > 4 )
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return BPT_BAD_LEN;
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bool ok = databpts[0] == BADADDR || databpts[1] == BADADDR;
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return ok ? BPT_OK : BPT_TOO_MANY;
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}
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//--------------------------------------------------------------------------
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bool arm_debmod_t::add_hwbpt(bpttype_t type, ea_t ea, int len)
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{
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// msg("add_hwbpt %d %a %d\n", type, ea, len);
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if ( !is_xscale || len > 4 )
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return false;
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if ( !init_hwbpt_support() )
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return false;
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if ( type == BPT_EXEC )
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{
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if ( codebpts[0] != BADADDR && codebpts[1] != BADADDR )
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return false;
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int slot = codebpts[0] != BADADDR;
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codebpts[slot] = ea;
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cbptypes[slot] = type;
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}
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else
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{
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if ( databpts[0] != BADADDR && databpts[1] != BADADDR )
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return false;
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int slot = databpts[0] != BADADDR;
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int bits;
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switch ( type )
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{
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case BPT_WRITE:
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bits = 1; // store only
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break;
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case BPT_RDWR:
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bits = 2; // load/store
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break;
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// BPT_READ: // load only
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// bits = 3;
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// break;
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default:
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return false;
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}
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databpts[slot] = ea;
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dbptypes[slot] = type;
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dbcon |= bits << (slot*2);
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}
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return enable_hwbpts();
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}
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//--------------------------------------------------------------------------
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bool arm_debmod_t::del_hwbpt(ea_t ea, bpttype_t type)
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{
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// msg("del_hwbpt %a\n", ea);
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if ( databpts[0] == ea && dbptypes[0] == type )
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{
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databpts[0] = BADADDR;
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dbcon &= ~3;
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}
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else if ( databpts[1] == ea && dbptypes[1] == type )
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{
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databpts[1] = BADADDR;
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dbcon &= ~(3<<2);
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}
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else if ( codebpts[0] == ea && cbptypes[0] == type )
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{
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codebpts[0] = BADADDR;
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}
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else if ( codebpts[1] == ea && cbptypes[1] == type )
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{
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codebpts[1] = BADADDR;
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}
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else
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{
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return false;
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}
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return enable_hwbpts();
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}
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//--------------------------------------------------------------------------
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void arm_debmod_t::cleanup_hwbpts()
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{
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databpts[0] = BADADDR;
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databpts[1] = BADADDR;
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codebpts[0] = BADADDR;
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codebpts[1] = BADADDR;
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dbcon = 0;
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// disable all bpts
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if ( is_xscale )
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disable_hwbpts();
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}
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//--------------------------------------------------------------------------
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int arm_debmod_t::finalize_appcall_stack(
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call_context_t &ctx,
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regval_map_t ®s,
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bytevec_t &/*stk*/)
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{
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regs[lr_idx].ival = ctx.ctrl_ea;
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// return addrsize as the adjustment factor to add to sp
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// we do not need the return address, that's why we ignore the first 4
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// bytes of the prepared stack image
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return debapp_attrs.addrsize;
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}
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//--------------------------------------------------------------------------
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int arm_debmod_t::get_regidx(const char *regname, int *clsmask)
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{
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return arm_get_regidx(clsmask, regname);
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}
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#ifdef ENABLE_LOWCNDS
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//--------------------------------------------------------------------------
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static const regval_t &idaapi arm_getreg(const char *name, const regval_t *regvals)
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{
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int idx = ssmod->get_regidx(name, NULL);
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QASSERT(30182, idx >= 0 && idx < ssmod->nregs);
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return regvals[idx];
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}
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//--------------------------------------------------------------------------
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static uint32 idaapi arm_get_long(ea_t ea)
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{
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uint32 v = -1;
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ssmod->dbg_read_memory(ea, &v, sizeof(v), NULL);
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return v;
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}
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//--------------------------------------------------------------------------
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static uint16 idaapi arm_get_word(ea_t ea)
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{
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uint16 v = -1;
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ssmod->dbg_read_memory(ea, &v, sizeof(v), NULL);
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return v;
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}
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//--------------------------------------------------------------------------
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static uint8 idaapi arm_get_byte(ea_t ea)
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{
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uint8 v = -1;
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ssmod->dbg_read_memory(ea, &v, sizeof(v), NULL);
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return v;
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}
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//----------------------------------------------------------------------
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// stripped down version of get_dtype_size()
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static size_t idaapi arm_get_dtype_size(op_dtype_t dtype)
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{
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switch ( dtype )
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{
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case dt_byte: return 1; // 8 bit
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case dt_word:
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case dt_half: return 2; // 16 bit
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case dt_dword:
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case dt_float: return 4; // 4 byte
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case dt_qword:
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case dt_double: return 8; // 8 byte
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default: return 0;
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}
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}
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//--------------------------------------------------------------------------
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// since arm does not have a single step facility, we have to emulate it
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// with a temporary breakpoint.
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drc_t arm_debmod_t::dbg_perform_single_step(debug_event_t *dev, const insn_t &insn)
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{
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// read register values
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regvals_t values;
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values.resize(nregs);
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drc_t drc = dbg_read_registers(dev->tid, ARM_RC_GENERAL, values.begin(), NULL);
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if ( drc <= DRC_NONE )
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return drc;
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static const opinfo_helpers_t oh =
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{
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arm_getreg,
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arm_get_byte,
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arm_get_word,
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arm_get_long,
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arm_get_dtype_size,
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NULL, // has_insn_cf_chg not needed
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};
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// calculate the address of the next executed instruction
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lock_begin();
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ssmod = this;
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ea_t next = calc_next_exec_insn(insn, values.begin(), oh, false); // TODO pass is_mprofile parameter
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ssmod = NULL;
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lock_end();
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// BADADDR means that the execution flow is linear
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if ( next == BADADDR )
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{
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next = insn.ea + insn.size;
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if ( (values[sr_idx].ival & BIT5) != 0 ) // thumb?
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next |= 1;
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}
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// safety check: self jumping instruction cannot be single stepped
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if ( (next & ~1) == insn.ea )
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return DRC_FAILED;
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// add a breakpoint there
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update_bpt_info_t ubi;
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ubi.ea = next;
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ubi.type = BPT_SOFT;
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ubi.code = 0;
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int nbpts;
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drc = dbg_update_bpts(&nbpts, &ubi, 1, 0, NULL);
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if ( drc != DRC_OK || nbpts == 0 )
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return drc != DRC_OK ? drc : DRC_FAILED;
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drc = resume_app_and_get_event(dev);
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// clean up: delete the temporary breakpoint
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ubi.ea &= ~1; // del_bpt requires an even address
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drc_t drc2 = dbg_update_bpts(&nbpts, &ubi, 0, 1, NULL);
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if ( drc2 != DRC_OK || nbpts == 0 )
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{
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msg("%a: failed to remove single step bpt?!\n", ubi.ea);
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drc = drc2 != DRC_OK ? drc2 : DRC_FAILED;
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}
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// the caller expects to see STEP after us:
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if ( drc == DRC_OK )
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dev->set_eid(STEP);
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return drc;
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}
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#endif // ENABLE_LOWCNDS
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//--------------------------------------------------------------------------
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void arm_debmod_t::adjust_swbpt(ea_t *p_ea, int *p_len)
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{
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ea_t &ea = *p_ea;
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if ( (ea & 1) != 0 ) // T bit is set, use a thumb breakpoint
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{
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ea--;
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*p_len = 2;
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}
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}
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