304 lines
5.4 KiB
C++
304 lines
5.4 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-2021 Hex-Rays
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* ALL RIGHTS RESERVED.
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*
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*/
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#ifndef __INSTRS_HPP
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#define __INSTRS_HPP
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extern const instruc_t Instructions[];
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enum nameNum ENUM_SIZE(uint16)
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{
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I5_null = 0, // Unknown Operation
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//
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// Intel 8080-8085 instructions
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//
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I5_aci,
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I5_adc, Z80_adc = I5_adc,
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I5_add, Z80_add = I5_add,
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I5_adi,
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I5_ana,
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I5_ani,
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I5_call,
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I5_cnz,
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I5_cz,
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I5_cnc,
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I5_cc,
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I5_cpo,
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I5_cpe,
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I5_cp,
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I5_cm,
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I5_cmc,
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I5_cmp,
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I5_cpi,
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I5_cma,
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I5_daa,
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I5_dad,
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I5_dcr,
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I5_dcx,
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I5_di, Z80_di = I5_di,
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I5_ei, Z80_ei = I5_ei,
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I5_halt,
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I5_in, Z80_in = I5_in,
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I5_inr,
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I5_inx,
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I5_jmp,
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I5_jnz,
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I5_jz,
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I5_jnc,
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I5_jc,
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I5_jpo,
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I5_jpe,
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I5_jp,
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I5_jm,
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I5_lda,
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I5_ldax,
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I5_lhld,
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I5_lxi,
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I5_mov,
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I5_mvi,
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I5_nop,
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I5_ora,
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I5_ori,
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I5_out, Z80_out = I5_out,
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I5_pchl,
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I5_pop, Z80_pop = I5_pop,
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I5_push, Z80_push = I5_push,
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I5_ret,
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I5_rnz,
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I5_rz,
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I5_rnc,
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I5_rc,
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I5_rpo,
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I5_rpe,
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I5_rp,
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I5_rm,
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I5_ral,
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I5_rlc,
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I5_rar,
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I5_rrc,
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I5_rst,
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I5_sbb,
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I5_sbi,
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I5_stc,
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I5_sphl,
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I5_sta,
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I5_stax,
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I5_shld,
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I5_sui,
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I5_sub, Z80_sub = I5_sub,
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I5_xra,
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I5_xri,
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I5_xchg,
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I5_xthl,
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I5_rim,
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I5_sim,
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//
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// Z80 extensions
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//
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Z80_and,
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Z80_bit,
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Z80_call,
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Z80_ccf,
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Z80_cp,
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Z80_cpd,
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Z80_cpdr,
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Z80_cpi,
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Z80_cpir,
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Z80_cpl,
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Z80_dec,
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Z80_djnz,
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Z80_ex,
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Z80_exx,
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Z80_halt,
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Z80_im,
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Z80_inc,
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Z80_ind,
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Z80_indr,
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Z80_ini,
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Z80_inir,
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Z80_jp,
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Z80_jr,
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Z80_ld,
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Z80_ldd,
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Z80_lddr,
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Z80_ldi,
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Z80_ldir,
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Z80_neg,
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Z80_or,
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Z80_otdr,
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Z80_otir,
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Z80_outd,
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Z80_outi,
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Z80_res,
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Z80_ret,
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Z80_reti,
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Z80_retn,
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Z80_rl,
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Z80_rla,
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Z80_rlc,
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Z80_rlca,
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Z80_rld,
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Z80_rr,
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Z80_rra,
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Z80_rrc,
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Z80_rrca,
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Z80_rrd,
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Z80_scf,
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Z80_sbc,
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Z80_set,
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Z80_sla,
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Z80_sra,
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Z80_srl,
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Z80_xor,
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Z80_inp, // undocumented
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Z80_outp, // undocumented
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Z80_srr, // undocumented
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//
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// HD64180 extensions
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//
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HD_in0, Z80_in0 = HD_in0,
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HD_mlt, Z80_mlt = HD_mlt,
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HD_otim, Z80_otim = HD_otim,
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HD_otimr, Z80_otimr = HD_otimr,
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HD_otdm, Z80_otdm = HD_otdm,
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HD_otdmr, Z80_otdmr = HD_otdmr,
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HD_out0, Z80_out0 = HD_out0,
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HD_slp, Z80_slp = HD_slp,
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HD_tst, Z80_tst = HD_tst,
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HD_tstio, Z80_tstio = HD_tstio,
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//
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// A80 special instructions
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//
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A80_lbcd,
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A80_lded,
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A80_lspd,
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A80_lixd,
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A80_liyd,
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A80_sbcd,
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A80_sded,
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A80_sspd,
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A80_sixd,
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A80_siyd,
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A80_xtix,
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A80_xtiy,
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A80_spix,
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A80_spiy,
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A80_pcix,
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A80_pciy,
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A80_mvra,
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A80_mvia,
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A80_mvar,
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A80_mvai,
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A80_addix,
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A80_addiy,
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A80_addc,
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A80_addcix,
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A80_addciy,
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A80_subc,
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A80_subcix,
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A80_subciy,
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A80_jrc,
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A80_jrnc,
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A80_jrz,
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A80_jrnz,
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A80_cmpi,
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A80_cmpd,
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A80_im0,
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A80_im1,
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A80_im2,
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A80_otd,
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A80_oti,
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// Intel 8085 undocumented instructions
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// (info from http://oak.oakland.edu/pub/cpm/maclib/i8085.lib)
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I5_dsub, // (HL) <- (HL)-(BC), affects all flags
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I5_arhl, // SHIFT HL RIGHT ONE BIT, (H7 IS DUPLICATED, L0 IS SHIFTED INTO CY)
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I5_rdel, // ROTATE DE LEFT ONE BIT THRU CY, (E0 RECEIVES CY, CY RECEIVES D7)
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I5_ldhi, // (DE) <- (HL)+arg
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I5_ldsi, // (DE) <- (SP)+arg
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I5_shlx, // ((DE)) <- (HL)
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I5_lhlx, // (HL) <- ((DE))
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I5_rstv, // RESTART 40H ON V (OVERFLOW)
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I5_jx5, // JUMP IF X5 SET
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I5_jnx5, // JUMP IF NOT X5 SET
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// Z380 instructions
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Z80_cplw, // Complement HL register
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Z80_swap, // Swap upper register word with lower register word
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Z80_inw, // Input word
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Z80_outw, // Output word
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Z80_ldw, // Load word
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Z80_addw, // Add word
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Z80_subw, // Subtract word
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Z80_adcw, // Add with carry word
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Z80_sbcw, // Subtract with borrow word
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Z80_andw, // AND logical word
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Z80_xorw, // XOR logical word
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Z80_orw, // OR logical word
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Z80_cpw, // Compare word
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Z80_ddir, // Decoder directive
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Z80_calr, // Call relative
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Z80_ldctl, // Load control register
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Z80_mtest, // Mode test
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Z80_exxx, // Exchange Index Register with Alternate Bank
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Z80_exxy, // Exchange Index Register with Alternate Bank
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Z80_exall, // Exchange all registers with Alternate Bank
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Z80_setc, // Set control bit
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Z80_resc, // Reset control bit
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Z80_rlcw, // Rotate Left Circular Word
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Z80_rrcw, // Rotate Right Circular Word
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Z80_rlw, // Rotate Left Word
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Z80_rrw, // Rotate Right Word
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Z80_slaw, // Shift Left Arithmetic Word
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Z80_sraw, // Shift Right Arithmetic Word
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Z80_srlw, // Shift Right Logical Word
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Z80_multw, // Multiply Word
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Z80_multuw, // Multiply Word Unsigned
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Z80_divuw, // Divide unsigned
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Z80_outaw, // Output word direct to port address
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Z80_inaw, // Input word direct from port address
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Z80_outa, // Output byte direct to port address
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Z80_ina, // Input byte direct from port address
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Z80_negw, // Negate word
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Z80_exts, // Extend byte sign
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Z80_extsw, // Extend word sign
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Z80_btest, // Bank test
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Z80_ldiw, // Load and increment (word)
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Z80_ldirw, // Load and increment, repeat (word)
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Z80_lddw, // Load and decrement (word)
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Z80_lddrw, // Load and decrement, repeat (word)
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Z80_iniw, // Input and increment (word)
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Z80_inirw, // Input and increment, repeat (word)
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Z80_indw, // Input and decrement (word)
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Z80_indrw, // Input and decrement, repeat (word)
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Z80_outiw, // Output and increment (word)
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Z80_otirw, // Output and increment, repeat (word)
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Z80_outdw, // Output and decrement (word)
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Z80_otdrw, // Output and decrement, repeat (word)
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// Gameboy instructions
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GB_ldh,
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GB_stop,
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I5_last,
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};
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#endif
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