593 lines
16 KiB
C++
593 lines
16 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-99 by Ilfak Guilfanov.
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* ALL RIGHTS RESERVED.
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* E-mail: ig@datarescue.com
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*
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*
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*/
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#include <ctype.h>
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#include "tms320c55.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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#include <ieee.h>
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int data_id;
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//--------------------------------------------------------------------------
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static const char *const register_names[] =
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{
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"AC0", // Accumulator
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"AC1", // Accumulator
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"AC2", // Accumulator
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"AC3", // Accumulator
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"T0", // Temporary register
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"T1", // Temporary register
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"T2", // Temporary register
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"T3", // Temporary register
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"AR0", // Auxiliary register
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"AR1", // Auxiliary register
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"AR2", // Auxiliary register
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"AR3", // Auxiliary register
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"AR4", // Auxiliary register
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"AR5", // Auxiliary register
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"AR6", // Auxiliary register
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"AR7", // Auxiliary register
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"AC0L", // Accumulator
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"AC0H", // Accumulator
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"AC0G", // Accumulator
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"AC1L", // Accumulator
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"AC1H", // Accumulator
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"AC1G", // Accumulator
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"AC2L", // Accumulator
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"AC2H", // Accumulator
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"AC2G", // Accumulator
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"AC3L", // Accumulator
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"AC3H", // Accumulator
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"AC3G", // Accumulator
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"BK03", // Circular buffer size register
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"BK47", // Circular buffer size register
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"BKC", // Circular buffer size register
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"BRC0", // Block-repeat counter
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"BRC1", // Block-repeat counter
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"BRS1", // BRC1 save register
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"BSA01", // Circulat buffer start address register
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"BSA23", // Circulat buffer start address register
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"BSA45", // Circulat buffer start address register
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"BSA67", // Circulat buffer start address register
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"BSAC", // Circulat buffer start address register
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"CDP", // Coefficient data pointer (low part of XCDP)
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"CDPH", // High part of XCDP
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"CFCT", // Control-flow contect register
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"CSR", // Computed single-repeat register
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"DBIER0", // Debug interrupt enable register
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"DBIER1", // Debug interrupt enable register
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// DP Data page register (low part of XDP)
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// DPH High part of XDP
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"IER0", // Interrupt enable register
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"IER1", // Interrupt enable register
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"IFR0", // Interrupt flag register
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"IFR1", // Interrupt flag register
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"IVPD",
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"IVPH",
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"PC", // Program counter
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// PDP Peripheral data page register
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"PMST",
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"REA0", // Block-repeat end address register
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"REA0L", // Block-repeat end address register
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"REA0H", // Block-repeat end address register
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"REA1", // Block-repeat end address register
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"REA1L", // Block-repeat end address register
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"REA1H", // Block-repeat end address register
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"RETA", // Return address register
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"RPTC", // Single-repeat counter
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"RSA0", // Block-repeat start address register
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"RSA0L", // Block-repeat start address register
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"RSA0H", // Block-repeat start address register
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"RSA1", // Block-repeat start address register
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"RSA1L", // Block-repeat start address register
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"RSA1H", // Block-repeat start address register
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"SP", // Data stack pointer
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"SPH", // High part of XSP and XSSP
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"SSP", // System stack pointer
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"ST0", // Status register
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"ST1", // Status register
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"ST0_55", // Status register
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"ST1_55", // Status register
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"ST2_55", // Status register
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"ST3_55", // Status register
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"TRN0", // Transition register
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"TRN1", // Transition register
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"XAR0", // Extended auxiliary register
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"XAR1", // Extended auxiliary register
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"XAR2", // Extended auxiliary register
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"XAR3", // Extended auxiliary register
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"XAR4", // Extended auxiliary register
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"XAR5", // Extended auxiliary register
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"XAR6", // Extended auxiliary register
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"XAR7", // Extended auxiliary register
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"XCDP", // Extended coefficient data pointer
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"XDP", // Extended data page register
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"XPC", // Extended program counter
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"XSP", // Extended data stack pointer
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"XSSP", // Extended system stack pointer
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"MDP", // Main Data page pointer (direct memory access / indirect from CDP)
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"MDP05", // Main Data page pointer (indirect AR[0-5])
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"MDP67", // Main Data page pointer (indirect AR[6-7])
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// flags
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"ACOV2",
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"ACOV3",
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"TC1",
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"TC2",
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"CARRY",
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"ACOV0",
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"ACOV1",
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"BRAF",
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"XF",
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"HM",
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"INTM",
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"M40",
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"SATD",
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"SXMD",
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"C16",
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"FRCT",
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"C54CM",
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"DBGM",
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"EALLOW",
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"RDM",
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"CDPLC",
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"AR7LC",
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"AR6LC",
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"AR5LC",
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"AR4LC",
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"AR3LC",
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"AR2LC",
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"AR1LC",
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"AR0LC",
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"CAFRZ",
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"CAEN",
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"CACLR",
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"HINT",
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"CBERR",
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"MPNMC",
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"SATA",
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"CLKOFF",
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"SMUL",
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"SST",
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"BORROW",
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// segment registers
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"ARMS", // AR indirect operands available
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"CPL", // Compiler mode
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"DP", // Data page pointer
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"DPH", // Data page
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"PDP", // Peripheral data page register
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"cs","ds" // virtual registers for code and data segments
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};
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//--------------------------------------------------------------------------
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static const uchar retcode_0[] = { 0x48, 0x04 }; // ret
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static const uchar retcode_1[] = { 0x48, 0x05 }; // reti
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_0), retcode_0 },
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{ sizeof(retcode_1), retcode_1 },
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{ 0, NULL }
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};
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//-----------------------------------------------------------------------
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// TMS320C55 ASM
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//-----------------------------------------------------------------------
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static const asm_t masm55 =
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{
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AS_COLON|AS_N2CHR|ASH_HEXF0|ASD_DECF0|ASO_OCTF5|ASB_BINF0|AS_ONEDUP,
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0,
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"MASM55",
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0,
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NULL, // header lines
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NULL, // org
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".end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".pstring", // ascii string directive
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"MY_BYTE", // byte directive
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".word", // word directive
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".long", // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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".float", // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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".space 8*%s",// uninited arrays
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".asg", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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".global", // "public" name keyword
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NULL, // "weak" name keyword
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".ref", // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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".align", // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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AS2_STRINV // invert string byte order
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};
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static const asm_t *const asms[] = { &masm55, NULL };
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//--------------------------------------------------------------------------
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const char *tms320c55_t::find_sym(ea_t address)
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{
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const ioport_t *port = find_ioport(ioh.ports, address);
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return port ? port->name.c_str() : NULL;
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}
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//--------------------------------------------------------------------------
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static int idaapi choose_device(int, form_actions_t &fa)
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{
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tms320c55_t &pm = *(tms320c55_t *)fa.get_ud();
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if ( choose_ioport_device(&pm.ioh.device, cfgname) )
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pm.ioh.set_device_name(pm.ioh.device.c_str(), IORESP_ALL);
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return 0;
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}
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//--------------------------------------------------------------------------
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const char *tms320c55_t::set_idp_options(
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const char *keyword,
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int value_type,
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const void *value,
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bool idb_loaded)
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{
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if ( keyword == NULL )
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{
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static const char form[] =
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"HELP\n"
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"TMS320C55 specific options\n"
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"\n"
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" Use I/O definitions \n"
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"\n"
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" If this option is on, IDA will use I/O definitions\n"
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" from the configuration file into a macro instruction.\n"
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"\n"
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" Detect memory mapped registers \n"
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"\n"
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" If this option is on, IDA will replace addresses\n"
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" by an equivalent memory mapped register.\n"
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"\n"
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"ENDHELP\n"
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"TMS320C55 specific options\n"
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"%*\n"
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" <Use ~I~/O definitions:C>\n"
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" <Detect memory mapped ~r~egisters:C>>\n"
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"\n"
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" <~C~hoose device name:B:0::>\n"
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"\n"
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"\n";
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CASSERT(sizeof(idpflags) == sizeof(ushort));
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ask_form(form, this, &idpflags, choose_device);
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}
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else
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{
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if ( value_type != IDPOPT_BIT )
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return IDPOPT_BADTYPE;
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if ( strcmp(keyword, "TMS320C55_IO") == 0 )
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{
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setflag(idpflags, TMS320C55_IO, *(int*)value != 0);
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}
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else if ( strcmp(keyword, "TMS320C55_MMR") == 0 )
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{
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setflag(idpflags, TMS320C55_MMR, *(int*)value != 0);
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}
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else
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{
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return IDPOPT_BADKEY;
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}
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}
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if ( idb_loaded )
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save_idpflags();
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return IDPOPT_OK;
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}
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//--------------------------------------------------------------------------
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static const proctype_t ptypes[] =
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{
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TMS320C55
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};
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//--------------------------------------------------------------------------
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void tms320c55_t::load_from_idb()
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{
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ptype = ptypes[ph.get_proc_index()];
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ioh.restore_device();
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if ( ioh.device.empty() )
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{
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read_ioports(&ioh.ports, &ioh.device, cfgname);
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helper.supset(-1, ioh.device.c_str());
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}
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idpflags = (ushort)helper.altval(-1);
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}
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(tms320c55_t));
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return 0;
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}
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//--------------------------------------------------------------------------
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ssize_t idaapi tms320c55_t::on_event(ssize_t msgid, va_list va)
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{
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int code = 0;
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switch ( msgid )
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{
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case processor_t::ev_init:
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helper.create(PROCMOD_NODE_NAME);
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inf_set_be(true); // MSB first
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile: // new file loaded
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{
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read_ioports(&ioh.ports, &ioh.device, cfgname);
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helper.supset(-1, ioh.device.c_str());
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save_idpflags();
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{
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set_default_sreg_value(NULL, ARMS, 0);
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set_default_sreg_value(NULL, CPL, 1);
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for ( int i = DP; i <= rVds; i++ )
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set_default_sreg_value(NULL, i, 0);
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}
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static const char *const informations =
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"AUTOHIDE REGISTRY\n"
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"Default values of flags and registers:\n"
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"\n"
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"ARMS bit = 0 (DSP mode operands).\n"
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"CPL bit = 1 (SP direct addressing mode).\n"
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"DP register = 0 (Data Page register)\n"
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"DPH register = 0 (High part of EXTENDED Data Page Register)\n"
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"PDP register = 0 (Peripheral Data Page register)\n"
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"\n"
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"You can change the register values by pressing Alt-G\n"
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"(Edit, Segments, Change segment register value)\n";
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info(informations);
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break;
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}
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case processor_t::ev_oldfile: // old file loaded
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ioh.upgrade_device_index();
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// fall through
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case processor_t::ev_ending_undo:
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load_from_idb();
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break;
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case processor_t::ev_newprc: // new processor type
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{
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ptype = ptypes[va_arg(va, int)];
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// bool keep_cfg = va_argi(va, bool);
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switch ( ptype )
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{
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case TMS320C55:
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break;
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default:
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error("interr: setprc");
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}
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}
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break;
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case processor_t::ev_newasm: // new assembler type
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break;
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case processor_t::ev_creating_segm: // new segment
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break;
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case processor_t::ev_get_stkvar_scale_factor:
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return 2;
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case processor_t::ev_out_mnem:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_mnem(*ctx);
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return 1;
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}
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_segend:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segend(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_assumes:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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assumes(*ctx);
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return 1;
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}
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case processor_t::ev_ana_insn:
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{
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insn_t *out = va_arg(va, insn_t *);
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return ana(out);
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}
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case processor_t::ev_emu_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return emu(*insn) ? 1 : -1;
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}
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case processor_t::ev_out_insn:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_insn(*ctx);
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return 1;
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}
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case processor_t::ev_out_operand:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const op_t *op = va_arg(va, const op_t *);
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return out_opnd(*ctx, *op) ? 1 : -1;
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}
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case processor_t::ev_can_have_type:
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{
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const op_t *op = va_arg(va, const op_t *);
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return can_have_type(*op) ? 1 : -1;
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}
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case processor_t::ev_create_func_frame:
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{
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func_t *pfn = va_arg(va, func_t *);
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create_func_frame(pfn);
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return 1;
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}
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case processor_t::ev_gen_stkvar_def:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const member_t *mptr = va_arg(va, const member_t *);
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sval_t v = va_arg(va, sval_t);
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gen_stkvar_def(*ctx, mptr, v);
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return 1;
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}
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case processor_t::ev_set_idp_options:
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{
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const char *keyword = va_arg(va, const char *);
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int value_type = va_arg(va, int);
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const char *value = va_arg(va, const char *);
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const char **errmsg = va_arg(va, const char **);
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bool idb_loaded = va_argi(va, bool);
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const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
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if ( ret == IDPOPT_OK )
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return 1;
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if ( errmsg != NULL )
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*errmsg = ret;
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return -1;
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}
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case processor_t::ev_is_align_insn:
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{
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ea_t ea = va_arg(va, ea_t);
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return is_align_insn(ea);
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}
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default:
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break;
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}
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return code;
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}
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//-----------------------------------------------------------------------
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#define FAMILY "TMS320C55x Series:"
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static const char *const shnames[] =
|
|
{ "TMS32055",
|
|
NULL
|
|
};
|
|
static const char *const lnames[] =
|
|
{
|
|
FAMILY"Texas Instruments TMS320C55",
|
|
NULL
|
|
};
|
|
|
|
//-----------------------------------------------------------------------
|
|
// Processor Definition
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|
//-----------------------------------------------------------------------
|
|
processor_t LPH =
|
|
{
|
|
IDP_INTERFACE_VERSION, // version
|
|
PLFM_TMS320C55, // id
|
|
// flag
|
|
PRN_HEX
|
|
| PR_SEGS
|
|
| PR_SGROTHER
|
|
| PR_SCALE_STKVARS,
|
|
// flag2
|
|
PR2_IDP_OPTS, // the module has processor-specific configuration options
|
|
8, // 8 bits in a byte for code segments
|
|
8, // 8 bits in a byte for other segments
|
|
|
|
shnames,
|
|
lnames,
|
|
|
|
asms,
|
|
|
|
notify,
|
|
|
|
register_names, // Register names
|
|
qnumber(register_names), // Number of registers
|
|
|
|
ARMS, // first
|
|
rVds, // last
|
|
1, // size of a segment register
|
|
rVcs, rVds,
|
|
|
|
NULL, // No known code start sequences
|
|
retcodes,
|
|
|
|
TMS320C55_null,
|
|
TMS320C55_last,
|
|
Instructions, // instruc
|
|
0, // int tbyte_size; -- doesn't exist
|
|
{ 0,7,15,19 }, // char real_width[4];
|
|
// number of symbols after decimal point
|
|
// 2byte float (0-does not exist)
|
|
// normal float
|
|
// normal double
|
|
// long double
|
|
TMS320C55_ret, // Icode of return instruction. It is ok to give any of possible return instructions
|
|
};
|