363 lines
28 KiB
C++
363 lines
28 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-99 by Ilfak Guilfanov.
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* ALL RIGHTS RESERVED.
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* E-mail: ig@datarescue.com
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*
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*
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*/
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#include "tms320c55.hpp"
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const instruc_t Instructions[] =
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{
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{ "", 0 }, // Unknown Operation
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// ARITHMETICAL OPERATIONS
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{ "abdst", CF_CHG1|CF_CHG2|CF_CHG3|CF_CHG4 }, // Absolute Distance
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{ "abs", CF_CHG1 }, // Absolute Value
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{ "abs", CF_USE1|CF_CHG2 }, // Absolute Value
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{ "add", CF_CHG1 }, // Addition
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{ "add", CF_USE1|CF_CHG2 }, // Addition
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{ "add", CF_USE1|CF_USE2|CF_CHG3 }, // Addition
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{ "add", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Addition
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{ "addv", CF_CHG1 }, // Addition
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{ "addv", CF_USE1|CF_CHG2 }, // Addition
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{ "addrv", CF_CHG1 }, // Addition and Round
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{ "addrv", CF_USE1|CF_CHG2 }, // Addition and Round
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{ "maxdiff", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Compare and Select Maximum
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{ "dmaxdiff", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4|CF_CHG5 }, // Compare and Select 40-bit Maximum
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{ "mindiff", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Compare and Select Minimum
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{ "dmindiff", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4|CF_CHG5 }, // Compare and Select 40-bit Minimum
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{ "addsubcc", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Conditional Add or Subtract
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{ "addsubcc", CF_USE1|CF_USE2|CF_USE3|CF_USE4|CF_CHG5 }, // Conditional Add or Subtract
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{ "addsub2cc", CF_USE1|CF_USE2|CF_USE3|CF_USE4|CF_USE5|CF_CHG6 }, // Conditional Add or Subtract
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{ "sftcc", CF_CHG1|CF_CHG2 }, // Conditional Shift
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{ "subc", CF_USE1|CF_CHG2 }, // Conditional Subtract
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{ "subc", CF_USE1|CF_USE2|CF_CHG3 }, // Conditional Subtract
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{ "addsub", CF_USE1|CF_USE2|CF_CHG3 }, // Paralleled Add - Subtract
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{ "subadd", CF_USE1|CF_USE2|CF_CHG3 }, // Parallel Subtract - Add
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// "add","sub"
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{ "mpy\0mpy", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply
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{ "mpyr\0mpyr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply, and Round
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{ "mpy40\0mpy40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply, on 40 bits
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{ "mpyr40\0mpyr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply, and Round on 40 bits
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{ "mac\0mpy", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Accumulate
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{ "macr\0mpyr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Accumulate, and Round
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{ "mac40\0mpy40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Accumulate, on 40 bits
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{ "macr40\0mpyr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Accumulate, and Round on 40 bits
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{ "mas\0mpy", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Subtract
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{ "masr\0mpyr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Subtract, and Round
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{ "mas40\0mpy40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Subtract, on 40 bits
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{ "masr40\0mpyr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Subtract, and Round on 40 bits
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{ "amar\0mpy", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply
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{ "amar\0mpyr", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply, and Round
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{ "amar\0mpy40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply, on 40 bits
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{ "amar\0mpyr40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply, and Round on 40 bits
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{ "mac\0mac", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Accumulate
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{ "macr\0macr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Accumulate, and Round
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{ "mac40\0mac40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Accumulate, on 40 bits
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{ "macr40\0macr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Accumulate, and Round on 40 bits
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{ "mas\0mac", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply and Subtract - Multiply and Accumulate
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{ "masr\0macr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply and Subtract - Multiply and Accumulate, and Round
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{ "mas40\0mac40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply and Subtract - Multiply and Accumulate, on 40 bits
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{ "masr40\0macr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply and Subtract - Multiply and Accumulate, and Round on 40 bits
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{ "amar\0mac", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Accumulate
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{ "amar\0macr", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Accumulate, and Round
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{ "amar\0mac40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Accumulate, on 40 bits
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{ "amar\0macr40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Accumulate, and Round on 40 bits
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{ "mas\0mas", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Subtract
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{ "masr\0masr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Subtract, and Round
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{ "mas40\0mas40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Subtract, on 40 bits
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{ "masr40\0masr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Two Parallel Multiply and Subtract, and Round on 40 bits
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{ "amar\0mas", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Subtract
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{ "amar\0masr", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Subtract, and Round
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{ "amar\0mas40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Subtract, on 40 bits
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{ "amar\0masr40", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Modify Auxiliary Register - Multiply and Subtract, and Round on 40 bits
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// "mac\0mac"
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{ "mpy\0mac", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Multiply and Accumulate
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{ "mpyr\0macr", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Multiply and Accumulate, and Round
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{ "mpy40\0mac40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Multiply and Accumulate, on 40 bits
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{ "mpyr40\0macr40", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_USE5|CF_CHG6 }, // Parallel Multiply - Multiply and Accumulate, and Round on 40 bits
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// "mac\0mac"
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// "mas\0mac"
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// "amar\0mac"
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{ "amar", CF_CHG1|CF_CHG2|CF_CHG3 }, // Three Parallel Modify Auxiliary Registers
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{ "firsadd", CF_USE1|CF_USE2|CF_USE3|CF_CHG4|CF_CHG5 }, // Parallel Multiply and Accumulate - Add
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{ "firssub", CF_USE1|CF_USE2|CF_USE3|CF_CHG4|CF_CHG5 }, // Parallel Multiply and Accumulate - Subtract
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{ "mpym\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply - Store
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{ "mpymr\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply - Store, and Round
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{ "macm\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply and Accumulate - Store
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{ "macmr\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply and Accumulate - Store, and Round
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{ "masm\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply and Subtract - Store
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{ "masmr\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Multiply and Subtract - Store, and Round
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{ "add\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Add - Store
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{ "sub\0mov", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Subtract - Store
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{ "mov\0mov", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Parallel Load - Store
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{ "mov\0aadd", CF_USE1|CF_CHG2|CF_USE3|CF_CHG4 }, // Parallel Load - aadd
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{ "mov\0add", CF_USE1|CF_CHG2|CF_USE3|CF_USE4|CF_CHG5 }, // Parallel Load - aadd
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{ "amar\0amar", CF_CHG1|CF_CHG2 },
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{ "add\0asub", CF_USE1|CF_USE2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Add - asub
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{ "btst\0mov", CF_USE1|CF_CHG2|CF_CHG3|CF_USE4|CF_CHG5 }, // Parallel Bit Test - Store
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{ "mov\0asub", CF_USE1|CF_CHG2|CF_USE3|CF_CHG4 }, // Parallel Load - aadd
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// "macm\0mov"
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// "masm\0mov"
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{ "lms", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Least Mean Square
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{ "max", CF_CHG1 }, // Maximum Comparison
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{ "max", CF_USE1|CF_CHG2 }, // Maximum Comparison
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{ "min", CF_CHG1 }, // Minimum Comparison
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{ "min", CF_USE1|CF_CHG2 }, // Minimum Comparison
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{ "cmp", CF_USE1|CF_CHG2 }, // Memory Comparison
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{ "cmpu", CF_USE1|CF_CHG2 }, // Unsigned memory Comparison
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{ "aadd", CF_USE1|CF_CHG2 }, // Add Two Registers
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{ "asub", CF_USE1|CF_CHG2 }, // Subtract Two Registers
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{ "amov", CF_USE1|CF_CHG2 }, // Move From Register to Register
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// "aadd"
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// "asub"
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// "amov"
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{ "amar", CF_CHG1 }, // Auxiliary Register Modification
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// { "aadd", CF_USE1|CF_CHG2 }, // Modify Data Stack Pointer
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{ "sqr", CF_CHG1 }, // Square
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{ "sqr", CF_CHG1|CF_USE2 }, // Square
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{ "sqrr", CF_CHG1 }, // Square and Round
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{ "sqrr", CF_CHG1|CF_USE2 }, // Square and Round
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{ "mpy", CF_CHG1 }, // Multiply
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{ "mpy", CF_CHG1|CF_CHG2 }, // Multiply
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{ "mpy", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply
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{ "mpyr", CF_CHG1 }, // Multiply and Round
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{ "mpyr", CF_CHG1|CF_CHG2 }, // Multiply and Round
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{ "mpyr", CF_CHG1|CF_USE2|CF_CHG3 }, // Multiply and Round
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{ "mpyk", CF_USE1|CF_CHG2 }, // Multiply by Constant
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{ "mpyk", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply by Constant
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{ "mpykr", CF_USE1|CF_CHG2 }, // Multiply by Constant and Round
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{ "mpykr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply by Constant and Round
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{ "mpym", CF_USE1|CF_CHG2 }, // Multiply Memory Value
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{ "mpym", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Values
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{ "mpymr", CF_USE1|CF_CHG2 }, // Multiply Memory Value and Round
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{ "mpymr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Values and Round
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{ "mpym40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Values on 40 bits
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{ "mpymr40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Values and Round on 40 bits
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{ "mpymu", CF_USE1|CF_USE2|CF_CHG3 }, // Unsigned multiply Memory Values
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{ "mpymru", CF_USE1|CF_USE2|CF_CHG3 }, // Unsigned multiply Memory Values and Round
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{ "sqrm", CF_USE1|CF_CHG2 }, // Square Memory Value
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{ "sqrmr", CF_USE1|CF_CHG2 }, // Square Memory Value, and Round
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{ "mpymk", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Value by Constant
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{ "mpymkr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Value by Constant and Round
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{ "sqa", CF_CHG1 }, // Square and Accumulate
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{ "sqa", CF_CHG1|CF_USE2 }, // Square and Accumulate
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{ "sqar", CF_CHG1 }, // Square, Accumulate and Round
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{ "sqar", CF_CHG1|CF_USE2 }, // Square, Accumulate and Round
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{ "mac", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate
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{ "mac", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Multiply and Accumulate
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{ "macr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply, Accumulate and Round
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{ "macr", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Multiply, Accumulate and Round
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{ "mack", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply by Constant and Accumulate
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{ "mack", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply by Constant and Accumulate
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{ "mackr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply by Constant, Round and Accumulate
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{ "mackr", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply by Constant, Round and Accumulate
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{ "macm", CF_USE1|CF_CHG2 }, // Multiply and Accumulate Memory Values
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{ "macm", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values
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{ "macm", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Accumulate Memory Values
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{ "macmr", CF_USE1|CF_CHG2 }, // Multiply and Accumulate Memory Values, and Round
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{ "macmr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values, and Round
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{ "macmr", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Accumulate Memory Values, and Round
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{ "macm40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values, on 40 bits
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{ "macm40", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Accumulate Memory Values, on 40 bits
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{ "macmr40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values, and Round on 40 bits
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{ "macmr40", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Accumulate Memory Values, and Round on 40 bits
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{ "macmz", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values
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{ "macmrz", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Accumulate Memory Values, and Round
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{ "sqam", CF_USE1|CF_CHG2 }, // Square and Accumulate Memory Value
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{ "sqam", CF_USE1|CF_USE2|CF_CHG3 }, // Square and Accumulate Memory Values
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{ "sqamr", CF_USE1|CF_CHG2 }, // Square and Accumulate Memory Value, and Round
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{ "sqamr", CF_USE1|CF_USE2|CF_CHG3 }, // Square and Accumulate Memory Values, and Round
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{ "macmk", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Value by Constant and Accumulate
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{ "macmk", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply Memory Value by Constant and Accumulate
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{ "macmkr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply Memory Value by Constant - Accumulate, and Round
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{ "macmkr", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply Memory Value by Constant - Accumulate, and Round
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{ "sqs", CF_CHG1 }, // Square and Subtract
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{ "sqs", CF_CHG1|CF_USE2 }, // Square and Subtract
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{ "sqsr", CF_CHG1 }, // Square, Subtract and Round
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{ "sqsr", CF_CHG1|CF_USE2 }, // Square, Subtract and Round
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{ "mas", CF_USE1|CF_CHG2 }, // Multiply and Subtract
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{ "mas", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Subtract
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{ "masr", CF_USE1|CF_CHG2 }, // Multiply, Subtract and Round
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{ "masr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply, Subtract and Round
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{ "masm", CF_USE1|CF_CHG2 }, // Multiply and Subtract Memory Value
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{ "masm", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Subtract Memory Values
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{ "masm", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Subtract Memory Values
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{ "masmr", CF_USE1|CF_CHG2 }, // Multiply and Subtract Memory Value, and Round
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{ "masmr", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Subtract Memory Values, and Round
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{ "masmr", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Subtract Memory Values, and Round
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{ "masm40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Subtract Memory Values, on 40 bits
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{ "masm40", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Subtract Memory Values, on 40 bits
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{ "masmr40", CF_USE1|CF_USE2|CF_CHG3 }, // Multiply and Subtract Memory Values, and Round on 40 bits
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{ "masmr40", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Multiply and Subtract Memory Values, and Round on 40 bits
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{ "sqsm", CF_USE1|CF_CHG2 }, // Square and Subtract Memory Values
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{ "sqsm", CF_USE1|CF_USE2|CF_CHG3 }, // Square and Subtract Memory Values
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{ "sqsmr", CF_USE1|CF_CHG2 }, // Square and Subtract Memory Values, and Round
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{ "sqsmr", CF_USE1|CF_USE2|CF_CHG3 }, // Square and Subtract Memory Values, and Round
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{ "neg", CF_CHG1 }, // Negation
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{ "neg", CF_CHG1|CF_USE2 }, // Negation
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{ "mant\0nexp", CF_USE1|CF_CHG2|CF_USE3|CF_CHG4 }, // Exponent and Mantissa
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{ "exp", CF_USE1|CF_CHG2 }, // Exponent
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{ "cmpand", CF_USE1|CF_CHG2|CF_CHG3 }, // Compare and AND
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{ "cmpandu", CF_USE1|CF_CHG2|CF_CHG3 }, // Unsigned compare and AND
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{ "cmpor", CF_USE1|CF_CHG2|CF_CHG3 }, // Compare and OR
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{ "cmporu", CF_USE1|CF_CHG2|CF_CHG3 }, // Unsigned compare and OR
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{ "round", CF_CHG1 }, // Round
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{ "round", CF_USE1|CF_CHG2 }, // Round
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{ "sat", CF_CHG1 }, // Saturate
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{ "sat", CF_USE1|CF_CHG2 }, // Saturate
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{ "satr", CF_CHG1 }, // Saturate and Round
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{ "satr", CF_USE1|CF_CHG2 }, // Saturate and Round
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{ "sfts", CF_CHG1|CF_USE2 }, // Signed Shift
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{ "sfts", CF_USE1|CF_USE2|CF_CHG3 }, // Signed Shift
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{ "sftsc", CF_CHG1|CF_USE2 }, // Signed Shift with Carry
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{ "sftsc", CF_USE1|CF_USE2|CF_CHG3 }, // Signed Shift with Carry
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{ "sqdst", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Square distance
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{ "sub", CF_USE1 }, // Subtract
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{ "sub", CF_USE1|CF_CHG2 }, // Subtract
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{ "sub", CF_USE1|CF_USE2|CF_CHG3 }, // Subtract
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{ "sub", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Subtract
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// BIT MANIPULATION OPERATIONS
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{ "band", CF_USE1|CF_USE2|CF_CHG3 }, // Bit Field Comparison
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{ "bfxpa", CF_USE1|CF_USE2|CF_CHG3 }, // Bit Field Expand
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{ "bfxtr", CF_USE1|CF_USE2|CF_CHG3 }, // Bit Field Extract
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{ "btst", CF_USE1|CF_CHG2|CF_CHG3 }, // Bit Test
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{ "bnot", CF_USE1|CF_CHG2 }, // Bit NOT
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{ "bclr", CF_USE1|CF_CHG2 }, // Bit Clear
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{ "bset", CF_USE1|CF_CHG2 }, // Bit Set
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{ "btstset", CF_USE1|CF_CHG2|CF_CHG3 }, // Bit Test and Set
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{ "btstclr", CF_USE1|CF_CHG2|CF_CHG3 }, // Bit Test and Clear
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{ "btstnot", CF_USE1|CF_CHG2|CF_CHG3 }, // Bit Test and NOT
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{ "btstp", CF_USE1|CF_USE2 }, // Bit Pair Test
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{ "bclr", CF_CHG1 }, // Bit Clear
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{ "bset", CF_CHG1 }, // Bit Set
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// EXTENDED AUXILIARY REGISTER OPERATIONS
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{ "amar", CF_USE1|CF_CHG2 }, // Load Effective Address to Extended Auxiliary Register
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{ "popboth", CF_CHG1 }, // Pop Extended Auxiliary Register from Stack Pointers
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{ "pshboth", CF_USE1 }, // Push Extended Auxiliary Register to Stack Pointers
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// LOGICAL OPERATIONS
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{ "bcnt", CF_USE1|CF_USE2|CF_CHG3|CF_CHG4 }, // Count Bit Field
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{ "not", CF_CHG1 }, // NOT
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{ "not", CF_USE1|CF_CHG2 }, // NOT
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{ "and", CF_USE1 }, // AND
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{ "and", CF_USE1|CF_CHG2 }, // AND
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{ "and", CF_USE1|CF_USE2|CF_CHG3 }, // AND
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{ "or", CF_USE1 }, // OR
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{ "or", CF_USE1|CF_CHG2 }, // OR
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{ "or", CF_USE1|CF_USE2|CF_CHG3 }, // OR
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{ "xor", CF_USE1 }, // XOR
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{ "xor", CF_USE1|CF_CHG2 }, // XOR
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{ "xor", CF_USE1|CF_USE2|CF_CHG3 }, // XOR
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{ "sftl", CF_USE1|CF_USE2 }, // Logical Shift
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{ "sftl", CF_USE1|CF_USE2|CF_CHG3 }, // Logical Shift
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{ "rol", CF_CHG1|CF_USE2|CF_USE3|CF_CHG4 }, // Rotate Left
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{ "ror", CF_USE1|CF_USE2|CF_USE3|CF_CHG4 }, // Rotate Right
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|
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// MOVE OPERATIONS
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{ "swap", CF_CHG1|CF_CHG2 }, // Swap Registers
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{ "swapp", CF_CHG1|CF_CHG2 }, // Swap Pair Registers
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{ "swap4", CF_CHG1|CF_CHG2 }, // Swap 4 Registers
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{ "mov", CF_USE1|CF_CHG2 }, // Move Data
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|
{ "mov", CF_USE1|CF_USE2|CF_CHG3 }, // Move 2 Data
|
|
{ "mov40", CF_USE1|CF_CHG2 }, // Move Data on 40 bits
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|
{ "delay", CF_USE1 }, // Memory Delay
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|
|
{ "pop", CF_CHG1 }, // Pop Top of Stack
|
|
{ "pop", CF_CHG1|CF_CHG2 }, // Pop Top of Stack
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|
|
|
{ "psh", CF_USE1 }, // Pop Top of Stack
|
|
{ "psh", CF_USE1|CF_USE2 }, // Pop Top of Stack
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|
|
|
// PROGRAM CONTROL OPERATIONS
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|
|
|
{ "bcc", CF_USE1|CF_USE2 }, // Branch Conditionally
|
|
{ "bccu", CF_USE1|CF_USE2 }, // Branch Conditionally
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{ "b", CF_USE1|CF_STOP }, // Branch Unconditionally
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|
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|
{ "callcc", CF_USE1|CF_USE2|CF_CALL }, // Call Conditionally
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|
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|
{ "call", CF_USE1|CF_CALL }, // Call Unconditionally
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|
|
|
{ "xcc", CF_USE1 }, // Execute Conditionally
|
|
{ "xccpart", CF_USE1 }, // Execute Conditionally
|
|
|
|
{ "idle", 0 }, // Idle
|
|
|
|
{ "nop", 0 }, // No Operation
|
|
{ "nop_16", 0 }, // No Operation
|
|
|
|
{ "rptblocal", CF_USE1 }, // Repeat Block of Instructions Unconditionally
|
|
{ "rptb", CF_USE1 }, // Repeat Block of Instructions Unconditionally
|
|
|
|
{ "rptcc", CF_USE1|CF_USE2 }, // Repeat Single Instruction Conditionally
|
|
|
|
{ "rpt", CF_USE1 }, // Repeat Single Instruction Unconditionally
|
|
{ "rptadd", CF_USE1|CF_USE2 }, // Repeat Single Instruction Unconditionally and Add to Register
|
|
{ "rptsub", CF_USE1|CF_USE2 }, // Repeat Single Instruction Unconditionally and Subtract to Register
|
|
|
|
{ "retcc", CF_USE1 }, // Return Conditionally
|
|
{ "ret", CF_STOP }, // Return Unconditionally
|
|
{ "reti", CF_STOP }, // Return from Interrupt
|
|
|
|
{ "intr", CF_USE1 }, // Software Interrupt
|
|
|
|
{ "reset", 0 }, // Software Reset
|
|
|
|
{ "trap", CF_USE1 }, // Software Trap
|
|
|
|
};
|
|
|
|
CASSERT(qnumber(Instructions) == TMS320C55_last);
|