748 lines
20 KiB
C++
748 lines
20 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-99 by Ilfak Guilfanov.
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* ALL RIGHTS RESERVED.
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* E-mail: ig@datarescue.com
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*
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*
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*/
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#include <ctype.h>
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#include "pic.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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int data_id;
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//--------------------------------------------------------------------------
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static const char *const register_names_pic12[] =
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{
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"w", "f",
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"ACCESS", // register for PIC18Cxx
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"BANKED", // register for PIC18Cxx
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"FAST", // register for PIC18Cxx
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"FSR0", // register for PIC18Cxx
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"FSR1", // register for PIC18Cxx
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"FSR2", // register for PIC18Cxx
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"bank",
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"cs","ds", // virtual registers for code and data segments
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"status",
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"pclatu" // register for PIC18Cxx
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};
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static const char *const register_names_pic14[] =
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{
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"w", "f",
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"ACCESS", // register for PIC18Cxx
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"BANKED", // register for PIC18Cxx
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"FAST", // register for PIC18Cxx
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"FSR0", // register for PIC18Cxx
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"FSR1", // register for PIC18Cxx
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"FSR2", // register for PIC18Cxx
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"bank",
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"cs","ds", // virtual registers for code and data segments
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"pclath",
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"pclatu" // register for PIC18Cxx
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};
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static const char *const register_names_pic16[] =
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{
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"w", "f",
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"ACCESS", // register for PIC18Cxx
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"BANKED", // register for PIC18Cxx
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"FAST", // register for PIC18Cxx
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"FSR0", // register for PIC18Cxx
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"FSR1", // register for PIC18Cxx
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"FSR2", // register for PIC18Cxx
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"bsr",
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"cs","ds", // virtual registers for code and data segments
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"pclath",
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"pclatu" // register for PIC18Cxx
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};
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//--------------------------------------------------------------------------
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// 11 01xx kkkk kkkk RETLW k Return with literal in W
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static const uchar retcode_0[] = { 0x08, 0x00 }; // return
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static const uchar retcode_1[] = { 0x09, 0x00 }; // retfie
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static const uchar retcode_2[] = { 0x00, 0x34 }; // retlw 0
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static const uchar retcode_3[] = { 0x01, 0x34 }; // retlw 1
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_0), retcode_0 },
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{ sizeof(retcode_1), retcode_1 },
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{ sizeof(retcode_2), retcode_2 },
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{ sizeof(retcode_3), retcode_3 },
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{ 0, NULL }
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};
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//-----------------------------------------------------------------------
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// Microchip's MPALC
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//-----------------------------------------------------------------------
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static const asm_t mpalc =
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{
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ASH_HEXF2|ASD_DECF3|ASB_BINF5|ASO_OCTF5|AS_N2CHR|AS_NCMAS|AS_ONEDUP,
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0,
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"Microchip's MPALC",
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0,
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NULL, // header lines
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"org", // org
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"end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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"data", // ascii string directive
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"byte", // byte directive
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"data", // word directive
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NULL, // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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NULL, // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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"res %s", // uninited arrays
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"equ", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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NULL, // "public" name keyword
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NULL, // "weak" name keyword
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NULL, // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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NULL, // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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};
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static const asm_t *const asms[] = { &mpalc, NULL };
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//--------------------------------------------------------------------------
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void pic_t::free_mappings(void)
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{
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map.clear();
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}
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void pic_t::add_mapping(ea_t from, ea_t to)
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{
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if ( from != to )
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{
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deb(IDA_DEBUG_IDP, "add_mapping %a -> %a\n", from, to);
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portmap_t &p = map.push_back();
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p.from = from;
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p.to = to;
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}
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}
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ea_t pic_t::map_port(ea_t from)
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{
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for ( int i=0; i < map.size(); i++ )
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if ( map[i].from == from )
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return map[i].to;
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return from;
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}
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//--------------------------------------------------------------------------
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void pic_iohandler_t::get_cfg_filename(char *buf, size_t bufsize)
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{
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qstrncpy(buf, pm.cfgname, bufsize);
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}
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// create the mapping table
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void pic_t::create_mappings(void)
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{
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free_mappings();
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for ( int i=0; i < ioh.ports.size(); i++ )
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{
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const char *name = ioh.ports[i].name.c_str();
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ea_t nameea = get_name_ea(BADADDR, name);
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if ( nameea != BADADDR && nameea > dataseg )
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add_mapping(ioh.ports[i].address, nameea-dataseg);
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}
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}
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//----------------------------------------------------------------------
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static ea_t AddSegment(ea_t start, size_t size, ea_t base, const char *name, uchar type)
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{
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segment_t s;
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s.start_ea = start;
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s.end_ea = start + size;
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s.sel = allocate_selector(base >> 4);
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s.type = type;
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s.align = saRelByte;
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s.comb = scPub;
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add_segm_ex(&s, name, NULL, ADDSEG_NOSREG|ADDSEG_OR_DIE);
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return s.start_ea;
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}
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//----------------------------------------------------------------------
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// special handling for 16-bit PICs
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// for CODE segments use addresses as-is
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// for DATA segments, start from dataseg base
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bool pic_iohandler_t::area_processing(ea_t start, ea_t end, const char *name, const char *aclass)
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{
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if ( pm.ptype != PIC16 )
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return false;
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if ( strcmp(aclass, "CODE") == 0 )
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{
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AddSegment(start, end-start, 0, name, SEG_CODE);
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}
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else if ( strcmp(aclass, "DATA") == 0 )
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{
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if ( pm.dataseg == BADADDR )
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{
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pm.dataseg = free_chunk(0, 0x1000, -0xF);
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pm.save_dataseg();
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}
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uchar type = stristr(name, "FSR") != NULL ? SEG_IMEM : SEG_DATA;
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AddSegment(pm.dataseg + start, end-start, pm.dataseg, name, type);
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}
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else
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{
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return false;
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}
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return true;
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}
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void pic_t::load_symbols_without_infotype(int _respect_info)
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{
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ioh.ports.clear();
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ioh.respect_info = _respect_info;
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iohandler_t::ioports_loader_t ldr(&ioh);
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read_ioports2(&ioh.ports, &ioh.device, cfgname, &ldr);
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create_mappings();
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}
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void pic_t::load_symbols(int _respect_info)
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{
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if ( ioh.display_infotype_dialog(IORESP_ALL, &_respect_info, cfgname) )
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load_symbols_without_infotype(_respect_info);
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}
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const char *pic_t::find_sym(ea_t address)
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{
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const ioport_t *port = find_ioport(ioh.ports, address);
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return port ? port->name.c_str() : NULL;
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}
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const ioport_bits_t *pic_t::find_bits(ea_t address)
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{
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const ioport_t *port = find_ioport(ioh.ports, address);
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return port ? (&port->bits) : NULL;
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}
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const char *pic_t::find_bit(ea_t address, int bit)
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{
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address = map_port(address);
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const ioport_bit_t *b = find_ioport_bit(ioh.ports, address, bit);
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return b ? b->name.c_str() : NULL;
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}
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//----------------------------------------------------------------------
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void pic_t::apply_symbols(void)
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{
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free_mappings();
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if ( dataseg != BADADDR )
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{
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for ( int i=0; i < ioh.ports.size(); i++ )
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{
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ea_t ea = calc_data_mem(ioh.ports[i].address);
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segment_t *s = getseg(ea);
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if ( s == NULL || s->type != SEG_IMEM )
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continue;
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create_byte(ea, 1);
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const char *name = ioh.ports[i].name.c_str();
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if ( !set_name(ea, name, SN_NOCHECK|SN_NOWARN|SN_NODUMMY) )
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set_cmt(ea, name, 0);
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}
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for ( segment_t *d = getseg(dataseg); d != NULL; d = get_next_seg(d->start_ea) )
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{
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if ( d->type != SEG_IMEM )
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continue;
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ea_t ea = d->start_ea;
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ea_t dataend = d->end_ea;
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while ( 1 )
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{
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ea = next_unknown(ea, dataend);
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if ( ea == BADADDR )
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break;
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ea_t end = next_that(ea, dataend, f_is_head);
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if ( end == BADADDR )
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end = dataend;
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create_byte(ea, end-ea);
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}
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}
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create_mappings();
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}
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}
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//------------------------------------------------------------------
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void pic_t::setup_device(int lrespect_info)
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{
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iohandler_t::parse_area_line0_t cb(ioh);
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if ( choose_ioport_device2(&ioh.device, cfgname, &cb) )
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{
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if ( ioh.device != NONEPROC )
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helper.supset(-1, ioh.device.c_str());
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// we don't pass IORESP_PORT because that would rename bytes in the code segment
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// we'll handle port renaming ourselves
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if ( ioh.display_infotype_dialog(IORESP_ALL, &lrespect_info, cfgname) )
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{
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ioh.set_device_name(ioh.device.c_str(), lrespect_info & ~IORESP_PORT);
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if ( (lrespect_info & IORESP_PORT) != 0 )
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apply_symbols();
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}
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}
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}
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//----------------------------------------------------------------------
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ea_t pic_t::AdditionalSegment(size_t size, ea_t offset, const char *name) const
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{
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ea_t start = free_chunk(0, size, -0xF);
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return AddSegment(start, size, start - offset, name, SEG_IMEM) - offset;
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}
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//--------------------------------------------------------------------------
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static const proctype_t ptypes[] =
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{
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PIC12,
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PIC14,
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PIC16
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};
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//-------------------------------------------------------------------------
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static const cfgopt_t options[] =
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{ // name varptr type/bit
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CFGOPT_B("PIC_SIMPLIFY", pic_t, idpflags, ushort(IDP_SIMPLIFY)),
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};
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//--------------------------------------------------------------------------
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static const cfgopt_t *find_option(const char *name)
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{
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for ( int i=0; i < qnumber(options); i++ )
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if ( streq(options[i].name, name) )
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return &options[i];
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return NULL;
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}
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//--------------------------------------------------------------------------
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int idaapi optionscb(int field_id, form_actions_t &fa)
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{
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// ensure that instruction simplification can't be turned off
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// if macros are enabled
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if ( field_id == CB_INIT )
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fa.enable_field(1, !inf_macros_enabled());
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return 1;
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}
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//--------------------------------------------------------------------------
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static int idaapi choose_device(int, form_actions_t &fa)
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{
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pic_t &pm = *(pic_t *)fa.get_ud();
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if ( choose_ioport_device(&pm.ioh.device, pm.cfgname) )
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{
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pm.helper.supset(-1, pm.ioh.device.c_str());
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pm.load_symbols(IORESP_ALL);
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pm.apply_symbols();
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}
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return 0;
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}
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const char *pic_t::set_idp_options(
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const char *keyword,
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int value_type,
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const void * value,
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bool idb_loaded)
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{
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if ( keyword == NULL )
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{
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if ( ptype != PIC16 )
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{
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static const char form[] =
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"HELP\n"
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"PIC specific options\n"
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"\n"
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" Simplify instructions\n"
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"\n"
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" If this option is on, IDA will simplify instructions and replace\n"
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" them by clearer macro-instructions\n"
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" For example,\n"
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"\n"
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" btfsc 3,0\n"
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"\n"
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" will be replaced by\n"
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"\n"
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" skpnc\n"
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"\n"
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" If macros are enabled, this options should be turned on.\n"
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"ENDHELP\n"
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"PIC specific options\n"
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"%/%*\n"
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" <~S~implify instructions:C1>>\n"
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"\n"
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" <~C~hoose device name:B:0::>\n"
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"\n"
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"\n";
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if ( inf_macros_enabled() )
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setflag(idpflags, IDP_SIMPLIFY, true);
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CASSERT(sizeof(idpflags) == sizeof(ushort));
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if ( ask_form(form, optionscb, this, &idpflags, choose_device) == ASKBTN_YES )
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{
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SAVE:
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if ( idb_loaded )
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save_idpflags();
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}
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}
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else
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{
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static const char form[] =
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"PIC specific options\n"
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"\n"
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" <~C~hoose device name:B:0::>\n"
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"\n"
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"\n";
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ask_form(form, choose_device);
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}
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return IDPOPT_OK;
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}
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else
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{
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const cfgopt_t *opt = find_option(keyword);
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if ( opt == NULL )
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return IDPOPT_BADKEY;
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const char *errmsg = opt->apply(value_type, value, this);
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if ( errmsg != IDPOPT_OK )
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return errmsg;
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// if macros are enabled, we should simplify insns
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if ( ph.supports_macros() && inf_macros_enabled() )
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setflag(idpflags, IDP_SIMPLIFY, true);
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goto SAVE;
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}
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}
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//--------------------------------------------------------------------------
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void pic_t::set_cpu(int n)
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{
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if ( ptypes[n] != ptype )
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{
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ptype = ptypes[n];
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ph.cnbits = 12 + 2*n;
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}
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switch ( ptype )
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{
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case PIC12:
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ph.reg_names = register_names_pic12;
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cfgname = "pic12.cfg";
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break;
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case PIC14:
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ph.reg_names = register_names_pic14;
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cfgname = "pic14.cfg";
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break;
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case PIC16:
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ph.reg_names = register_names_pic16;
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cfgname = "pic16.cfg";
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ph.cnbits = 8;
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ph.reg_last_sreg = PCLATU;
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break;
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default:
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INTERR(10311);
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}
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setflag(ph.flag2, PR2_MACRO, ptype != PIC16);
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}
|
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|
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//----------------------------------------------------------------------
|
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void pic_t::check_pclath(segment_t *s) const
|
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{
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if ( s == NULL )
|
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return;
|
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if ( s->defsr[PCLATH-ph.reg_first_sreg] == BADSEL )
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s->defsr[PCLATH-ph.reg_first_sreg] = 0;
|
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}
|
|
|
|
//----------------------------------------------------------------------
|
|
void pic_t::load_from_idb()
|
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{
|
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idpflags = (ushort)helper.altval(-1);
|
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dataseg = node2ea(helper.altval(0));
|
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ioh.upgrade_device_index();
|
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helper.supstr(&ioh.device, -1);
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load_symbols_without_infotype(IORESP_PORT);
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ioh.respect_info = sav_respect_info;
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}
|
|
|
|
//----------------------------------------------------------------------
|
|
// This old-style callback only returns the processor module object.
|
|
static ssize_t idaapi notify(void *, int msgid, va_list)
|
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{
|
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if ( msgid == processor_t::ev_get_procmod )
|
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return size_t(SET_MODULE_DATA(pic_t));
|
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return 0;
|
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}
|
|
|
|
//----------------------------------------------------------------------
|
|
ssize_t idaapi pic_t::on_event(ssize_t msgid, va_list va)
|
|
{
|
|
int code = 0;
|
|
sav_respect_info = ioh.respect_info;
|
|
switch ( msgid )
|
|
{
|
|
case processor_t::ev_init:
|
|
helper.create(PROCMOD_NODE_NAME);
|
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break;
|
|
|
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case processor_t::ev_term:
|
|
free_mappings();
|
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ioh.ports.clear();
|
|
clr_module_data(data_id);
|
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break;
|
|
|
|
case processor_t::ev_newfile: // new file loaded
|
|
{
|
|
segment_t *s0 = get_first_seg();
|
|
if ( s0 != NULL )
|
|
{
|
|
ea_t firstEA = s0->start_ea;
|
|
if ( ptype == PIC12 || ptype == PIC14 )
|
|
{
|
|
set_segm_name(s0, "CODE");
|
|
dataseg = AdditionalSegment(0x200, 0, "DATA");
|
|
setup_device(IORESP_INT|IORESP_PORT);
|
|
}
|
|
else
|
|
{
|
|
setup_device(IORESP_ALL);
|
|
}
|
|
s0 = getseg(firstEA);
|
|
if ( s0 != NULL )
|
|
{
|
|
set_default_sreg_value(s0, BANK, 0);
|
|
set_default_sreg_value(s0, PCLATH, 0);
|
|
set_default_sreg_value(s0, PCLATU, 0);
|
|
}
|
|
segment_t *s1 = getseg(dataseg);
|
|
if ( s1 != NULL )
|
|
{
|
|
set_default_sreg_value(s1, BANK, 0);
|
|
set_default_sreg_value(s1, PCLATH, 0);
|
|
set_default_sreg_value(s1, PCLATU, 0);
|
|
}
|
|
}
|
|
}
|
|
// save info to idb
|
|
save_dataseg();
|
|
save_idpflags();
|
|
break;
|
|
|
|
case processor_t::ev_ending_undo:
|
|
set_cpu(ph.get_proc_index());
|
|
ioh.respect_info = IORESP_NONE;
|
|
//fall through
|
|
case processor_t::ev_oldfile: // old file loaded
|
|
load_from_idb();
|
|
// init PCLATH for very old IDBs
|
|
check_pclath(get_first_seg());
|
|
check_pclath(getseg(dataseg));
|
|
break;
|
|
|
|
case processor_t::ev_newprc: // new processor type
|
|
{
|
|
int n = va_arg(va, int);
|
|
// bool keep_cfg = va_argi(va, bool);
|
|
if ( set )
|
|
return 0;
|
|
set = true;
|
|
set_cpu(n);
|
|
}
|
|
break;
|
|
|
|
case processor_t::ev_out_header:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
pic_header(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_footer:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
pic_footer(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_segstart:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
segment_t *seg = va_arg(va, segment_t *);
|
|
pic_segstart(*ctx, seg);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_segend:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
segment_t *seg = va_arg(va, segment_t *);
|
|
pic_segend(*ctx, seg);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_assumes:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
pic_assumes(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_ana_insn:
|
|
{
|
|
insn_t *out = va_arg(va, insn_t *);
|
|
return ana(out);
|
|
}
|
|
|
|
case processor_t::ev_emu_insn:
|
|
{
|
|
const insn_t *insn = va_arg(va, const insn_t *);
|
|
return emu(*insn) ? 1 : -1;
|
|
}
|
|
|
|
case processor_t::ev_out_insn:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
out_insn(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_operand:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
const op_t *op = va_arg(va, const op_t *);
|
|
return out_opnd(*ctx, *op) ? 1 : -1;
|
|
}
|
|
|
|
case processor_t::ev_out_data:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
bool analyze_only = va_argi(va, bool);
|
|
pic_data(*ctx, analyze_only);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_is_sp_based:
|
|
{
|
|
int *mode = va_arg(va, int *);
|
|
*mode = OP_SP_ADD | OP_FP_BASED;
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_create_func_frame:
|
|
{
|
|
func_t *pfn = va_arg(va, func_t *);
|
|
create_func_frame(pfn);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_get_frame_retsize:
|
|
{
|
|
int *frsize = va_arg(va, int *);
|
|
*frsize = 0;
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_set_idp_options:
|
|
{
|
|
const char *keyword = va_arg(va, const char *);
|
|
int value_type = va_arg(va, int);
|
|
const char *value = va_arg(va, const char *);
|
|
const char **errmsg = va_arg(va, const char **);
|
|
bool idb_loaded = va_argi(va, bool);
|
|
const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
|
|
if ( ret == IDPOPT_OK )
|
|
return 1;
|
|
if ( errmsg != NULL )
|
|
*errmsg = ret;
|
|
return -1;
|
|
}
|
|
|
|
|
|
default:
|
|
break;
|
|
}
|
|
return code;
|
|
}
|
|
|
|
//-----------------------------------------------------------------------
|
|
#define FAMILY "Microchip PIC:"
|
|
static const char *const shnames[] =
|
|
{ "PIC12Cxx",
|
|
"PIC16Cxx",
|
|
"PIC18Cxx",
|
|
NULL
|
|
};
|
|
static const char *const lnames[] =
|
|
{ FAMILY "Microchip PIC12Cxx - 12 bit instructions",
|
|
"Microchip PIC16Cxx - 14 bit instructions",
|
|
"Microchip PIC18Cxx - 16 bit instructions",
|
|
NULL
|
|
};
|
|
|
|
//-----------------------------------------------------------------------
|
|
// Processor Definition
|
|
//-----------------------------------------------------------------------
|
|
processor_t LPH =
|
|
{
|
|
IDP_INTERFACE_VERSION, // version
|
|
PLFM_PIC, // id
|
|
// flag
|
|
PRN_HEX
|
|
| PR_SEGS
|
|
| PR_SGROTHER
|
|
| PR_STACK_UP
|
|
| PR_RNAMESOK,
|
|
// flag2
|
|
PR2_IDP_OPTS // the module has processor-specific configuration options
|
|
| PR2_MACRO, // try to combine several instructions into a macro instruction
|
|
12, // 12/14/16 bits in a byte for code segments
|
|
8, // 8 bits in a byte for other segments
|
|
|
|
shnames,
|
|
lnames,
|
|
|
|
asms,
|
|
|
|
notify,
|
|
|
|
register_names_pic14, // Register names
|
|
qnumber(register_names_pic14), // Number of registers
|
|
|
|
BANK, // first
|
|
PCLATH, // last
|
|
0, // size of a segment register
|
|
rVcs, rVds,
|
|
|
|
NULL, // No known code start sequences
|
|
retcodes,
|
|
|
|
PIC_null,
|
|
PIC_last,
|
|
Instructions, // instruc
|
|
0, // int tbyte_size; -- doesn't exist
|
|
{ 0, 0, 0, 0 }, // char real_width[4];
|
|
// number of symbols after decimal point
|
|
// 2byte float (0-does not exist)
|
|
// normal float
|
|
// normal double
|
|
// long double
|
|
PIC_return, // Icode of return instruction. It is ok to give any of possible return instructions
|
|
};
|