289 lines
7.0 KiB
C++
289 lines
7.0 KiB
C++
/*
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* NEC 78K0 processor module for IDA.
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* Copyright (c) 2006 Konstantin Norvatoff, <konnor@bk.ru>
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* Freeware.
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*/
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#include "78k0.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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int data_id;
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//----------------------------------------------------------------------
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static const char *const RegNames[] =
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{
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"X", "A", "C", "B", "E", "D", "L", "H", "AX", "BC", "DE","HL",
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"PSW", "SP", "CY", "RB0", "RB1", "RB2", "RB3",
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"cs", "ds"
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};
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//----------------------------------------------------------------------
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static const asm_t nec78k0 =
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{
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AS_COLON | ASB_BINF4 | AS_N2CHR,
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0,
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"NEC 78K0 Assembler",
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0,
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NULL,
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".org",
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".end",
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".db", // ascii string directive
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".db", // byte directive
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".dw", // word directive
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".dd", // no double words
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NULL, // no qwords
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NULL, // oword (16 bytes)
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NULL, // no float
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NULL, // no double
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NULL, // no tbytes
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NULL, // no packreal
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"#d dup(#v)", //".db.#s(b,w) #d,#v", // #h - header(.byte,.word)
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// #d - size of array
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// #v - value of array elements
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// #s - size specifier
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".rs %s",// uninited data (reserve space)
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".equ",
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NULL, // seg prefix
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"$", // a_curip
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NULL, // returns function header line
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NULL, // returns function footer line
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NULL, // public
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NULL, // weak
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NULL, // extrn
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NULL, // comm
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NULL, // get_type_name
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NULL, // align
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'(', ')',// lbrace, rbrace
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NULL, // mod
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NULL, // and
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NULL, // or
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NULL, // xor
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NULL, // not
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NULL, // shl
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NULL, // shr
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NULL, // sizeof
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};
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//----------------------------------------------------------------------
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#define FAMILY "NEC series:"
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static const char *const shnames[] =
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{
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"78k0",
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NULL
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};
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static const char *const lnames[] =
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{
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FAMILY"NEC 78K0",
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NULL
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};
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static const asm_t *const asms[] =
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{
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&nec78k0,
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NULL
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};
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//--------------------------------------------------------------------------
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static const uchar retcNEC78K0_0[] = { 0xAF }; // ret
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static const uchar retcNEC78K0_1[] = { 0x9F }; // retb
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static const uchar retcNEC78K0_2[] = { 0x8F }; // reti
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static const uchar retcNEC78K0_3[] = { 0xBF }; // brk
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcNEC78K0_0), retcNEC78K0_0 },
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{ sizeof(retcNEC78K0_1), retcNEC78K0_1 },
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{ sizeof(retcNEC78K0_2), retcNEC78K0_2 },
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{ sizeof(retcNEC78K0_3), retcNEC78K0_3 },
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{ 0, NULL }
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};
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(nec78k0_t));
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return 0;
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}
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//------------------------------------------------------------------
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bool nec78k0_t::nec_find_ioport_bit(outctx_t &ctx, int port, int bit)
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{
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const ioport_bit_t *b = find_ioport_bit(ioh.ports, port, bit);
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if ( b != NULL && !b->name.empty() )
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{
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ctx.out_line(b->name.c_str(), COLOR_IMPNAME);
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return true;
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}
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return false;
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}
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//----------------------------------------------------------------------
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void set_dopolnit_info(void)
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{
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for ( int banknum = 0; banknum < 4; banknum++ )
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{
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for ( int Regs = 0; Regs < 8; Regs++ )
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{
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char temp[100];
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qsnprintf(temp, sizeof(temp), "Bank%d_%s", banknum, RegNames[Regs]);
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ushort Addr = ushort(0xFEE0+((banknum*8)+Regs));
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set_name(Addr, temp);
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qsnprintf(temp, sizeof(temp), "Internal high-speed RAM (Bank %d registr %s)", banknum, RegNames[Regs]);
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set_cmt(Addr, temp, true);
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}
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}
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}
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//----------------------------------------------------------------------
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void nec78k0_t::load_from_idb()
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{
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ioh.restore_device();
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}
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//----------------------------------------------------------------------
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ssize_t idaapi nec78k0_t::on_event(ssize_t msgid, va_list va)
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{
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switch ( msgid )
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{
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case processor_t::ev_init:
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inf_set_be(false);
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inf_set_gen_lzero(true);
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helper.create(PROCMOD_NODE_NAME);
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile:
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{
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char cfgfile[QMAXFILE];
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ioh.get_cfg_filename(cfgfile, sizeof(cfgfile));
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iohandler_t::parse_area_line0_t cb(ioh);
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if ( choose_ioport_device2(&ioh.device, cfgfile, &cb) )
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ioh.set_device_name(ioh.device.c_str(), IORESP_ALL);
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set_dopolnit_info();
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}
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break;
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case processor_t::ev_ending_undo:
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case processor_t::ev_oldfile:
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load_from_idb();
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break;
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case processor_t::ev_creating_segm:
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{
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segment_t *s = va_arg(va, segment_t *);
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// Set default value of DS register for all segments
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set_default_dataseg(s->sel);
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}
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break;
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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N78K_header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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N78K_footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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N78K_segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_ana_insn:
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{
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insn_t *out = va_arg(va, insn_t *);
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return N78K_ana(out);
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}
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case processor_t::ev_emu_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return N78K_emu(*insn) ? 1 : -1;
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}
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case processor_t::ev_out_insn:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_insn(*ctx);
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return 1;
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}
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case processor_t::ev_out_operand:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const op_t *op = va_arg(va, const op_t *);
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return out_opnd(*ctx, *op) ? 1 : -1;
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}
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default:
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break;
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}
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return 0;
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}
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//-----------------------------------------------------------------------
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// Processor Definition
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//-----------------------------------------------------------------------
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processor_t LPH =
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{
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IDP_INTERFACE_VERSION, // version
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PLFM_NEC_78K0,
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// flag
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PRN_HEX
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| PR_SEGTRANS
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| PR_SEGS,
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// flag2
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0,
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8, // 8 bits in a byte for code segments
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8, // 8 bits in a byte
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shnames,
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lnames,
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asms,
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notify,
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RegNames, // Regsiter names
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qnumber(RegNames), // Number of registers
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rVcs, rVds,
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2, // size of a segment register
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rVcs, rVds,
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NULL,
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retcodes,
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0, NEC_78K_0_last,
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Instructions, // instruc
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3,
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{ 0,0,0,0 },
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0,
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NULL, // micro virtual mashine
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};
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