258 lines
16 KiB
C++
258 lines
16 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-2021 Hex-Rays
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* ALL RIGHTS RESERVED.
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*
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* TMS320C6xx - VLIW (very long instruction word) architecture
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*
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*/
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#ifndef __INSTRS_HPP
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#define __INSTRS_HPP
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extern const instruc_t Instructions[];
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enum nameNum ENUM_SIZE(uint16)
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{
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// Original TMS320C62x instructions
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TMS6_null = 0, // Unknown Operation
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TMS6_abs, // Absolute value
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TMS6_add, // Integer addition without saturation (signed)
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TMS6_addu, // Integer addition without saturation (unsigned)
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TMS6_addab, // Integer addition using addressing mode (byte)
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TMS6_addah, // Integer addition using addressing mode (halfword)
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TMS6_addaw, // Integer addition using addressing mode (word)
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TMS6_addk, // Integer addition 16bit signed constant
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TMS6_add2, // Two 16bit Integer adds on register halves
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TMS6_and, // Logical AND
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TMS6_b, // Branch
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TMS6_clr, // Clear a bit field
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TMS6_cmpeq, // Compare for equality
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TMS6_cmpgt, // Compare for greater than (signed)
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TMS6_cmpgtu, // Compare for greater than (unsigned)
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TMS6_cmplt, // Compare for less than (signed)
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TMS6_cmpltu, // Compare for less than (unsigned)
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TMS6_ext, // Extract and sign-extend a bit filed
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TMS6_extu, // Extract an unsigned bit field
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TMS6_idle, // Multicycle NOP with no termination until interrupt
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TMS6_ldb, // Load from memory (signed 8bit)
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TMS6_ldbu, // Load from memory (unsigned 8bit)
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TMS6_ldh, // Load from memory (signed 16bit)
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TMS6_ldhu, // Load from memory (unsigned 16bit)
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TMS6_ldw, // Load from memory (32bit)
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TMS6_lmbd, // Leftmost bit detection
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TMS6_mpy, // Signed Integer Multiply (LSB16 x LSB16)
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TMS6_mpyu, // Unsigned Integer Multiply (LSB16 x LSB16)
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TMS6_mpyus, // Integer Multiply Signed*Unsigned (LSB16 x LSB16)
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TMS6_mpysu, // Integer Multiply Unsigned*Signed (LSB16 x LSB16)
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TMS6_mpyh, // Signed Integer Multiply (MSB16 x MSB16)
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TMS6_mpyhu, // Unsigned Integer Multiply (MSB16 x MSB16)
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TMS6_mpyhus, // Integer Multiply Unsigned*Signed (MSB16 x MSB16)
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TMS6_mpyhsu, // Integer Multiply Signed*Unsigned (MSB16 x MSB16)
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TMS6_mpyhl, // Signed Integer Multiply (MSB16 x LSB16)
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TMS6_mpyhlu, // Unsigned Integer Multiply (MSB16 x LSB16)
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TMS6_mpyhuls, // Integer Multiply Signed*Unsigned (MSB16 x LSB16)
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TMS6_mpyhslu, // Integer Multiply Unsigned*Signed (MSB16 x LSB16)
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TMS6_mpylh, // Signed Integer Multiply (LSB16 x MB16)
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TMS6_mpylhu, // Unsigned Integer Multiply (LSB16 x MSB16)
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TMS6_mpyluhs, // Integer Multiply Signed*Unsigned (LSB16 x MSB16)
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TMS6_mpylshu, // Integer Multiply Unsigned*Signed (LSB16 x MSB16)
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TMS6_mv, // Move from register to register
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TMS6_mvc, // Move between the control file & register file
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TMS6_mvk, // Move a 16bit signed constant into register
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TMS6_mvkh, // Move a 16bit constant into the upper bits of a register
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TMS6_mvklh, // Move a 16bit constant into the upper bits of a register
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TMS6_neg, // Negate
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TMS6_nop, // No operation
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TMS6_norm, // Normalize
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TMS6_not, // Bitwise NOT
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TMS6_or, // Logical or
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TMS6_sadd, // Integer addition with saturation
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TMS6_sat, // Saturate 40bit value to 32bits
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TMS6_set, // Set a bit field
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TMS6_shl, // Arithmetic shift left
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TMS6_shr, // Arithmetic shift right
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TMS6_shru, // Logical shift left
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TMS6_smpy, // Integer multiply with left shift & saturation (LSB16*LSB16)
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TMS6_smpyhl, // Integer multiply with left shift & saturation (MSB16*LSB16)
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TMS6_smpylh, // Integer multiply with left shift & saturation (LSB16*MSB16)
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TMS6_smpyh, // Integer multiply with left shift & saturation (MSB16*MSB16)
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TMS6_sshl, // Shift left with saturation
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TMS6_ssub, // Integer substraction with saturation
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TMS6_stb, // Store to memory (signed 8bit)
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TMS6_stbu, // Store to memory (unsigned 8bit)
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TMS6_sth, // Store to memory (signed 16bit)
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TMS6_sthu, // Store to memory (unsigned 16bit)
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TMS6_stw, // Store to memory (32bit)
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TMS6_sub, // Integer substaraction without saturation (signed)
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TMS6_subu, // Integer substaraction without saturation (unsigned)
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TMS6_subab, // Integer subtraction using addressing mode (byte)
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TMS6_subah, // Integer subtraction using addressing mode (halfword)
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TMS6_subaw, // Integer subtraction using addressing mode (word)
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TMS6_subc, // Conditional subtract & shift (for division)
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TMS6_sub2, // Two 16bit integer subtractions on register halves
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TMS6_xor, // Exclusive OR
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TMS6_zero, // Zero a register
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// New TMS320C674x instructions
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TMS6_abs2, // Absolute Value With Saturation, Signed, Packed 16-bit
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TMS6_absdp, // Absolute Value, Double-Precision Floating-Point
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TMS6_abssp, // Absolute Value, Single-Precision Floating-Point
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TMS6_add4, // Add Without Saturation, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_addad, // Add Using Doubleword Addressing Mode
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TMS6_adddp, // Add Two Double-Precision Floating-Point Values
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TMS6_addkpc, // Add Signed 7-bit Constant to Program Counter
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TMS6_addsp, // Add Two Single-Precision Floating-Point Values
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TMS6_addsub, // Parallel ADD and SUB Operations On Common Inputs
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TMS6_addsub2, // Parallel ADD2 and SUB2 Operations On Common Inputs
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TMS6_andn, // Bitwise AND Invert
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TMS6_avg2, // Average, Signed, Packed 16-bit
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TMS6_avgu4, // Average, Unsigned, Packed 16-bit
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TMS6_bdec, // Branch and Decrement
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TMS6_bitc4, // Bit Count, Packed 8-bit
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TMS6_bitr, // Bit Reverse
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TMS6_bnop, // Branch With NOP
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TMS6_bpos, // Branch Positive
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TMS6_callp, // Call Using a Displacement
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TMS6_cmpeq2, // Compare for Equality, Packed 16-bit
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TMS6_cmpeq4, // Compare for Equality, Packed 8-bit
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TMS6_cmpeqdp, // Compare for Equality, Double-Precision Floating-Point Values
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TMS6_cmpeqsp, // Compare for Equality, Single-Precision Floating-Point Values
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TMS6_cmpgt2, // Compare for Greater Than, Packed 16-bit
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TMS6_cmpgtdp, // Compare for Greater Than, Double-Precision Floating-Point Values
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TMS6_cmpgtsp, // Compare for Greater Than, Single-Precision Floating-Point Values
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TMS6_cmpgtu4, // Compare for Greater Than, Unsigned, Packed 8-bit
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TMS6_cmplt2, // Compare for Less Than, Packed 16-bit
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TMS6_cmpltdp, // Compare for Less Than, Double-Precision Floating-Point Values
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TMS6_cmpltsp, // Compare for Less Than, Single-Precision Floating-Point Values
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TMS6_cmpltu4, // Compare for Less Than, Unsigned, Packed 8-bit
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TMS6_cmpy, // Complex Multiply Two Pairs, Signed, Packed 16-bit
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TMS6_cmpyr, // Complex Multiply Two Pairs, Signed, Packed 16-bit With Rounding
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TMS6_cmpyr1, // Complex Multiply Two Pairs, Signed, Packed 16-bit With Rounding
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TMS6_ddotp4, // Double Dot Product, Signed, Packed 16-Bit and Signed, Packed 8-Bit
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TMS6_ddotph2, // Double Dot Product, Two Pairs, Signed, Packed 16-Bit
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TMS6_ddotph2r, // Double Dot Product With Rounding, Two Pairs, Signed, Packed 16-Bit
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TMS6_ddotpl2, // Double Dot Product, Two Pairs, Signed, Packed 16-Bit
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TMS6_ddotpl2r, // Double Dot Product With Rounding, Two Pairs, Signed Packed 16-Bit
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TMS6_deal, // Deinterleave and Pack
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TMS6_dint, // Disable Interrupts and Save Previous Enable State
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TMS6_dmv, // Move Two Independent Registers to Register Pair
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TMS6_dotp2, // Dot Product, Signed, Packed 16-Bit
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TMS6_dotpn2, // Dot Product With Negate, Signed, Packed 16-Bit
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TMS6_dotpnrsu2, // Dot Product With Negate, Shift and Round, Signed by Unsigned, Packed 16-Bit
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TMS6_dotpnrus2, // Dot Product With Negate, Shift and Round, Unsigned by Signed, Packed 16-Bit
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TMS6_dotprsu2, // Dot Product With Shift and Round, Signed by Unsigned, Packed 16-Bit
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TMS6_dotprus2, // Dot Product With Shift and Round, Unsigned by Signed, Packed 16-Bit
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TMS6_dotpsu4, // Dot Product, Signed by Unsigned, Packed 8-Bit
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TMS6_dotpu4, // Dot Product, Unsigned, Packed 8-Bit
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TMS6_dotpus4, // Dot Product, Unsigned by Signed, Packed 8-Bit
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TMS6_dpack2, // Parallel PACK2 and PACKH2 Operations
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TMS6_dpackx2, // Parallel PACKLH2 Operations
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TMS6_dpint, // Convert Double-Precision Floating-Point Value to Integer
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TMS6_dpsp, // Convert Double-Precision Floating-Point Value to Single-Precision Floating-Point Value
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TMS6_dptrunc, // Convert Double-Precision Floating-Point Value to Integer With Truncation
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TMS6_gmpy, // Galois Field Multiply
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TMS6_gmpy4, // Galois Field Multiply, Packed 8-Bit
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TMS6_intdp, // Convert Signed Integer to Double-Precision Floating-Point Value
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TMS6_intdpu, // Convert Unsigned Integer to Double-Precision Floating-Point Value
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TMS6_intsp, // Convert Signed Integer to Single-Precision Floating-Point Value
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TMS6_intspu, // Convert Unsigned Integer to Single-Precision Floating-Point Value
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TMS6_lddw, // Load Doubleword From Memory With a 5-Bit Unsigned Constant Offset or Register Offset
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TMS6_ldndw, // Load Nonaligned Doubleword From Memory With Constant or Register Offset
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TMS6_ldnw, // Load Nonaligned Word From Memory With Constant or Register Offset
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TMS6_max2, // Maximum, Signed, Packed 16-Bit
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TMS6_maxu4, // Maximum, Unsigned, Packed 8-Bit
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TMS6_min2, // Minimum, Signed, Packed 16-Bit
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TMS6_minu4, // Minimum, Unsigned, Packed 8-Bit
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TMS6_mpy2, // Multiply Signed by Signed, 16 LSB x 16 LSB and 16 MSB x 16 MSB
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TMS6_mpy2ir, // Multiply Two 16-Bit x 32-Bit, Shifted by 15 to Produce a Rounded 32-Bit Result
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TMS6_mpy32, // Multiply Signed 32-Bit x Signed 32-Bit Into 32-Bit Result
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TMS6_mpy32su, // Multiply Signed 32-Bit x Unsigned 32-Bit Into Signed 64-Bit Result
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TMS6_mpy32u, // Multiply Unsigned 32-Bit x Unsigned 32-Bit Into Unsigned 64-Bit Result
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TMS6_mpy32us, // Multiply Unsigned 32-Bit x Signed 32-Bit Into Signed 64-Bit Result
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TMS6_mpydp, // Multiply Two Double-Precision Floating-Point Values
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TMS6_mpyhi, // Multiply 16 MSB x 32-Bit Into 64-Bit Result
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TMS6_mpyhir, // Multiply 16 MSB x 32-Bit, Shifted by 15 to Produce a Rounded 32-Bit Result
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TMS6_mpyi, // Multiply 32-Bit x 32-Bit Into 32-Bit Result
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TMS6_mpyid, // Multiply 32-Bit x 32-Bit Into 64-Bit Result
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TMS6_mpyih, // Multiply 32-Bit x 16-MSB Into 64-Bit Result
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TMS6_mpyihr, // Multiply 32-Bit x 16 MSB, Shifted by 15 to Produce a Rounded 32-Bit Result
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TMS6_mpyil, // Multiply 32-Bit x 16 LSB Into 64-Bit Result
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TMS6_mpyilr, // Multiply 32-Bit x 16 LSB, Shifted by 15 to Produce a Rounded 32-Bit Result
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TMS6_mpyli, // Multiply 16 LSB x 32-Bit Into 64-Bit Result
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TMS6_mpylir, // Multiply 16 LSB x 32-Bit, Shifted by 15 to Produce a Rounded 32-Bit Result
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TMS6_mpysp, // Multiply Two Single-Precision Floating-Point Values
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TMS6_mpysp2dp, // Multiply Two Single-Precision Floating-Point Values for Double-Precision Result
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TMS6_mpyspdp, // Multiply Single-Precision Floating-Point Value x Double-Precision Floating-Point Value
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TMS6_mpysu4, // Multiply Signed x Unsigned, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_mpyu4, // Multiply Unsigned x Unsigned, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_mpyus4, // Multiply Unsigned x Signed, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_mvd, // Move From Register to Register, Delayed
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TMS6_mvkl, // Move Signed Constant Into Register and Sign Extend
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TMS6_pack2, // Pack Two 16 LSBs Into Upper and Lower Register Halves
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TMS6_packh2, // Pack Two 16 MSBs Into Upper and Lower Register Halves
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TMS6_packh4, // Pack Four High Bytes Into Four 8-Bit Halfwords
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TMS6_packhl2, // Pack 16 MSB Into Upper and 16 LSB Into Lower Register Halves
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TMS6_packl4, // Pack Four Low Bytes Into Four 8-Bit Halfwords
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TMS6_packlh2, // Pack 16 LSB Into Upper and 16 MSB Into Lower Register Halves
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TMS6_rcpdp, // Double-Precision Floating-Point Reciprocal Approximation
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TMS6_rcpsp, // Single-Precision Floating-Point Reciprocal Approximation
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TMS6_rint, // Restore Previous Enable State
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TMS6_rotl, // Rotate Left
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TMS6_rpack2, // Shift With Saturation and Pack Two 16 MSBs Into Upper and Lower Register Halves
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TMS6_rsqrdp, // Double-Precision Floating-Point Square-Root Reciprocal Approximation
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TMS6_rsqrsp, // Single-Precision Floating-Point Square-Root Reciprocal Approximation
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TMS6_sadd2, // Add Two Signed 16-Bit Integers on Upper and Lower Register Halves With Saturation
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TMS6_saddsu2, // Add Two Signed and Unsigned 16-Bit Integers on Register Halves With Saturation
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TMS6_saddsub, // Parallel SADD and SSUB Operations On Common Inputs
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TMS6_saddsub2, // Parallel SADD2 and SSUB2 Operations On Common Inputs
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TMS6_saddu4, // Add With Saturation, Four Unsigned 8-Bit Pairs for Four 8-Bit Results
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TMS6_saddus2, // Add Two Unsigned and Signed 16-Bit Integers on Register Halves With Saturation
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TMS6_shfl, // Shuffle
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TMS6_shfl3, // 3-Way Bit Interleave On Three 16-Bit Values Into a 48-Bit Result
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TMS6_shlmb, // Shift Left and Merge Byte
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TMS6_shr2, // Arithmetic Shift Right, Signed, Packed 16-Bit
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TMS6_shrmb, // Shift Right and Merge Byte
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TMS6_shru2, // Arithmetic Shift Right, Unsigned, Packed 16-Bit
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TMS6_smpy2, // Multiply Signed by Signed, 16 LSB x 16 LSB and 16 MSB x 16 MSB With Left Shift and Saturation
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TMS6_smpy32, // Multiply Signed 32-Bit x Signed 32-Bit Into 64-Bit Result With Left Shift and Saturation
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TMS6_spack2, // Saturate and Pack Two 16 LSBs Into Upper and Lower Register Halves
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TMS6_spacku4, // Saturate and Pack Four Signed 16-Bit Integers Into Four Unsigned 8-Bit Halfwords
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TMS6_spdp, // Convert Single-Precision Floating-Point Value to Double-Precision Floating-Point Value
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TMS6_spint, // Convert Single-Precision Floating-Point Value to Integer
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TMS6_spkernel, // Software Pipelined Loop (SPLOOP) Buffer Operation Code Boundary
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TMS6_spkernelr, // Software Pipelined Loop (SPLOOP) Buffer Operation Code Boundary
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TMS6_sploop, // Software Pipelined Loop (SPLOOP) Buffer Operation
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TMS6_sploopd, // Software Pipelined Loop (SPLOOP) Buffer Operation With Delayed Testing
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TMS6_sploopw, // Software Pipelined Loop (SPLOOP) Buffer Operation With Delayed Testing and No Epilog
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TMS6_spmask, // Software Pipelined Loop (SPLOOP) Buffer Operation Load/Execution Control
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TMS6_spmaskr, // Software Pipelined Loop (SPLOOP) Buffer Operation Load/Execution Control
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TMS6_sptrunc, // Convert Single-Precision Floating-Point Value to Integer With Truncation
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TMS6_sshvl, // Variable Shift Left
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TMS6_sshvr, // Variable Shift Right
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TMS6_ssub2, // Subtract Two Signed 16-Bit Integers on Upper and Lower Register Halves With Saturation
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TMS6_stdw, // Store Doubleword to Memory With a 5-Bit Unsigned Constant Offset or Register Offset
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TMS6_stndw, // Store Nonaligned Doubleword to Memory With a 5-Bit Unsigned Constant Offset or Register Offset
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TMS6_stnw, // Store Nonaligned Word to Memory With a 5-Bit Unsigned Constant Offset or Register Offset
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TMS6_sub4, // Subtract Without Saturation, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_subabs4, // Subtract With Absolute Value, Four 8-Bit Pairs for Four 8-Bit Results
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TMS6_subdp, // Subtract Two Double-Precision Floating-Point Values
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TMS6_subsp, // Subtract Two Single-Precision Floating-Point Values
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TMS6_swap2, // Swap Bytes in Upper and Lower Register Halves
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TMS6_swap4, // Swap Byte Pairs in Upper and Lower Register Halves
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TMS6_swe, // Software Exception
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TMS6_swenr, // Software Exception, no Return
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TMS6_unpkhu4, // Unpack 16 MSB Into Two Lower 8-Bit Halfwords of Upper and Lower Register Halves
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TMS6_unpklu4, // Unpack 16 LSB Into Two Lower 8-Bit Halfwords of Upper and Lower Register Halves
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TMS6_xormpy, // Galois Field Multiply With Zero Polynomial
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TMS6_xpnd2, // Expand Bits to Packed 16-Bit Masks
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TMS6_xpnd4, // Expand Bits to Packed 8-Bit Masks
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TMS6_last,
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};
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#endif
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