688 lines
18 KiB
C++
688 lines
18 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-99 by Ilfak Guilfanov.
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* ALL RIGHTS RESERVED.
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* E-mail: ig@datarescue.com
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*
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*
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*/
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#include "tms320c54.hpp"
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#include "notify_codes.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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#include <ieee.h>
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int data_id;
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//--------------------------------------------------------------------------
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static const char *const register_names[] =
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{
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"PC", // program counter
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"A", // accumulator
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"B", // accumulator
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// flags
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"ASM", // 5-bit accumulator shift mode field in ST1
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"ARP", // auxiliary register pointer
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"TS", // shift value (bits 5-0 of T)
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"OVB",
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"OVA",
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"C",
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"TC",
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"CMPT",
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"FRCT",
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"C16",
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"SXM",
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"OVM",
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"INTM",
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"HM",
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"XF",
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"BRAF",
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// CPU memory mapped registers
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"IMR",
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"IFR",
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"ST0",
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"ST1",
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"AL",
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"AH",
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"AG",
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"BL",
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"BH",
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"BG",
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"T", // temporary register
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"TRN", // transition register
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"AR0",
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"AR1",
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"AR2",
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"AR3",
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"AR4",
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"AR5",
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"AR6",
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"AR7",
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"SP", // stack pointer
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"BK",
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"BRC",
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"RSA",
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"REA",
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"PMST",
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// segment registers
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"XPC", // program counter extension register
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"CPL", // compiler mode
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"DP", // data page pointer
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"cs","ds", // virtual registers for code and data segments
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};
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//--------------------------------------------------------------------------
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static const uchar retcode_0[] = { 0xF4, 0xE4 }; // fret
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static const uchar retcode_1[] = { 0xF6, 0xE4 }; // fretd
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static const uchar retcode_2[] = { 0xF4, 0xE5 }; // frete
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static const uchar retcode_3[] = { 0xF6, 0xE5 }; // freted
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static const uchar retcode_4[] = { 0xFC }; // rc
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static const uchar retcode_5[] = { 0xFE }; // rcd
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static const uchar retcode_6[] = { 0xFC, 0x00 }; // ret
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static const uchar retcode_7[] = { 0xFE, 0x00 }; // retd
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static const uchar retcode_8[] = { 0xF4, 0xEA }; // rete
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static const uchar retcode_9[] = { 0xF6, 0xEA }; // reted
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static const uchar retcode_10[] = { 0xF4, 0x9A }; // retf
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static const uchar retcode_11[] = { 0xF6, 0x9A }; // retfd
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_0), retcode_0 },
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{ sizeof(retcode_1), retcode_1 },
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{ sizeof(retcode_2), retcode_2 },
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{ sizeof(retcode_3), retcode_3 },
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{ sizeof(retcode_4), retcode_4 },
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{ sizeof(retcode_5), retcode_5 },
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{ sizeof(retcode_6), retcode_6 },
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{ sizeof(retcode_7), retcode_7 },
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{ sizeof(retcode_8), retcode_8 },
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{ sizeof(retcode_9), retcode_9 },
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{ sizeof(retcode_10), retcode_10 },
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{ sizeof(retcode_11), retcode_11 },
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{ 0, NULL }
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};
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//-----------------------------------------------------------------------
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// TMS320C54 ASM
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//-----------------------------------------------------------------------
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static const asm_t fasm =
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{
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AS_N2CHR|ASH_HEXF0|ASD_DECF0|ASO_OCTF5|ASB_BINF0|AS_ONEDUP|AS_COLON,
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0,
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"ASM500",
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0,
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NULL, // header lines
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NULL, // org
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".end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".pstring", // ascii string directive
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".word", // byte directive
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".long", // word directive
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NULL, // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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".float", // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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".space 16*%s",// uninited arrays
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".asg", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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".global", // "public" name keyword
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NULL, // "weak" name keyword
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".ref", // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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".align", // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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AS2_STRINV // invert string byte order
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};
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//-----------------------------------------------------------------------
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// GNU ASM
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//-----------------------------------------------------------------------
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static const asm_t gnuasm =
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{
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AS_N2CHR|ASH_HEXF3|ASD_DECF0|ASO_OCTF5|ASB_BINF0|AS_ONEDUP|AS_COLON|AS_ASCIIC,
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0,
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"GNU assembler",
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0,
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NULL, // header lines
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NULL, // org
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".end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".pstring", // ascii string directive
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".word", // byte directive
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".long", // word directive
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NULL, // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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".float", // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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".zero 2*%s", // uninited arrays
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".asg", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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".global", // "public" name keyword
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".weak", // "weak" name keyword
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".extern", // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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".align", // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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AS2_STRINV, // invert string byte order
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NULL, // cmnt2
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NULL, // low8
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NULL, // high8
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NULL, // low16
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NULL, // high16
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"#include \"%s\"", // a_include_fmt
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};
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static const asm_t *const asms[] = { &fasm, &gnuasm, NULL };
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//--------------------------------------------------------------------------
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const char *tms320c54_t::find_sym(ea_t address)
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{
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const ioport_t *port = find_ioport(ioh.ports, address);
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return port ? port->name.c_str() : NULL;
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}
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//----------------------------------------------------------------------
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void tms320c54_t::apply_symbols(void)
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{
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insn_t dummy;
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for ( int i=0; i < ioh.ports.size(); i++ )
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{
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ea_t ea = calc_data_mem(dummy, ioh.ports[i].address, false);
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segment_t *s = getseg(ea);
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if ( s == NULL || s->type != SEG_IMEM )
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continue;
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create_byte(ea, 1);
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const char *name = ioh.ports[i].name.c_str();
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if ( !set_name(ea, name, SN_NOCHECK|SN_NOWARN|SN_NODUMMY) )
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set_cmt(ea, name, 0);
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}
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}
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//--------------------------------------------------------------------------
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inline void swap(unsigned char &c1, unsigned char &c2)
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{
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unsigned char tmp = c1;
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c1 = c2;
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c2 = tmp;
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}
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fpvalue_error_t idaapi tms_realcvt(void *m, fpvalue_t *e, ushort swt)
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{
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fpvalue_error_t ret;
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switch ( swt )
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{
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case 1: // float to e
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{
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unsigned char p[4];
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memcpy(p, m, 4);
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swap(p[0], p[1]);
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swap(p[2], p[3]);
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ret = ieee_realcvt(p, e, swt);
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break;
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}
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case 011: // float output //-V536 octal
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{
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ret = ieee_realcvt(m, e, swt);
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unsigned char *p = (unsigned char*)m;
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swap(p[0], p[1]);
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swap(p[2], p[3]);
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break;
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}
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default:
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ret = ieee_realcvt(m, e, swt);
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break;
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}
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return ret;
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}
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//--------------------------------------------------------------------------
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static int idaapi choose_device(int, form_actions_t &fa)
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{
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tms320c54_t &pm = *(tms320c54_t *)fa.get_ud();
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if ( choose_ioport_device(&pm.ioh.device, cfgname) )
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pm.ioh.set_device_name(pm.ioh.device.c_str(), IORESP_ALL);
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return 0;
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}
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//--------------------------------------------------------------------------
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const char *tms320c54_t::set_idp_options(
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const char *keyword,
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int value_type,
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const void * value,
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bool idb_loaded)
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{
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if ( keyword == NULL )
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{
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static const char form[] =
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"HELP\n"
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"TMS320C54 specific options\n"
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"\n"
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" Use I/O definitions\n"
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"\n"
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" If this option is on, IDA will use I/O definitions\n"
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" from the configuration file into a macro instruction.\n"
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"\n"
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" Detect memory mapped registers\n"
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"\n"
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" If this option is on, IDA will replace addresses\n"
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" by an equivalent memory mapped register.\n"
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"\n"
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" Device name\n"
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"\n"
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" Choose the exact device name for the processor.\n"
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" If you don't see the name you want, you can add\n"
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" a section about it to the tms320c54.cfg file\n"
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"\n"
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" Data segment address\n"
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"\n"
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" The data segment linear address.\n"
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"\n"
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"ENDHELP\n"
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"TMS320C54 specific options\n"
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"%*\n"
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" <Use ~I~/O definitions:C>\n"
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" <Detect memory mapped ~r~egisters:C>>\n"
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"\n"
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" <~C~hoose device name:B:0:::>\n"
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"\n"
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" <~D~ata segment address:N::18::>\n"
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"\n";
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CASSERT(sizeof(idpflags) == sizeof(ushort));
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CASSERT(sizeof(dataseg) == sizeof(ea_t));
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ask_form(form, this, &idpflags, choose_device, &dataseg);
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}
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else
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{
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if ( strcmp(keyword, "TMS320C54_DSEG") == 0 )
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{
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if ( value_type != IDPOPT_NUM )
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return IDPOPT_BADTYPE;
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dataseg = *(uval_t *)value;
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}
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if ( value_type != IDPOPT_BIT )
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return IDPOPT_BADTYPE;
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if ( strcmp(keyword, "TMS320C54_IO") == 0 )
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{
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setflag(idpflags, TMS320C54_IO, *(int*)value != 0);
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}
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else if ( strcmp(keyword, "TMS320C54_MMR") == 0 )
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{
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setflag(idpflags, TMS320C54_MMR, *(int*)value != 0);
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}
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else
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{
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return IDPOPT_BADKEY;
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}
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}
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if ( idb_loaded )
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{
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save_idpflags();
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save_dataseg();
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}
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return IDPOPT_OK;
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}
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//--------------------------------------------------------------------------
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static const proctype_t ptypes[] =
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{
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TMS320C54
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};
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void tms320c54_t::load_from_idb()
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{
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ptype = ptypes[ph.get_proc_index()];
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ioh.restore_device();
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if ( ioh.device.empty() )
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{
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read_ioports(&ioh.ports, &ioh.device, cfgname);
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helper.supset(-1, ioh.device.c_str());
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}
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inf_set_wide_high_byte_first(false);
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idpflags = (ushort)helper.altval(-1);
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dataseg = helper.altval(0);
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}
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(tms320c54_t));
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return 0;
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}
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//--------------------------------------------------------------------------
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ssize_t idaapi tms320c54_t::on_event(ssize_t msgid, va_list va)
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{
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#ifdef _MSC_VER
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#pragma warning(push)
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#pragma warning(disable : 4063)
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#endif
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int code = 0;
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switch ( msgid ) // Cast to avoid lint complaining.
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{
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case processor_t::ev_init:
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helper.create(PROCMOD_NODE_NAME);
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inf_set_be(true); // MSB first
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inf_set_wide_high_byte_first(true);
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dataseg = helper.altval(0);
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile: // new file loaded
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read_ioports(&ioh.ports, &ioh.device, cfgname);
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helper.supset(-1, ioh.device.c_str());
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save_idpflags();
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save_dataseg();
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inf_set_wide_high_byte_first(false);
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{
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segment_t *s = get_first_seg();
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if ( s != NULL )
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apply_symbols();
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while ( s != NULL )
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{
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qstring sclas;
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get_segm_class(&sclas, s);
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for ( int i = XPC; i <= rVds; i++ )
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set_default_sreg_value(s, i, BADSEL);
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if ( sclas == "CODE" )
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set_default_sreg_value(s, XPC, s->start_ea >> 16);
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s = get_next_seg(s->start_ea);
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}
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}
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break;
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case tms320c54_module_t::ev_set_dataseg:
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dataseg = va_arg(va, ea_t);
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save_dataseg();
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break;
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case processor_t::ev_oldfile: // old file loaded
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ioh.upgrade_device_index();
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//fall through
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case processor_t::ev_ending_undo:
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load_from_idb();
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break;
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case processor_t::ev_newbinary:
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inf_set_wide_high_byte_first(true);
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break;
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case processor_t::ev_endbinary:
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inf_set_wide_high_byte_first(false);
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break;
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case processor_t::ev_newprc: // new processor type
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{
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ptype = ptypes[va_arg(va, int)];
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// bool keep_cfg = va_argi(va, bool);
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switch ( ptype )
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{
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case TMS320C54:
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break;
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default:
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error("interr: setprc");
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}
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}
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break;
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case processor_t::ev_newasm: // new assembler type
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break;
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case processor_t::ev_creating_segm: // new segment
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break;
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case processor_t::ev_is_basic_block_end:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return is_basic_block_end(*insn) ? 1 : -1;
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}
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case processor_t::ev_is_sane_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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int no_crefs = va_arg(va, int);
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// add 0, a is not a sane instruction without crefs to it
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code = no_crefs && get_wide_byte(insn->ea) == 0 ? -1 : 1;
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}
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break;
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_segend:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segend(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_assumes:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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assumes(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_ana_insn:
|
|
{
|
|
insn_t *out = va_arg(va, insn_t *);
|
|
return ana(out);
|
|
}
|
|
|
|
case processor_t::ev_emu_insn:
|
|
{
|
|
const insn_t *insn = va_arg(va, const insn_t *);
|
|
return emu(*insn) ? 1 : -1;
|
|
}
|
|
|
|
case processor_t::ev_out_insn:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
out_insn(*ctx);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_out_operand:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
const op_t *op = va_arg(va, const op_t *);
|
|
return out_opnd(*ctx, *op) ? 1 : -1;
|
|
}
|
|
|
|
case processor_t::ev_realcvt:
|
|
{
|
|
void *m = va_arg(va, void *);
|
|
fpvalue_t *e = va_arg(va, fpvalue_t *);
|
|
uint16 swt = va_argi(va, uint16);
|
|
fpvalue_error_t code1 = tms_realcvt(m, e, swt);
|
|
return code1 == REAL_ERROR_OK ? 1 : code1;
|
|
}
|
|
|
|
case processor_t::ev_create_func_frame:
|
|
{
|
|
func_t *pfn = va_arg(va, func_t *);
|
|
create_func_frame(pfn);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_get_frame_retsize:
|
|
{
|
|
int *frsize = va_arg(va, int *);
|
|
const func_t *pfn = va_arg(va, const func_t *);
|
|
*frsize = tms_get_frame_retsize(pfn);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_gen_stkvar_def:
|
|
{
|
|
outctx_t *ctx = va_arg(va, outctx_t *);
|
|
const member_t *mptr = va_arg(va, const member_t *);
|
|
sval_t v = va_arg(va, sval_t);
|
|
gen_stkvar_def(*ctx, mptr, v);
|
|
return 1;
|
|
}
|
|
|
|
case processor_t::ev_set_idp_options:
|
|
{
|
|
const char *keyword = va_arg(va, const char *);
|
|
int value_type = va_arg(va, int);
|
|
const char *value = va_arg(va, const char *);
|
|
const char **errmsg = va_arg(va, const char **);
|
|
bool idb_loaded = va_argi(va, bool);
|
|
const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
|
|
if ( ret == IDPOPT_OK )
|
|
return 1;
|
|
if ( errmsg != NULL )
|
|
*errmsg = ret;
|
|
return -1;
|
|
}
|
|
|
|
case processor_t::ev_is_align_insn:
|
|
{
|
|
ea_t ea = va_arg(va, ea_t);
|
|
return is_align_insn(ea);
|
|
}
|
|
|
|
|
|
default:
|
|
break;
|
|
}
|
|
#ifdef _MSC_VER
|
|
#pragma warning(pop)
|
|
#endif
|
|
return code;
|
|
}
|
|
|
|
//-----------------------------------------------------------------------
|
|
#define FAMILY "TMS320C54x Series:"
|
|
static const char *const shnames[] =
|
|
{
|
|
"TMS32054",
|
|
NULL
|
|
};
|
|
static const char *const lnames[] =
|
|
{
|
|
FAMILY"Texas Instruments TMS320C54",
|
|
NULL
|
|
};
|
|
|
|
//-----------------------------------------------------------------------
|
|
// Processor Definition
|
|
//-----------------------------------------------------------------------
|
|
processor_t LPH =
|
|
{
|
|
IDP_INTERFACE_VERSION, // version
|
|
PLFM_TMS320C54, // id
|
|
// flag
|
|
PRN_HEX
|
|
| PR_SEGS
|
|
| PR_SGROTHER
|
|
| PR_ALIGN,
|
|
// flag2
|
|
PR2_MAPPINGS // use memory mapping
|
|
| PR2_REALCVT // the module has 'realcvt' event implementation
|
|
| PR2_IDP_OPTS, // the module has processor-specific configuration options
|
|
16, // 16 bits in a byte for code segments
|
|
16, // 16 bits in a byte for other segments
|
|
|
|
shnames,
|
|
lnames,
|
|
|
|
asms,
|
|
|
|
notify,
|
|
|
|
register_names, // Register names
|
|
qnumber(register_names), // Number of registers
|
|
|
|
XPC, // first
|
|
rVds, // last
|
|
1, // size of a segment register
|
|
rVcs, rVds,
|
|
|
|
NULL, // No known code start sequences
|
|
retcodes,
|
|
|
|
TMS320C54_null,
|
|
TMS320C54_last,
|
|
Instructions, // instruc
|
|
0, // int tbyte_size; -- doesn't exist
|
|
{ 0,7,15,19 }, // char real_width[4];
|
|
// number of symbols after decimal point
|
|
// 2byte float (0-does not exist)
|
|
// normal float
|
|
// normal double
|
|
// long double
|
|
TMS320C54_ret, // Icode of return instruction. It is ok to give any of possible return instructions
|
|
};
|