615 lines
16 KiB
C++
615 lines
16 KiB
C++
/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-99 by Ilfak Guilfanov.
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* ALL RIGHTS RESERVED.
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* E-mail: ig@datarescue.com
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*
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*
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*/
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#include <math.h>
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#include "tms320c3x.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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#include <ieee.h>
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int data_id;
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static const char *const register_names[] =
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{
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// Extended-precision registers
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"r0",
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"r1",
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"r2",
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"r3",
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"r4",
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"r5",
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"r6",
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"r7",
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// Auxiliary registers
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"ar0",
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"ar1",
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"ar2",
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"ar3",
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"ar4",
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"ar5",
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"ar6",
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"ar7",
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// Index register n
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"ir0",
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"ir1",
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"bk", // Block-size register
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"sp", // System-stack pointer
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"st", // Status register
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"ie", // CPU/DMA interrupt-enable register
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"if", // CPU interrupt flag
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"iof", // I/O flag
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"rs", // Repeat start-address
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"re", // Repeat end-address
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"rc", // Repeat counter
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// segment registers
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"dp", // Data-page pointer
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"cs","ds", // virtual registers for code and data segments
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};
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//--------------------------------------------------------------------------
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static const uchar retcode_0[] = { 0x78, 0x80, 0x00, 0x00 }; // 0x78800000 //retsu
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static const uchar retcode_1[] = { 0x78, 0x00, 0x00, 0x00 }; // 0x78000000 //retiu
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_0), retcode_0 },
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{ sizeof(retcode_1), retcode_1 },
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{ 0, NULL }
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};
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//-----------------------------------------------------------------------
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// TMS320C3X ASM
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//-----------------------------------------------------------------------
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static const asm_t fasm =
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{
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AS_N2CHR|ASH_HEXF0|ASD_DECF0|ASO_OCTF5|ASB_BINF0|AS_ONEDUP|AS_COLON,
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0,
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"ASM500",
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0,
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NULL, // header lines
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NULL, // org
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".end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".pstring", // ascii string directive
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".word", // byte directive
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".long", // word directive
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NULL, // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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".float", // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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".space 32*%s",// uninited arrays
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".asg", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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".global", // "public" name keyword
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NULL, // "weak" name keyword
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".ref", // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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".align", // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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AS2_BYTE1CHAR,// one character per byte
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};
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//-----------------------------------------------------------------------
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// GNU ASM
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//-----------------------------------------------------------------------
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static const asm_t gnuasm =
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{
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AS_N2CHR|ASH_HEXF3|ASD_DECF0|ASO_OCTF5|ASB_BINF0|AS_ONEDUP|AS_COLON|AS_ASCIIC,
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0,
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"GNU assembler",
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0,
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NULL, // header lines
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NULL, // org
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".end", // end
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"'\"", // special symbols in char and string constants
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".pstring", // ascii string directive
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".word", // byte directive
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".long", // word directive
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NULL, // double words
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NULL, // qwords
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NULL, // oword (16 bytes)
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".float", // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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".zero 2*%s", // uninited arrays
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".asg", // equ
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NULL, // 'seg' prefix (example: push seg seg001)
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"$", // current IP (instruction pointer)
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NULL, // func_header
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NULL, // func_footer
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".global", // "public" name keyword
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".weak", // "weak" name keyword
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".extern", // "extrn" name keyword
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NULL, // "comm" (communal variable)
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NULL, // get_type_name
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".align", // "align" keyword
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"~", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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AS2_BYTE1CHAR,// one character per byte
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NULL, // cmnt2
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NULL, // low8
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NULL, // high8
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NULL, // low16
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NULL, // high16
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"#include \"%s\"", // a_include_fmt
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};
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static const asm_t *const asms[] = { &fasm, &gnuasm, NULL };
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//--------------------------------------------------------------------------
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bool tms320c3x_iohandler_t::entry_processing(ea_t &ea, const char *name, const char *cmt)
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{
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set_name(ea, name, SN_NODUMMY);
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set_cmt(ea, cmt, 0);
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return true;
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}
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//----------------------------------------------------------------------
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bool tms320c3x_t::select_device(int lrespect_info)
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{
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char cfgfile[QMAXFILE];
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ioh.get_cfg_filename(cfgfile, sizeof(cfgfile));
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if ( !choose_ioport_device(&ioh.device, cfgfile) )
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{
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ioh.device = NONEPROC;
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return false;
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}
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if ( !ioh.display_infotype_dialog(IORESP_ALL, &lrespect_info, cfgfile) )
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return false;
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ioh.set_device_name(ioh.device.c_str(), lrespect_info);
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return true;
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}
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//----------------------------------------------------------------------
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static float conv32(int32 A) // convertion of 32 bit TMS float -> double
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{
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int32 mask, f, i, s;
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float mant;
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int8 e;
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// exponent, signed 8 bit
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e = A >> 24;
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// sign, boolean 1 bit
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s = (A & 0x00800000) >> 23;
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// fraction, unsigned 23 bit
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f = A & 0x007FFFFF;
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// NaN, Inf
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if ( (e & 0xFF) == 0xFF )
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{
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uint32 i32 = (s << 31) | (0xFF << 23) | f;
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return *reinterpret_cast<float*>(&i32);
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}
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if ( s )
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{
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f ^= 0x007FFFFF;
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f++;
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}
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mant = 1; // mantissa (1<M<2)
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mask = 0x00800000; // bit mask of the current bit,
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// started from the sign position
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for ( i = 0; i <= 23; i++ )
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{
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if ( f & mask )
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mant += (float)pow(double(2), -i);
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mask >>= 1;
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}
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if ( e == -128 && f == 0 && s == 0 )
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mant = 0;
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return float(pow(double(-1), s) * mant * pow(double(2), e));
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}
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//----------------------------------------------------------------------
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// A short floating-point format for immediate floating-point operands, consisting
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// of a 4-bit exponent, a sign bit, and an 11-bit fraction
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// x = 01.f * 2^e if s = 0
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// x = 10.f * 2^e if s = 1
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// x = 0 if e = -8
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static float conv16(int16 A) // Convertion of 16 bit TMS float to double
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{
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int16 mask, f, i, s;
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float mant;
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int8 e;
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// exponent, signed 4 bit
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e = A >> 12;
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// sign, boolean 1 bit
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s = (A & 0x0800) >> 11;
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// fraction, unsigned 11 bit
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f = A & 0x07FF;
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// Apparently the 16-bit format does not include
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// NaN of Inf at all (the exponent is too small anyway);
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// though this is a guess by omission (the documentation
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// mention appropriate conversions for 32-bits but not for 16-bits).
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// I think the 16-bit format is intended for short immediate values
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// rather than FPU operations, so it makes some sense.
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//
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// Therefore, no account for NaN of Inf is done in the 16-bit format.
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if ( s )
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{
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f ^= 0x07FF;
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f++;
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}
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mant = 1; // mantissa (1<M<2)
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mask = 0x0800; // bit mask for the current bit
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for ( i = 0; i <= 11; i++ )
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{
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if ( f & mask )
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mant += (float)pow(double(2), -i);
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mask >>= 1;
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}
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if ( e == -8 && f == 0 && s == 0 )
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mant = 0;
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return float(pow(double(-1), s) * mant * pow(double(2), e));
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}
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//--------------------------------------------------------------------------
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//lint -esym(818, m)
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fpvalue_error_t idaapi tms_realcvt(void *m, fpvalue_t *e, ushort swt)
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{
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fpvalue_error_t ret;
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int32 A;
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int16 B;
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union
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{
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float pfl;
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int32 pint;
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};
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switch ( swt )
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{
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case 0: // TmsFloat 16bit to e
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memcpy(&B, m, 2);
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pfl = conv16(B);
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pint = swap32(pint);
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ret = ieee_realcvt(&pint, e, 1);
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break;
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case 1: // TmsFloat 32bit to e
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memcpy(&A, m, 4);
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pfl = conv32(A);
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pint = swap32(pint);
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ret = ieee_realcvt(&pint, e, 1);
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break;
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default:
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msg("real_cvt_error swt = %d \n", swt);
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return REAL_ERROR_FORMAT;
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}
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return ret;
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}
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//--------------------------------------------------------------------------
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const char *tms320c3x_t::set_idp_options(
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const char *keyword,
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int /*value_type*/,
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const void * /*value*/,
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bool /*idb_loaded*/)
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{
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if ( keyword != NULL )
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return IDPOPT_BADKEY;
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select_device(IORESP_PORT|IORESP_INT);
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return IDPOPT_OK;
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}
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//----------------------------------------------------------------------
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void tms320c3x_t::load_from_idb()
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{
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inf_set_wide_high_byte_first(false);
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ioh.restore_device();
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}
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(tms320c3x_t));
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return 0;
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}
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//----------------------------------------------------------------------
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ssize_t idaapi tms320c3x_t::on_event(ssize_t msgid, va_list va)
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{
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int code = 0;
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switch ( msgid )
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{
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case processor_t::ev_init:
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helper.create(PROCMOD_NODE_NAME);
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inf_set_be(true); // MSB first
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inf_set_wide_high_byte_first(true);
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init_analyzer();
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile: // new file loaded
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inf_set_wide_high_byte_first(false);
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if ( inf_like_binary() )
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{
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segment_t *s0 = get_first_seg();
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if ( s0 != NULL )
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{
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set_segm_name(s0, "CODE");
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segment_t *s1 = get_next_seg(s0->start_ea);
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for ( int i = dp; i <= rVds; i++ )
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{
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set_default_sreg_value(s0, i, BADSEL);
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set_default_sreg_value(s1, i, BADSEL);
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}
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}
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select_device(IORESP_ALL);
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}
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break;
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case processor_t::ev_ending_undo:
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case processor_t::ev_oldfile: // old file loaded
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load_from_idb();
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break;
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case processor_t::ev_is_basic_block_end:
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{
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const insn_t &insn = *va_arg(va, const insn_t *);
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return is_basic_block_end(insn) ? 1 : 0;
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}
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case processor_t::ev_out_mnem:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_mnem(*ctx);
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return 1;
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}
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_segend:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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segend(*ctx, seg);
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return 1;
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}
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case processor_t::ev_out_assumes:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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assumes(*ctx);
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return 1;
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}
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case processor_t::ev_ana_insn:
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{
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insn_t *out = va_arg(va, insn_t *);
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return ana(out);
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}
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case processor_t::ev_emu_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return emu(*insn) ? 1 : -1;
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}
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case processor_t::ev_out_insn:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_insn(*ctx);
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return 1;
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}
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case processor_t::ev_out_operand:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const op_t *op = va_arg(va, const op_t *);
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return out_opnd(*ctx, *op) ? 1 : -1;
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}
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case processor_t::ev_can_have_type:
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{
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const op_t *op = va_arg(va, const op_t *);
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return can_have_type(*op) ? 1 : -1;
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}
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case processor_t::ev_realcvt:
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{
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void *m = va_arg(va, void *);
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fpvalue_t *e = va_arg(va, fpvalue_t *);
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uint16 swt = va_argi(va, uint16);
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fpvalue_error_t code1 = tms_realcvt(m, e, swt);
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return code1 == REAL_ERROR_OK ? 1 : code1;
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}
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case processor_t::ev_create_func_frame:
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{
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func_t *pfn = va_arg(va, func_t *);
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create_func_frame(pfn);
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return 1;
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}
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case processor_t::ev_gen_stkvar_def:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const member_t *mptr = va_arg(va, const member_t *);
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sval_t v = va_arg(va, sval_t);
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gen_stkvar_def(*ctx, mptr, v);
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return 1;
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}
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case processor_t::ev_set_idp_options:
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{
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const char *keyword = va_arg(va, const char *);
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int value_type = va_arg(va, int);
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const char *value = va_arg(va, const char *);
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const char **errmsg = va_arg(va, const char **);
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bool idb_loaded = va_argi(va, bool);
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const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
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if ( ret == IDPOPT_OK )
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return 1;
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if ( errmsg != NULL )
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*errmsg = ret;
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return -1;
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}
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case processor_t::ev_is_align_insn:
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{
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ea_t ea = va_arg(va, ea_t);
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return is_align_insn(ea);
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}
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default:
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break;
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}
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return code;
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}
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//-----------------------------------------------------------------------
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#define FAMILY "TMS320C3x Series:"
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static const char *const shnames[] =
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{
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"TMS320C3",
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NULL
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};
|
|
static const char *const lnames[] =
|
|
{
|
|
FAMILY"Texas Instruments TMS320C3X",
|
|
NULL
|
|
};
|
|
|
|
//-----------------------------------------------------------------------
|
|
// Processor Definition
|
|
//-----------------------------------------------------------------------
|
|
processor_t LPH =
|
|
{
|
|
IDP_INTERFACE_VERSION, // version
|
|
PLFM_TMS320C3, // id
|
|
// flag
|
|
PRN_HEX
|
|
| PR_SEGS
|
|
| PR_SGROTHER
|
|
| PR_ALIGN
|
|
| PR_USE32
|
|
| PR_DEFSEG32
|
|
| PR_DELAYED,
|
|
// flag2
|
|
PR2_REALCVT // the module has 'realcvt' event implementation
|
|
| PR2_IDP_OPTS, // the module has processor-specific configuration options
|
|
32, // 32 bits in a byte for code segments
|
|
32, // 32 bits in a byte for other segments
|
|
|
|
shnames,
|
|
lnames,
|
|
|
|
asms,
|
|
|
|
notify,
|
|
|
|
register_names, // Register names
|
|
qnumber(register_names), // Number of registers
|
|
|
|
dp, // first
|
|
rVds, // last
|
|
1, // size of a segment register
|
|
rVcs, rVds,
|
|
|
|
NULL, // No known code start sequences
|
|
retcodes,
|
|
|
|
TMS320C3X_null,
|
|
TMS320C3X_last,
|
|
Instructions, // instruc
|
|
0, // int tbyte_size; -- doesn't exist
|
|
{ 4,7,15,19 }, // char real_width[4];
|
|
// number of symbols after decimal point
|
|
// 2byte float (0-does not exist)
|
|
// normal float
|
|
// normal double
|
|
// long double
|
|
TMS320C3X_RETSU, // Icode of return instruction. It is ok to give any of possible return instructions
|
|
};
|