135 lines
3.4 KiB
C++
135 lines
3.4 KiB
C++
// $Id: ins.hpp,v 1.6 2000/11/06 22:11:16 jeremy Exp $
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//
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// Copyright (c) 2000 Jeremy Cooper. All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. All advertising materials mentioning features or use of this software
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// must display the following acknowledgement:
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// This product includes software developed by Jeremy Cooper.
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// 4. The name of the author may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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// OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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// IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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// THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// IDA TMS320C1X processor module.
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// Software representation of TMS320C1X instructions.
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//
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#ifndef _IDP_TMS320C1X_INS_H
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#define _IDP_TMS320C1X_INS_H
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enum nameNum
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{
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// Accumulator Memory Reference Instructions
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I__FIRST = 0,
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I_ABS = 0,
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I_ADD,
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I_ADDH,
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I_ADDS,
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I_AND,
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I_LAC,
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I_LACK,
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I_OR,
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I_SACH,
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I_SACL,
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I_SUB,
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I_SUBC,
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I_SUBH,
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I_SUBS,
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I_XOR,
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I_ZAC,
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I_ZALH,
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I_ZALS,
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// Auxiliary Register and Data Page Pointer Instructions
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I_LAR,
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I_LARK,
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I_LARP,
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I_LDP,
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I_LDPK,
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I_MAR,
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I_SAR,
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// T Register, P Register, and Multiply Instructions
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I_APAC,
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I_LT,
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I_LTA,
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I_LTD,
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I_MPY,
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I_MPYK,
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I_PAC,
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I_SPAC,
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// Branch/Call Instructions
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I_B,
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I_BANZ,
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I_BGEZ,
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I_BGZ,
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I_BIOZ,
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I_BLEZ,
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I_BLZ,
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I_BNZ,
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I_BV,
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I_BZ,
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I_CALA,
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I_CALL,
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I_RET,
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// Control Instructions
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I_DINT,
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I_EINT,
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I_LST,
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I_NOP,
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I_POP,
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I_PUSH,
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I_ROVM,
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I_SOVM,
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I_SST,
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// I/O and Data Memory Instructions
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I_DMOV,
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I_IN,
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I_OUT,
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I_TBLR,
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I_TBLW,
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I__LAST
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};
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//
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// TMS320C1X register phrases.
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// These are used to represent instruction operands that are not either
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// immediate values or registers.
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//
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enum regPhrase
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{
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IPH_AR, // Dereference current aux register
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IPH_AR_INCR, // Dereference current aux register and post-increment
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IPH_AR_DECR, // Dereference current aux register and post-decrement
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};
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//
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// Auxilliary instruction information.
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// This is information that this processor module can add to the instruction,
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// only to be examined and consumed by the processor module itself.
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//
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#define IX_DATA_PAGE_KNOWN 0x8000 // The current data page is known
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#define IX_DATA_PAGE(x) ((x) & 0x1) // Retrieves the known data page
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extern const instruc_t Instructions[];
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#endif // _IDP_TMS320C1X_INS_H
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