359 lines
8.2 KiB
C++
359 lines
8.2 KiB
C++
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#include "m7700.hpp"
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//----------------------------------------------------------------------
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class out_m7700_t : public outctx_t
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{
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out_m7700_t(void) = delete; // not used
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m7700_t &pm() { return *static_cast<m7700_t *>(procmod); }
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public:
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void outreg(const int n) { out_register(ph.reg_names[n]); }
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void outaddr(const op_t &op, const bool replace_with_label = true);
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void outdispl(const op_t &op);
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bool bitmask2list(const op_t &op);
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bool out_operand(const op_t &x);
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void out_insn(void);
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void out_proc_mnem(void);
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};
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CASSERT(sizeof(out_m7700_t) == sizeof(outctx_t));
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DECLARE_OUT_FUNCS(out_m7700_t)
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//--------------------------------------------------------------------------
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void out_m7700_t::outaddr(const op_t &op, const bool replace_with_label)
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{
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bool ind = is_addr_ind(op); // is operand indirect ?
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if ( ind )
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out_symbol('(');
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// if addressing mode is direct and the value of DR is unknown,
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// we have to print DR:x (where x is the "indexed" value)
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if ( is_addr_dr_rel(op) && get_sreg(insn.ea, rDR) == BADSEL )
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{
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outreg(rDR);
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out_symbol(':');
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out_value(op, OOF_ADDR | OOFS_NOSIGN | OOFW_32);
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}
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// otherwise ...
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else if ( !replace_with_label
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|| !out_name_expr(op, to_ea(insn.cs, op.addr), op.addr) )
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{
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if ( replace_with_label )
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out_tagon(COLOR_ERROR);
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out_value(op, OOF_ADDR | OOFS_NOSIGN | OOFW_32);
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if ( replace_with_label )
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out_tagoff(COLOR_ERROR);
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}
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if ( ind )
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out_symbol(')');
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}
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//--------------------------------------------------------------------------
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void out_m7700_t::outdispl(const op_t &op)
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{
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if ( is_displ_ind(op) )
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{
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out_symbol('(');
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outaddr(op, false);
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out_symbol(',');
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if ( !(ash.uflag & UAS_INDX_NOSPACE) )
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out_char(' ');
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outreg(op.reg);
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out_symbol(')');
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}
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else if ( is_displ_ind_p1(op) )
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{
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out_symbol('(');
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outaddr(op, false);
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out_symbol(')');
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out_symbol(',');
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out_char(' ');
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outreg(op.reg);
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}
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else
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{
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outaddr(op, false);
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out_symbol(',');
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out_char(' ');
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outreg(op.reg);
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}
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}
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//--------------------------------------------------------------------------
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void m7700_t::m7700_header(outctx_t &ctx)
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{
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ctx.gen_header(GH_PRINT_ALL_BUT_BYTESEX, NULL, ioh.device.c_str());
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if ( ash.uflag & UAS_DEVICE_DIR )
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{
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switch ( ptype )
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{
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case prc_m7700:
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ctx.gen_printf(DEFAULT_INDENT, ".MCU M37700");
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break;
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case prc_m7750:
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ctx.gen_printf(DEFAULT_INDENT, ".MCU M37750");
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break;
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default:
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INTERR(10029);
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}
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}
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}
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//--------------------------------------------------------------------------
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void m7700_t::m7700_footer(outctx_t &ctx) const
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{
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if ( ash.end != NULL )
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{
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ctx.gen_empty_line();
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ctx.out_line(ash.end, COLOR_ASMDIR);
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qstring name;
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if ( get_colored_name(&name, inf_get_start_ea()) > 0 )
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{
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ctx.out_char(' ');
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if ( ash.uflag & UAS_END_WITHOUT_LABEL )
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ctx.out_line("; ");
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ctx.out_line(name.begin());
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}
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ctx.flush_outbuf(DEFAULT_INDENT);
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}
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else
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{
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ctx.gen_cmt_line("end of file");
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}
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}
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//--------------------------------------------------------------------------
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bool out_m7700_t::bitmask2list(const op_t &op)
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{
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static const char *const flags[] =
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{
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"N", "V", "m", "x", "D", "I", "Z", "C"
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};
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static const int regs[] =
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{
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rPS, rPG, rDT, rDR, rY, rX, rB, rA
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};
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enum { bitFLAGS, bitREGS } t;
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switch ( insn.itype )
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{
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case m7700_psh:
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case m7700_pul:
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t = bitREGS;
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break;
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case m7700_sep:
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case m7700_clp:
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t = bitFLAGS;
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break;
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default:
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return false;
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}
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if ( op.value == 0 )
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return false;
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bool ok = false;
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for ( int tmp = (int)op.value, i = 1, j = 0; j < 8; i *= 2, j++ )
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{
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if ( ((tmp & i) >> j) != 1 )
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continue;
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if ( ok )
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{
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out_symbol(',');
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out_char(' ');
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}
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switch ( t )
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{
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case bitFLAGS:
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out_register(flags[7 - j]);
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break;
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case bitREGS:
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outreg(regs[7 - j]);
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break;
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}
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ok = true;
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}
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return true;
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}
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//--------------------------------------------------------------------------
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bool out_m7700_t::out_operand(const op_t &x)
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{
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switch ( x.type )
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{
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// register
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case o_reg:
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outreg(x.reg);
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break;
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// immediate
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case o_imm:
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{
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bool list_ok = false;
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if ( ash.uflag & UAS_BITMASK_LIST )
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list_ok = bitmask2list(x);
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if ( !list_ok )
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{
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if ( !(is_imm_without_sharp(x)) )
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out_symbol('#');
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out_value(x, OOFW_IMM);
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}
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}
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break;
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// bit
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case o_bit:
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{
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const ioport_bit_t * port = NULL;
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if ( x.n == 0 && (insn.Op2.type == o_near || insn.Op2.type == o_mem) )
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port = pm().find_bit(insn.Op2.addr, (size_t)x.value);
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// this immediate is represented in the .cfg file
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if ( port != NULL && !port->name.empty() )
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{
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// output the port name instead of the numeric value
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out_line(port->name.c_str(), COLOR_IMPNAME);
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}
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// otherwise, simply print the value
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else
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{
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out_symbol('#');
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out_value(x, OOFW_IMM);
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}
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}
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break;
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// data / code memory address
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case o_near:
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case o_mem:
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outaddr(x);
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break;
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// displ
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case o_displ:
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outdispl(x);
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break;
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// ignore void operands
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case o_void:
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break;
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default:
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INTERR(10030);
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}
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return 1;
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}
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//--------------------------------------------------------------------------
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void out_m7700_t::out_proc_mnem(void)
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{
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const char *pfx = is_insn_long_format(insn) ? "l" : NULL;
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out_mnem(8, pfx);
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}
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//--------------------------------------------------------------------------
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void out_m7700_t::out_insn(void)
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{
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out_mnemonic();
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//
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// print insn operands
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//
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out_one_operand(0); // output the first operand
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if ( insn.Op2.type != o_void )
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{
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out_symbol(',');
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out_char(' ');
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out_one_operand(1);
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}
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if ( insn.Op3.type != o_void )
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{
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out_symbol(',');
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out_char(' ');
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out_one_operand(2);
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}
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// output a character representation of the immediate values
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// embedded in the instruction as comments
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out_immchar_cmts();
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flush_outbuf();
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}
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//--------------------------------------------------------------------------
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// generate segment header
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//lint -esym(1764, ctx) could be made const
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//lint -esym(818, Srange) could be made const
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void m7700_t::m7700_segstart(outctx_t &ctx, segment_t *Srange) const
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{
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qstring sname;
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get_visible_segm_name(&sname, Srange);
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if ( ash.uflag & UAS_SEGM )
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ctx.gen_printf(DEFAULT_INDENT, COLSTR("SEGMENT %s", SCOLOR_ASMDIR), sname.c_str());
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else
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ctx.gen_printf(DEFAULT_INDENT, COLSTR(".SECTION %s", SCOLOR_ASMDIR), sname.c_str());
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ea_t orgbase = ctx.insn_ea - get_segm_para(Srange);
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if ( orgbase != 0 )
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{
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char buf[MAX_NUMBUF];
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btoa(buf, sizeof(buf), orgbase);
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ctx.gen_printf(DEFAULT_INDENT, COLSTR("%s %s", SCOLOR_ASMDIR), ash.origin, buf);
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}
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}
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//--------------------------------------------------------------------------
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inline bool show_assume_line(const sreg_range_t *sra, ea_t ea, int segreg)
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{
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bool show = false;
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if ( sra->start_ea == ea )
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{
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sreg_range_t prev_sra;
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if ( get_prev_sreg_range(&prev_sra, ea, segreg) )
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show = sra->val != prev_sra.val;
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}
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return show;
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}
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//--------------------------------------------------------------------------
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void m7700_t::m7700_assumes(outctx_t &ctx) const
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{
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ea_t ea = ctx.insn_ea;
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segment_t *seg = getseg(ea);
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if ( (inf_get_outflags() & OFLG_GEN_ASSUME) == 0 || seg == NULL )
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return;
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bool seg_started = (ea == seg->start_ea);
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sreg_range_t sra;
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if ( get_sreg_range(&sra, ea, rDR) )
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{
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if ( (seg_started && sra.val != BADSEL) || show_assume_line(&sra, ea, rDR) )
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ctx.gen_printf(-1, COLSTR("%s DPR = %a", SCOLOR_REGCMT), ash.cmnt, sra.val);
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}
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if ( get_sreg_range(&sra, ea, rfM) )
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{
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if ( seg_started || show_assume_line(&sra, ea, rfM) )
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ctx.gen_printf(-1, COLSTR("%s m = %a", SCOLOR_REGCMT), ash.cmnt, sra.val);
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}
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if ( get_sreg_range(&sra, ea, rfX) )
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{
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if ( seg_started || show_assume_line(&sra, ea, rfX) )
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ctx.gen_printf(-1, COLSTR("%s x = %a", SCOLOR_REGCMT), ash.cmnt, sra.val);
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}
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}
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