476 lines
14 KiB
C++
476 lines
14 KiB
C++
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#include "m32r.hpp"
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#include <ieee.h>
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int data_id;
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// m32r register names
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static const char *const RegNames[] =
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{
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"R0", "R1", "R2", "R3", "R4",
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"R5", "R6", "R7", "R8", "R9",
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"R10", "R11", "R12", "R13", "R14", "R15",
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"CR0", "CR1", "CR2", "CR3", "CR6",
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"PC",
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"A0", "A1",
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"CR4", "CR5", "CR7", "CR8", "CR9",
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"CR10", "CR11", "CR12", "CR13", "CR14", "CR15",
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"cs", "ds" // required by IDA kernel
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};
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static const char *const RegNames_alias[] =
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{
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"R0", "R1", "R2", "R3", "R4",
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"R5", "R6", "R7", "R8", "R9",
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"R10", "R11", "R12", "fp", "lr", "sp",
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"psw", "cbr", "spi", "spu", "bpc",
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"PC",
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"A0", "A1",
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"CR4", "CR5", "fpsr", "CR8", "CR9",
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"CR10", "CR11", "CR12", "CR13", "CR14", "CR15",
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"cs", "ds" // required by IDA kernel
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};
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static char const cfgname[] = "m32r.cfg";
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void m32r_iohandler_t::get_cfg_filename(char *buf, size_t bufsize)
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{
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qstrncpy(buf, cfgname, bufsize);
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}
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//----------------------------------------------------------------------------
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static int idaapi choose_device(int, form_actions_t &fa)
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{
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m32r_t &pm = *(m32r_t *)fa.get_ud();
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// we do not respect the IDB_LOADED flag at this point
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// should we fix it?
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if ( choose_ioport_device(&pm.ioh.device, cfgname) )
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pm.ioh.set_device_name(pm.ioh.device.c_str(), IORESP_NONE);
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return 0;
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}
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//-------------------------------------------------------------------------
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// read all procmod data from the idb
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void m32r_t::load_from_idb()
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{
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idpflags = (uint32)helper.altval(-1);
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handle_new_flags(/*save*/ false);
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ioh.restore_device();
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}
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//-------------------------------------------------------------------------
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void m32r_t::handle_new_flags(bool save)
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{
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// patch the RegNames[] array according to the use_reg_aliases parameter
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if ( use_reg_aliases() )
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ph.reg_names = RegNames_alias;
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else
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ph.reg_names = RegNames;
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if ( save )
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save_idpflags();
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}
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//----------------------------------------------------------------------------
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// This function (called when opening the module related configuration in
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// the general options) will create a dialog box asking the end-user if he
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// wants to use synthetic instructions and register aliases.
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const char *m32r_t::set_idp_options(
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const char *keyword,
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int /*value_type*/,
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const void * /*value*/,
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bool idb_loaded)
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{
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short opt_subs = 0;
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if ( keyword != NULL )
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return IDPOPT_BADKEY;
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if ( use_synthetic_insn() )
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opt_subs |= 1;
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if ( use_reg_aliases() )
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opt_subs |= 2;
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static const char form[] =
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"HELP\n"
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"Mitsubishi 32-Bit (m32r) related options :\n"
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"\n"
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" Use synthetic instructions\n"
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"\n"
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" If this option is on, IDA will simplify instructions and replace\n"
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" them by synthetic pseudo-instructions.\n"
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"\n"
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" For example,\n"
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"\n"
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" bc label1 ; 8 bits offset \n"
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" bc label2 ; 24 bits offset \n"
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" ldi r1, #0xF \n"
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" ldi r2, #0x123456 \n"
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" st r3, @-sp \n"
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" ld r4, @sp+ \n"
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"\n"
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" will be replaced by\n"
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"\n"
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" bc.s label1 \n"
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" bc.l label2 \n"
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" ldi8 r1, #0xF \n"
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" ldi24 r2, #0x123456 \n"
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" push r3 \n"
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" pop r4 \n"
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"\n"
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" Use registers aliases\n"
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"\n"
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" If checked, IDA will use aliases names for the following registers :\n"
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"\n"
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" r13 -> fp \n"
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" r14 -> lr \n"
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" r15 -> sp \n"
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" cr0 -> psw \n"
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" cr1 -> cbr \n"
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" cr2 -> spi \n"
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" cr3 -> spu \n"
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" cr6 -> bpc \n"
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"\n"
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"ENDHELP\n"
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"m32r related options\n"
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"%*\n"
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"<##Substitutions"
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"#For example, use bc.s instead of 8-Bit bc instructions#Use ~s~ynthetic instructions:C>"
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"<#For example, use fp instead or r14#Use registers ~a~liases:C>>\n\n\n\n"
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"<~C~hoose device name:B:0::>"
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"\n\n\n";
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ask_form(form, this, &opt_subs, choose_device);
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idpflags = 0; // reset the configuration
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if ( opt_subs & 1 )
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idpflags |= IDP_SYNTHETIC;
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if ( opt_subs & 2 )
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idpflags |= IDP_REG_ALIASES;
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handle_new_flags(idb_loaded);
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// DEVICE was saved in choose_device()
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return IDPOPT_OK;
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}
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// returns a pointer to a ioport_t object if address was found in the config file.
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// otherwise, returns NULL.
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const ioport_t *m32r_t::find_sym(ea_t address)
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{
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return find_ioport(ioh.ports, address);
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}
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// GNU Assembler description
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static const asm_t gnu_asm =
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{
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AS_COLON
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|ASH_HEXF3 // hex 0x123 format
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|ASB_BINF3 // bin 0b010 format
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// don't display the final 0 in string declarations
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|AS_ASCIIZ | AS_ASCIIC | AS_1TEXT,
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0,
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"m32r GNU Assembler",
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0,
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NULL, // no headers
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NULL,
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NULL,
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";", // comment string
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'"', // string delimiter
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'\'', // char delimiter
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"\\\"'", // special symbols in char and string constants
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".string", // ascii string directive
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".byte", // byte directive
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".short", // word directive
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".word", // dword (4 bytes)
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NULL, // qword (8 bytes)
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NULL, // oword (16 bytes)
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// Although the M32R/X/D has no hardware floating point,
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// the '.float' and '.double' directives generate IEEE-format
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// floating-point values for compatibility with other development tools.
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".float", // float (4 bytes)
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".double", // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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NULL, // arrays (#h,#d,#v,#s(...)
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"dfs %s", // uninited arrays
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"equ", // Equ
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NULL, // seg prefix
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"$", // current IP (instruction pointer) symbol in assembler
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NULL, // func_header
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NULL, // func_footer
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".global", // public
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NULL, // weak
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NULL, // extrn
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NULL, // comm
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NULL, // get_type_name
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NULL, // align
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'(', ')', // lbrace, rbrace
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"%", // mod
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"&", // and
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"|", // or
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"^", // xor
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"!", // not
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"<<", // shl
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">>", // shr
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NULL, // sizeof
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0, // flag2 ???
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NULL, // comment close string
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NULL, // low8 op
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NULL, // high8 op
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"LOW(%s)", // low16 op
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"HIGH(%s)" // high16 op
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};
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// As this time, we only support the GNU assembler.
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static const asm_t *const asms[] = { &gnu_asm, NULL };
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// Short and long names for our module
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#define FAMILY "Mitsubishi 32-BIT family:"
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static const char *const shnames[] =
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{
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"m32r",
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"m32rx",
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NULL
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};
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static const char *const lnames[] =
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{
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FAMILY"Mitsubishi 32-BIT family",
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"Mitsubishi 32-BIT family (extended)",
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NULL
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};
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// Opcodes of "return" instructions. This information will be used in 2 ways:
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// - if an instruction has the "return" opcode, its autogenerated label
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// will be "locret" rather than "loc".
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// - IDA will use the first "return" opcode to create empty subroutines.
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static const uchar retcode_1[] = { 0x1F, 0xCE }; // jmp lr
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static const uchar retcode_2[] = { 0x10, 0xD6 }; // rte
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_1), retcode_1 },
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{ sizeof(retcode_2), retcode_2 },
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{ 0, NULL } // NULL terminated array
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};
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(m32r_t));
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return 0;
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}
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//----------------------------------------------------------------------------
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ssize_t idaapi m32r_t::on_event(ssize_t msgid, va_list va)
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{
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int code = 0;
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switch ( msgid )
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{
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case processor_t::ev_init:
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helper.create(PROCMOD_NODE_NAME);
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// this processor is big endian
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inf_set_be(true);
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile:
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if ( choose_ioport_device(&ioh.device, cfgname) )
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ioh.set_device_name(ioh.device.c_str(), IORESP_ALL);
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handle_new_flags();
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break;
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case processor_t::ev_newprc:
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ptype = processor_subtype_t(va_arg(va, int));
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// msg("ptype = %s\n", ptype == prc_m32r ? "m32r" : ptype == prc_m32rx ? "m32rx" : "???");
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break;
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case processor_t::ev_ending_undo:
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// restore ptype
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ptype = processor_subtype_t(ph.get_proc_index());
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//fall through
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case processor_t::ev_oldfile:
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load_from_idb();
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break;
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case processor_t::ev_create_switch_xrefs:
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{
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ea_t insn_ea = va_arg(va, ea_t);
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switch_info_t *si = va_arg(va, switch_info_t *);
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return m32r_create_switch_xrefs(insn_ea, *si);
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}
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case processor_t::ev_calc_switch_cases:
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{
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casevec_t *casevec = va_arg(va, casevec_t *);
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eavec_t *targets = va_arg(va, eavec_t *);
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ea_t insn_ea = va_arg(va, ea_t);
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switch_info_t *si = va_arg(va, switch_info_t *);
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return m32r_calc_switch_cases(casevec, targets, insn_ea, *si);
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}
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case processor_t::ev_out_mnem:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_mnem(*ctx);
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return 1;
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}
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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m32r_header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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m32r_footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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m32r_segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_ana_insn:
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{
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insn_t *out = va_arg(va, insn_t *);
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return ana(out);
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}
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case processor_t::ev_emu_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return emu(*insn) ? 1 : -1;
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}
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case processor_t::ev_out_insn:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_insn(*ctx);
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return 1;
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}
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case processor_t::ev_out_operand:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const op_t *op = va_arg(va, const op_t *);
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return out_opnd(*ctx, *op) ? 1 : -1;
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}
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case processor_t::ev_can_have_type:
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{
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const op_t *op = va_arg(va, const op_t *);
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return can_have_type(*op) ? 1 : -1;
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}
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case processor_t::ev_is_sp_based:
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{
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int *mode = va_arg(va, int *);
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const insn_t *insn = va_arg(va, const insn_t *);
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const op_t *op = va_arg(va, const op_t *);
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*mode = is_sp_based(*insn, *op);
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return 1;
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}
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case processor_t::ev_create_func_frame:
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{
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func_t *pfn = va_arg(va, func_t *);
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create_func_frame(pfn);
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return 1;
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}
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case processor_t::ev_get_frame_retsize:
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{
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int *frsize = va_arg(va, int *);
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const func_t *pfn = va_arg(va, const func_t *);
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*frsize = m32r_get_frame_retsize(pfn);
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return 1;
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}
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case processor_t::ev_set_idp_options:
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{
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const char *keyword = va_arg(va, const char *);
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int value_type = va_arg(va, int);
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const char *value = va_arg(va, const char *);
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const char **errmsg = va_arg(va, const char **);
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bool idb_loaded = va_argi(va, bool);
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const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
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if ( ret == IDPOPT_OK )
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return 1;
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if ( errmsg != NULL )
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*errmsg = ret;
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return -1;
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}
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default:
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break;
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}
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return code;
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}
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//-----------------------------------------------------------------------
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// Processor Definition
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//-----------------------------------------------------------------------
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processor_t LPH =
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{
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IDP_INTERFACE_VERSION, // version
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PLFM_M32R, // id
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// flag
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PR_RNAMESOK // can use register names for byte names
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| PR_BINMEM // The module creates RAM/ROM segments for binary files
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// (the kernel shouldn't ask the user about their sizes and addresses)
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| PR_USE32
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| PR_DEFSEG32,
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// flag2
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PR2_IDP_OPTS, // the module has processor-specific configuration options
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8, // 8 bits in a byte for code segments
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8, // 8 bits in a byte for other segments
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shnames, // array of short processor names
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// the short names are used to specify the processor
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// with the -p command line switch)
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lnames, // array of long processor names
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// the long names are used to build the processor type
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// selection menu
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asms, // array of target assemblers
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notify, // the kernel event notification callback
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RegNames, // Regsiter names
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qnumber(RegNames), // Number of registers
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rVcs,rVds,
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0, // size of a segment register
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rVcs,rVds,
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NULL, // No known code start sequences
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retcodes,
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0,m32r_last,
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Instructions, // instruc
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0, // int tbyte_size; -- doesn't exist
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{ 0, 7, 15, 0 }, // char real_width[4];
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// number of symbols after decimal point
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// 2byte float (0-does not exist)
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// normal float
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// normal double
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// long double
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m32r_rte, // Icode of return instruction. It is ok to give any of possible return instructions
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};
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