17357 lines
458 KiB
INI
17357 lines
458 KiB
INI
; The format of the input file:
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; each device definition begins with a line like this:
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;
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; .devicename
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;
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; after it go the port definitions in this format:
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;
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; portname address
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;
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; the bit definitions (optional) are represented like this:
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;
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; portname.bitname bitnumber
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;
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; lines beginning with a space are ignored.
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; comment lines should be started with ';' character.
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;
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; the default device is specified at the start of the file
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;
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; .default device_name
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;
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; all lines non conforming to the format are passed to the callback function
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;
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; MOTOROLA SPECIFIC LINES
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;------------------------
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;
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; the processor definition may include the memory configuration.
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; the line format is:
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; area CLASS AREA-NAME START:END
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;
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; where CLASS is anything, but please use one of CODE, DATA, BSS
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; START and END are addresses, the end address is not included
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; Interrupt vectors are declared in the following way:
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; interrupt NAME ADDRESS COMMENT
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.default C517
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.C501
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; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8006&parent_oid=13727
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; d501.pdf
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; MEMORY MAP
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area CODE code 0x0000:0x10000
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area DATA RAM 0x0000:0x0080
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area DATA FSR 0x0080:0x0100
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; Interrupt and reset vector assignments
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entry RESET 0x0000 RESET
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entry IE0 0x0003 External interrupt 0
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entry TF0 0x000B Timer 0 interrupt
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entry IE1 0x0013 External interrupt 1
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entry TF1 0x001B Timer 1 interrupt
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entry RI_TI 0x0023 Serial port interrupt
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entry TF2_EXF2 0x002B Timer 2 interrupt
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; INPUT/OUTPUT PORTS
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P0 0x0080 Port 0
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P0.P07 7
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P0.P06 6
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P0.P05 5
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P0.P04 4
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P0.P03 3
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P0.P02 2
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P0.P01 1
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P0.P00 0
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SP 0x0081 Stack Pointer
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SP.SP7 7
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SP.SP6 6
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SP.SP5 5
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SP.SP4 4
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SP.SP3 3
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SP.SP2 2
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SP.SP1 1
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SP.SP0 0
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DPL 0x0082 Data Pointer, Low Byte
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DPL.DPL7 7
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DPL.DPL6 6
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DPL.DPL5 5
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DPL.DPL4 4
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DPL.DPL3 3
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DPL.DPL2 2
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DPL.DPL1 1
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DPL.DPL0 0
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DPH 0x0083 Data Pointer, High Byte
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DPH.DPH7 7
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DPH.DPH6 6
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DPH.DPH5 5
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DPH.DPH4 4
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DPH.DPH3 3
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DPH.DPH2 2
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DPH.DPH1 1
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DPH.DPH0 0
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RESERVED0084 0x0084 RESERVED
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RESERVED0085 0x0085 RESERVED
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RESERVED0086 0x0086 RESERVED
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PCON 0x0087 Power Control Register
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PCON.SMOD 7
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PCON.GF1 3
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PCON.GF0 2
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PCON.PDE 1
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PCON.IDLE 0
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TCON 0x0088 Timer 0/1 Control Register
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TCON.TF1 7
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TCON.TR1 6
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TCON.TF0 5
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TCON.TR0 4
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TCON.IE1 3
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TCON.IT1 2
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TCON.IE0 1
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TCON.IT0 0
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TMOD 0x0089 Timer Mode Register
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TMOD.GATE_1 7
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TMOD.C_T_1 6
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TMOD.M1_1 5
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TMOD.M0_1 4
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TMOD.GATE_0 3
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TMOD.C_T_0 2
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TMOD.M1_0 1
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TMOD.M0_0 0
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TL0 0x008A Timer 0, Low Byte
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TL0.TL07 7
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TL0.TL06 6
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TL0.TL05 5
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TL0.TL04 4
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TL0.TL03 3
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TL0.TL02 2
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TL0.TL01 1
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TL0.TL00 0
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TL1 0x008B Timer 1, Low Byte
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TL1.TL17 7
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TL1.TL16 6
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TL1.TL15 5
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TL1.TL14 4
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TL1.TL13 3
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TL1.TL12 2
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TL1.TL11 1
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TL1.TL10 0
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TH0 0x008C Timer 0, High Byte
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TH0.TH07 7
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TH0.TH06 6
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TH0.TH05 5
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TH0.TH04 4
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TH0.TH03 3
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TH0.TH02 2
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TH0.TH01 1
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TH0.TH00 0
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TH1 0x008D Timer 1, High Byte
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TH1.TH17 7
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TH1.TH16 6
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TH1.TH15 5
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TH1.TH14 4
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TH1.TH13 3
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TH1.TH12 2
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TH1.TH11 1
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TH1.TH10 0
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RESERVED008E 0x008E RESERVED
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RESERVED008F 0x008F RESERVED
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P1 0x0090 Port 1
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P1.P17 7
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P1.P16 6
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P1.P15 5
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P1.P14 4
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P1.P13 3
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P1.P12 2
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P1.P11 1
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P1.P10 0
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RESERVED0091 0x0091 RESERVED
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RESERVED0092 0x0092 RESERVED
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RESERVED0093 0x0093 RESERVED
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RESERVED0094 0x0094 RESERVED
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RESERVED0095 0x0095 RESERVED
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RESERVED0096 0x0096 RESERVED
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RESERVED0097 0x0097 RESERVED
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SCON 0x0098 Serial Channel Control Register
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SCON.SM0 7
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SCON.SM1 6
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SCON.SM2 5
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SCON.REN 4
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SCON.TB8 3
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SCON.RB8 2
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SCON.TI 1
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SCON.RI 0
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SBUF 0x0099 Serial Channel Buffer Register
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SBUF.SBUF7 7
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SBUF.SBUF6 6
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SBUF.SBUF5 5
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SBUF.SBUF4 4
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SBUF.SBUF3 3
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SBUF.SBUF2 2
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SBUF.SBUF1 1
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SBUF.SBUF0 0
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RESERVED009A 0x009A RESERVED
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RESERVED009B 0x009B RESERVED
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RESERVED009C 0x009C RESERVED
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RESERVED009D 0x009D RESERVED
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RESERVED009E 0x009E RESERVED
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RESERVED009F 0x009F RESERVED
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P2 0x00A0 Port 2
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P2.P27 7
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P2.P26 6
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P2.P25 5
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P2.P24 4
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P2.P23 3
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P2.P22 2
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P2.P21 1
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P2.P20 0
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RESERVED00A1 0x00A1 RESERVED
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RESERVED00A2 0x00A2 RESERVED
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RESERVED00A3 0x00A3 RESERVED
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RESERVED00A4 0x00A4 RESERVED
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RESERVED00A5 0x00A5 RESERVED
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RESERVED00A6 0x00A6 RESERVED
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RESERVED00A7 0x00A7 RESERVED
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IE 0x00A8 Interrupt Enable Register
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IE.EA 7
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IE.ET2 5
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IE.ES 4
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IE.ET1 3
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IE.EX1 2
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IE.ET0 1
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IE.EX0 0
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RESERVED00A9 0x00A9 RESERVED
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RESERVED00AA 0x00AA RESERVED
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RESERVED00AB 0x00AB RESERVED
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RESERVED00AC 0x00AC RESERVED
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RESERVED00AD 0x00AD RESERVED
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RESERVED00AE 0x00AE RESERVED
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RESERVED00AF 0x00AF RESERVED
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P3 0x00B0 Port 3
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P3.RD 7
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P3.WR 6
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P3.T1 5
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P3.T0 4
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P3.INT1 3
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P3.INT0 2
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P3.TxD 1
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P3.RxD 0
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RESERVED00B1 0x00B1 RESERVED
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RESERVED00B2 0x00B2 RESERVED
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RESERVED00B3 0x00B3 RESERVED
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RESERVED00B4 0x00B4 RESERVED
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RESERVED00B5 0x00B5 RESERVED
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RESERVED00B6 0x00B6 RESERVED
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RESERVED00B7 0x00B7 RESERVED
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IP 0x00B8 Interrupt Priority Register
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IP.PT2 5
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IP.PS 4
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IP.PT1 3
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IP.PX1 2
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IP.PT0 1
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IP.PX0 0
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RESERVED00B9 0x00B9 RESERVED
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RESERVED00BA 0x00BA RESERVED
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RESERVED00BB 0x00BB RESERVED
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RESERVED00BC 0x00BC RESERVED
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RESERVED00BD 0x00BD RESERVED
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RESERVED00BE 0x00BE RESERVED
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RESERVED00BF 0x00BF RESERVED
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RESERVED00C0 0x00C0 RESERVED
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RESERVED00C1 0x00C1 RESERVED
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RESERVED00C2 0x00C2 RESERVED
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RESERVED00C3 0x00C3 RESERVED
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RESERVED00C4 0x00C4 RESERVED
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RESERVED00C5 0x00C5 RESERVED
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RESERVED00C6 0x00C6 RESERVED
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RESERVED00C7 0x00C7 RESERVED
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T2CON 0x00C8 Timer 2 Control Register
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T2CON.TF2 7
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T2CON.EXF2 6
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T2CON.RCLK 5
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T2CON.TCLK 4
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T2CON.EXEN2 3
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T2CON.TR2 2
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T2CON.C_T2 1
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T2CON.CP_RL2 0
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T2MOD 0x00C9 Timer 2 Mode Register
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T2MOD.DCEN 0
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RC2L 0x00CA Timer 2 Reload/Capture Register, Low Byte
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RC2L.RC2L7 7
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RC2L.RC2L6 6
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RC2L.RC2L5 5
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RC2L.RC2L4 4
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RC2L.RC2L3 3
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RC2L.RC2L2 2
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RC2L.RC2L1 1
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RC2L.RC2L0 0
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RC2H 0x00CB Timer 2 Reload/Capture Register, High Byte
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RC2H.RC2H7 7
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RC2H.RC2H6 6
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RC2H.RC2H5 5
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RC2H.RC2H4 4
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RC2H.RC2H3 3
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RC2H.RC2H2 2
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RC2H.RC2H1 1
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RC2H.RC2H0 0
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TL2 0x00CC Timer 2 Low Byte
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TL2.TL27 7
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TL2.TL26 6
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TL2.TL25 5
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TL2.TL24 4
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TL2.TL23 3
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TL2.TL22 2
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TL2.TL21 1
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TL2.TL20 0
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TH2 0x00CD Timer 2 High Byte
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TH2.TH27 7
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TH2.TH26 6
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TH2.TH25 5
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TH2.TH24 4
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TH2.TH23 3
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TH2.TH22 2
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TH2.TH21 1
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TH2.TH20 0
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RESERVED00CE 0x00CE RESERVED
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RESERVED00CF 0x00CF RESERVED
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PSW 0x00D0 Program Status Word Register
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PSW.CY 7
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PSW.AC 6
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PSW.F0 5
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PSW.RS1 4
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PSW.RS0 3
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PSW.OV 2
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PSW.F1 1
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PSW.P 0
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RESERVED00D1 0x00D1 RESERVED
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RESERVED00D2 0x00D2 RESERVED
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RESERVED00D3 0x00D3 RESERVED
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RESERVED00D4 0x00D4 RESERVED
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RESERVED00D5 0x00D5 RESERVED
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RESERVED00D6 0x00D6 RESERVED
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RESERVED00D7 0x00D7 RESERVED
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RESERVED00D8 0x00D8 RESERVED
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RESERVED00D9 0x00D9 RESERVED
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RESERVED00DA 0x00DA RESERVED
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RESERVED00DB 0x00DB RESERVED
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RESERVED00DC 0x00DC RESERVED
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RESERVED00DD 0x00DD RESERVED
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RESERVED00DE 0x00DE RESERVED
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RESERVED00DF 0x00DF RESERVED
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ACC 0x00E0 Accumulator
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ACC.ACC7 7
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ACC.ACC6 6
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ACC.ACC5 5
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ACC.ACC4 4
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ACC.ACC3 3
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ACC.ACC2 2
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ACC.ACC1 1
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ACC.ACC0 0
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RESERVED00E1 0x00E1 RESERVED
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RESERVED00E2 0x00E2 RESERVED
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RESERVED00E3 0x00E3 RESERVED
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RESERVED00E4 0x00E4 RESERVED
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RESERVED00E5 0x00E5 RESERVED
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RESERVED00E6 0x00E6 RESERVED
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RESERVED00E7 0x00E7 RESERVED
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RESERVED00E8 0x00E8 RESERVED
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RESERVED00E9 0x00E9 RESERVED
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RESERVED00EA 0x00EA RESERVED
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RESERVED00EB 0x00EB RESERVED
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RESERVED00EC 0x00EC RESERVED
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RESERVED00ED 0x00ED RESERVED
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RESERVED00EE 0x00EE RESERVED
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RESERVED00EF 0x00EF RESERVED
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B 0x00F0 B-Register
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B.B7 7
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B.B6 6
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B.B5 5
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B.B4 4
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B.B3 3
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B.B2 2
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B.B1 1
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B.B0 0
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RESERVED00F1 0x00F1 RESERVED
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RESERVED00F2 0x00F2 RESERVED
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RESERVED00F3 0x00F3 RESERVED
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RESERVED00F4 0x00F4 RESERVED
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RESERVED00F5 0x00F5 RESERVED
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RESERVED00F6 0x00F6 RESERVED
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RESERVED00F7 0x00F7 RESERVED
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RESERVED00F8 0x00F8 RESERVED
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RESERVED00F9 0x00F9 RESERVED
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RESERVED00FA 0x00FA RESERVED
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RESERVED00FB 0x00FB RESERVED
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RESERVED00FC 0x00FC RESERVED
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RESERVED00FD 0x00FD RESERVED
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RESERVED00FE 0x00FE RESERVED
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RESERVED00FF 0x00FF RESERVED
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.C504
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; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=28993&parent_oid=12032
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; SAF-C504-2E40M.pdf
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; MEMORY MAP
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area CODE code 0x0000:0xFF00
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area DATA XRAM 0xFF00:0x10000
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area DATA RAM 0x0000:0x0080
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area DATA FSR 0x0080:0x0100
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; Interrupt and reset vector assignments
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entry RESET 0x0000 RESET
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entry IE0 0x0003 External interrupt 0
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entry TF0 0x000B Timer 0 interrupt
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entry IE1 0x0013 External interrupt 1
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entry TF1 0x001B Timer 1 interrupt
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entry RI_TI 0x0023 Serial port interrupt
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entry TF2_EXF2 0x002B Timer 2 interrupt
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entry IE2 0x004B External interrupt 2
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entry TRF_BCERR 0x0053 CAPCOM emergency interrupt
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entry CT2P 0x005B Compare timer 2 interrupt
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entry CC0F_R_CC2F_R 0x0063 Capture/compare match interrupt
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entry CT1FP_CT1FC 0x006B Compare timer 1 interrupt
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entry PDINT 0x007B Power-down interrupt
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; INPUT/OUTPUT PORTS
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P0 0x0080 Port 0
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P0.P07 7
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P0.P06 6
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P0.P05 5
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P0.P04 4
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P0.P03 3
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P0.P02 2
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P0.P01 1
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P0.P00 0
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SP 0x0081 Stack Pointer
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SP.SP7 7
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SP.SP6 6
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SP.SP5 5
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SP.SP4 4
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SP.SP3 3
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SP.SP2 2
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SP.SP1 1
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SP.SP0 0
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|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
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|
DPL.DPL6 6
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DPL.DPL5 5
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DPL.DPL4 4
|
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DPL.DPL3 3
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DPL.DPL2 2
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DPL.DPL1 1
|
|
DPL.DPL0 0
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|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
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DPH.DPH6 6
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DPH.DPH5 5
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DPH.DPH4 4
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DPH.DPH3 3
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DPH.DPH2 2
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DPH.DPH1 1
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DPH.DPH0 0
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|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
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|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
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|
WDTREL.WDTREL4 4
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WDTREL.WDTREL3 3
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|
WDTREL.WDTREL2 2
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|
WDTREL.WDTREL1 1
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|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
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|
PCON.PDE 1
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PCON.IDLE 0
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|
TCON 0x0088 Timer 0/1 Control Register
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|
TCON.TF1 7
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|
TCON.TR1 6
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|
TCON.TF0 5
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|
TCON.TR0 4
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|
TCON.IE1 3
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TCON.IT1 2
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TCON.IE0 1
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|
TCON.IT0 0
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|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
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|
TL0.TL07 7
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|
TL0.TL06 6
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TL0.TL05 5
|
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TL0.TL04 4
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TL0.TL03 3
|
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TL0.TL02 2
|
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TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.P17 7
|
|
P1.P16 6
|
|
P1.P15 5
|
|
P1.P14 4
|
|
P1.P13 3
|
|
P1.P12 2
|
|
P1.T2EX 1
|
|
P1.T2 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
ITCON 0x009A Interrupt Trigger Condition Register
|
|
ITCON.IT2 7
|
|
ITCON.IE2 6
|
|
ITCON.I2ETF 5
|
|
ITCON.I2ETR 4
|
|
ITCON.I1ETF 3
|
|
ITCON.I1ETR 2
|
|
ITCON.I0ETF 1
|
|
ITCON.I0ETR 0
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IEN1 0x00A9 Interrupt Enable Register 1
|
|
IEN1.ECT1 5
|
|
IEN1.ECCM 4
|
|
IEN1.ECT2 3
|
|
IEN1.ECEM 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
RESERVED00AA 0x00AA RESERVED
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
; P3ANA 0x00B0 Port 3 Analog Input Selection Register
|
|
; P3ANA.EAN7 5
|
|
; P3ANA.EAN6 4
|
|
; P3ANA.EAN5 3
|
|
; P3ANA.EAN4 2
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IP0 0x00B8 Interrupt Priority Register 0
|
|
IP0.PT2 5
|
|
IP0.PS 4
|
|
IP0.PT1 3
|
|
IP0.PX1 2
|
|
IP0.PT0 1
|
|
IP0.PX0 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.PCT1 5
|
|
IP1.PCCM 4
|
|
IP1.PCT2 3
|
|
IP1.PCEM 2
|
|
IP1.PX2 1
|
|
IP1.PADC 0
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
WDCON 0x00C0 Watchdog Timer Control Register
|
|
WDCON.OWDS 3
|
|
WDCON.WDTS 2
|
|
WDCON.WDT 1
|
|
WDCON.SWDT 0
|
|
CT2CON 0x00C1 Compare timer 2 control register
|
|
CT2CON.CT2P 7
|
|
CT2CON.ECT2O 6
|
|
CT2CON.STE2 5
|
|
CT2CON.CT2RES 4
|
|
CT2CON.CT2R 3
|
|
CT2CON.CLK2 2
|
|
CT2CON.CLK1 1
|
|
CT2CON.CLK0 0
|
|
CCL0 0x00C2 Capture/compare register 0, low byte
|
|
CCL0.CCL07 7
|
|
CCL0.CCL06 6
|
|
CCL0.CCL05 5
|
|
CCL0.CCL04 4
|
|
CCL0.CCL03 3
|
|
CCL0.CCL02 2
|
|
CCL0.CCL01 1
|
|
CCL0.CCL00 0
|
|
CCH0 0x00C3 Capture/compare register 0, high byte
|
|
CCH0.CCH07 7
|
|
CCH0.CCH06 6
|
|
CCH0.CCH05 5
|
|
CCH0.CCH04 4
|
|
CCH0.CCH03 3
|
|
CCH0.CCH02 2
|
|
CCH0.CCH01 1
|
|
CCH0.CCH00 0
|
|
CCL1 0x00C4 Capture/compare register 1, low byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C5 Capture/compare register 1, high byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C6 Capture/compare register 2, low byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C7 Capture/compare register 2, high byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.TF2 7
|
|
T2CON.EXF2 6
|
|
T2CON.RCLK 5
|
|
T2CON.TCLK 4
|
|
T2CON.EXEN2 3
|
|
T2CON.TR2 2
|
|
T2CON.C_T2 1
|
|
T2CON.CP_RL2 0
|
|
T2MOD 0x00C9 Timer 2 Mode Register
|
|
T2MOD.DCEN 0
|
|
RC2L 0x00CA Timer 2 Reload Capture Register, Low Byte
|
|
RC2L.RC2L7 7
|
|
RC2L.RC2L6 6
|
|
RC2L.RC2L5 5
|
|
RC2L.RC2L4 4
|
|
RC2L.RC2L3 3
|
|
RC2L.RC2L2 2
|
|
RC2L.RC2L1 1
|
|
RC2L.RC2L0 0
|
|
RC2H 0x00CB Timer 2 Reload Capture Register, High Byte
|
|
RC2H.RC2H7 7
|
|
RC2H.RC2H6 6
|
|
RC2H.RC2H5 5
|
|
RC2H.RC2H4 4
|
|
RC2H.RC2H3 3
|
|
RC2H.RC2H2 2
|
|
RC2H.RC2H1 1
|
|
RC2H.RC2H0 0
|
|
TL2 0x00CC Timer 2 Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2 High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
TRCON 0x00CF Trap enable control register
|
|
TRCON.TRPEN 7
|
|
TRCON.TRF 6
|
|
TRCON.TREN5 5
|
|
TRCON.TREN4 4
|
|
TRCON.TREN3 3
|
|
TRCON.TREN2 2
|
|
TRCON.TREN1 1
|
|
TRCON.TREN0 0
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7 Carry Flag
|
|
PSW.AC 6 Auxiliary Carry Flag
|
|
PSW.F0 5 General Purpose Flag 0
|
|
PSW.RS1 4 Register Bank Select Control bit 1
|
|
PSW.RS0 3 Register Bank Select Control bit 2
|
|
PSW.OV 2 Overflow Flag
|
|
PSW.F1 1 General Purpose Flag 1
|
|
PSW.P 0 Parity Flag
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
CP2L 0x00D2 Compare timer 2 period register, low byte
|
|
CP2L.CP2L7 7
|
|
CP2L.CP2L6 6
|
|
CP2L.CP2L5 5
|
|
CP2L.CP2L4 4
|
|
CP2L.CP2L3 3
|
|
CP2L.CP2L2 2
|
|
CP2L.CP2L1 1
|
|
CP2L.CP2L0 0
|
|
CP2H 0x00D3 Compare timer 2 period register, high byte
|
|
CP2H.CP2H1 1
|
|
CP2H.CP2H0 0
|
|
CMP2L 0x00D4 Compare timer 2 compare register, low byte
|
|
CMP2L.CMP2L7 7
|
|
CMP2L.CMP2L6 6
|
|
CMP2L.CMP2L5 5
|
|
CMP2L.CMP2L4 4
|
|
CMP2L.CMP2L3 3
|
|
CMP2L.CMP2L2 2
|
|
CMP2L.CMP2L1 1
|
|
CMP2L.CMP2L0 0
|
|
CMP2H 0x00D5 Compare timer 2 compare register, high byte
|
|
CMP2H.CMP2H1 1
|
|
CMP2H.CMP2H0 0
|
|
CCIE 0x00D6 Capture/Compare Interrupt Enable Reg.
|
|
CCIE.ECTP 7
|
|
CCIE.ECTC 6
|
|
CCIE.CC2FEN 5
|
|
CCIE.CC2REN 4
|
|
CCIE.CC1FEN 3
|
|
CCIE.CC1REN 2
|
|
CCIE.CC0FEN 1
|
|
CCIE.CC0REN 0
|
|
BCON 0x00D7 Block commutation control register
|
|
BCON.BCMPBCEM 7
|
|
BCON.PWM1 6
|
|
BCON.PWM0 5
|
|
BCON.EBCE 4
|
|
BCON.BCERR 3
|
|
BCON.BCEN 2
|
|
BCON.BCM1 1
|
|
BCON.BCM0 0
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.IADC 5
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Data Register Low Byte
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
CCPL 0x00DE Compare timer 1 period register, low byte
|
|
CCPL.CCPL7 7
|
|
CCPL.CCPL6 6
|
|
CCPL.CCPL5 5
|
|
CCPL.CCPL4 4
|
|
CCPL.CCPL3 3
|
|
CCPL.CCPL2 2
|
|
CCPL.CCPL1 1
|
|
CCPL.CCPL0 0
|
|
CCPH 0x00DF Compare timer 1 period register, high byte
|
|
CCPH.CCPH7 7
|
|
CCPH.CCPH6 6
|
|
CCPH.CCPH5 5
|
|
CCPH.CCPH4 4
|
|
CCPH.CCPH3 3
|
|
CCPH.CCPH2 2
|
|
CCPH.CCPH1 1
|
|
CCPH.CCPH0 0
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
CT1CON 0x00E1 Compare timer 1 control register
|
|
CT1CON.CTM 7
|
|
CT1CON.ETRP 6
|
|
CT1CON.STE1 5
|
|
CT1CON.CT1RES 4
|
|
CT1CON.CT1R 3
|
|
CT1CON.CLK2 2
|
|
CT1CON.CLK1 1
|
|
CT1CON.CLK0 0
|
|
COINI 0x00E2 Compare output initialization register
|
|
COINI.COUT3I 7
|
|
COINI.COUTXI 6
|
|
COINI.COUT2I 5
|
|
COINI.CC2I 4
|
|
COINI.COUT1I 3
|
|
COINI.CC1I 2
|
|
COINI.COUT0I 1
|
|
COINI.CC0I 0
|
|
CMSEL0 0x00E3 Capture/compare mode select register 0
|
|
CMSEL0.CMSEL13 7
|
|
CMSEL0.CMSEL12 6
|
|
CMSEL0.CMSEL11 5
|
|
CMSEL0.CMSEL10 4
|
|
CMSEL0.CMSEL03 3
|
|
CMSEL0.CMSEL02 2
|
|
CMSEL0.CMSEL01 1
|
|
CMSEL0.CMSEL00 0
|
|
CMSEL1 0x00E4 Capture/compare mode select register 1
|
|
CMSEL1.CMSEL23 3
|
|
CMSEL1.CMSEL22 2
|
|
CMSEL1.CMSEL21 1
|
|
CMSEL1.CMSEL20 0
|
|
CCIR 0x00E5 Capture/compare interrupt request flag reg.
|
|
CCIR.CT1FP 7
|
|
CCIR.CT1FC 6
|
|
CCIR.CC2F 5
|
|
CCIR.CC2R 4
|
|
CCIR.CC1F 3
|
|
CCIR.CC1R 2
|
|
CCIR.CC0F 1
|
|
CCIR.CC0R 0
|
|
CT1OFL 0x00E6 Compare timer 1 offset register, low byte
|
|
CT1OFL.CT1OFL7 7
|
|
CT1OFL.CT1OFL6 6
|
|
CT1OFL.CT1OFL5 5
|
|
CT1OFL.CT1OFL4 4
|
|
CT1OFL.CT1OFL3 3
|
|
CT1OFL.CT1OFL2 2
|
|
CT1OFL.CT1OFL1 1
|
|
CT1OFL.CT1OFL0 0
|
|
; alex - this was cause for error message "duplicate address 0xe6 at line 950"
|
|
;CT1OFH 0x00E6 Compare timer 1 offset register, high byte
|
|
;CT1OFH.CT1OFH7 7
|
|
;CT1OFH.CT1OFH6 6
|
|
;CT1OFH.CT1OFH5 5
|
|
;CT1OFH.CT1OFH4 4
|
|
;CT1OFH.CT1OFH3 3
|
|
;CT1OFH.CT1OFH2 2
|
|
;CT1OFH.CT1OFH1 1
|
|
;CT1OFH.CT1OFH0 0
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
RESERVED00E8 0x00E8 RESERVED
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C505
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=11843&parent_oid=8088
|
|
; C505C.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF700
|
|
area BSS RESERVED 0xF700:0xFF00
|
|
area DATA XRAM 0xFF00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry CAN_SWI 0x004B CAN Controller / Software Interrupt
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry IRTC 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.P14 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN7 7
|
|
; P1ANA.EAN6 6
|
|
; P1ANA.EAN5 5
|
|
; P1ANA.EAN4 4
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register (C505/C505C/C505A only)
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.CMOD 3
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.ECAN 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.SWI 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Reload Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Reload Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDAT 0x00D9 A/D Converter Data Reg. (C505 / C505C only)
|
|
ADDAT.ADDAT7 7
|
|
ADDAT.ADDAT6 6
|
|
ADDAT.ADDAT5 5
|
|
ADDAT.ADDAT4 4
|
|
ADDAT.ADDAT3 3
|
|
ADDAT.ADDAT2 2
|
|
ADDAT.ADDAT1 1
|
|
ADDAT.ADDAT0 0
|
|
ADST 0x00DA A/D Converter Start Reg. (C505 / C505C only)
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.RXDC 1
|
|
P4.TXDC 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C505A
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=11843&parent_oid=8088
|
|
; C505C.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF700
|
|
area BSS RESERVED 0xF700:0xFC00
|
|
area DATA XRAM 0xFC00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry CAN_SWI 0x004B CAN Controller / Software Interrupt
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry IRTC 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.P14 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN7 7
|
|
; P1ANA.EAN6 6
|
|
; P1ANA.EAN5 5
|
|
; P1ANA.EAN4 4
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register (C505/C505C/C505A only)
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.CMOD 3
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.ECAN 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.SWI 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Reload Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Reload Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter High Byte Data Register (C505A / C505CA only)
|
|
ADDATH.ADDATH7 7
|
|
ADDATH.ADDATH6 6
|
|
ADDATH.ADDATH5 5
|
|
ADDATH.ADDATH4 4
|
|
ADDATH.ADDATH3 3
|
|
ADDATH.ADDATH2 2
|
|
ADDATH.ADDATH1 1
|
|
ADDATH.ADDATH0 0
|
|
ADDATL 0x00DA A/D Converter Low Byte Data Register (C505A / C505CA only)
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.RXDC 1
|
|
P4.TXDC 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C505C
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=11843&parent_oid=8088
|
|
; C505C.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF700
|
|
area DATA CAN 0xF700:0xF800
|
|
area BSS RESERVED 0xF800:0xFF00
|
|
area DATA XRAM 0xFF00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry CAN_SWI 0x004B CAN Controller / Software Interrupt
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry IRTC 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.P14 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN7 7
|
|
; P1ANA.EAN6 6
|
|
; P1ANA.EAN5 5
|
|
; P1ANA.EAN4 4
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register (C505/C505C/C505A only)
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.CMOD 3
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.ECAN 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.SWI 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Reload Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Reload Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDAT 0x00D9 A/D Converter Data Reg. (C505 / C505C only)
|
|
ADDAT.ADDAT7 7
|
|
ADDAT.ADDAT6 6
|
|
ADDAT.ADDAT5 5
|
|
ADDAT.ADDAT4 4
|
|
ADDAT.ADDAT3 3
|
|
ADDAT.ADDAT2 2
|
|
ADDAT.ADDAT1 1
|
|
ADDAT.ADDAT0 0
|
|
ADST 0x00DA A/D Converter Start Reg. (C505 / C505C only)
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.RXDC 1
|
|
P4.TXDC 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
; -------------------------------------- CAN --------------------------------
|
|
CR 0xF700 Control Register
|
|
CR.TEST 7
|
|
CR.CCE 6
|
|
CR.EIE 3
|
|
CR.SIE 2
|
|
CR.IE 1
|
|
CR.INIT 0
|
|
SR 0xF701 Status Register
|
|
SR.BOFF 7
|
|
SR.EWRN 6
|
|
SR.RXOK 4
|
|
SR.TXOK 3
|
|
SR.LEC2 2
|
|
SR.LEC1 1
|
|
SR.LEC0 0
|
|
IR 0xF702 Interrupt Register
|
|
IR.INTID7 7
|
|
IR.INTID6 6
|
|
IR.INTID5 5
|
|
IR.INTID4 4
|
|
IR.INTID3 3
|
|
IR.INTID2 2
|
|
IR.INTID1 1
|
|
IR.INTID0 0
|
|
RESERVEDF703 0xF703 RESERVED
|
|
BTR0 0xF704 Bit Timing Register Low
|
|
BTR0.SJW7 7
|
|
BTR0.SJW6 6
|
|
BTR0.BRP5 5
|
|
BTR0.BRP4 4
|
|
BTR0.BRP3 3
|
|
BTR0.BRP2 2
|
|
BTR0.BRP1 1
|
|
BTR0.BRP0 0
|
|
BTR1 0xF705 Bit Timing Register High
|
|
BTR1.TSEG26 6
|
|
BTR1.TSEG25 5
|
|
BTR1.TSEG24 4
|
|
BTR1.TSEG13 3
|
|
BTR1.TSEG12 2
|
|
BTR1.TSEG11 1
|
|
BTR1.TSEG10 0
|
|
GMS0 0xF706 Global Mask Short Register Low
|
|
GMS0.ID28 7
|
|
GMS0.ID27 6
|
|
GMS0.ID26 5
|
|
GMS0.ID25 4
|
|
GMS0.ID24 3
|
|
GMS0.ID23 2
|
|
GMS0.ID22 1
|
|
GMS0.ID21 0
|
|
GMS1 0xF707 Global Mask Short Register High
|
|
GMS1.ID20 7
|
|
GMS1.ID19 6
|
|
GMS1.ID18 5
|
|
UGML0 0xF708 Upper Global Mask Long Register Low
|
|
UGML0.ID28 7
|
|
UGML0.ID27 6
|
|
UGML0.ID26 5
|
|
UGML0.ID25 4
|
|
UGML0.ID24 3
|
|
UGML0.ID23 2
|
|
UGML0.ID22 1
|
|
UGML0.ID21 0
|
|
UGML1 0xF709 Upper Global Mask Long Register High
|
|
UGML1.ID20 7
|
|
UGML1.ID19 6
|
|
UGML1.ID18 5
|
|
UGML1.ID17 4
|
|
UGML1.ID16 3
|
|
UGML1.ID15 2
|
|
UGML1.ID14 1
|
|
UGML1.ID13 0
|
|
LGML0 0xF70A Lower Global Mask Long Register Low
|
|
LGML0.ID12 7
|
|
LGML0.ID11 6
|
|
LGML0.ID10 5
|
|
LGML0.ID9 4
|
|
LGML0.ID8 3
|
|
LGML0.ID7 2
|
|
LGML0.ID6 1
|
|
LGML0.ID5 0
|
|
LGML1 0xF70B Lower Global Mask Long Register High
|
|
LGML1.ID4 7
|
|
LGML1.ID3 6
|
|
LGML1.ID2 5
|
|
LGML1.ID1 4
|
|
LGML1.ID0 3
|
|
UMLM0 0xF70C Upper Mask of Last Message Register Low
|
|
UMLM0.ID28 7
|
|
UMLM0.ID27 6
|
|
UMLM0.ID26 5
|
|
UMLM0.ID25 4
|
|
UMLM0.ID24 3
|
|
UMLM0.ID23 2
|
|
UMLM0.ID22 1
|
|
UMLM0.ID21 0
|
|
UMLM1 0xF70D Upper Mask of Last Message Register High
|
|
UMLM1.ID20 7
|
|
UMLM1.ID19 6
|
|
UMLM1.ID18 5
|
|
UMLM1.ID17 4
|
|
UMLM1.ID16 3
|
|
UMLM1.ID15 2
|
|
UMLM1.ID14 1
|
|
UMLM1.ID13 0
|
|
LMLM0 0xF70E Lower Mask of Last Message Register Low
|
|
LMLM0.ID12 7
|
|
LMLM0.ID11 6
|
|
LMLM0.ID10 5
|
|
LMLM0.ID9 4
|
|
LMLM0.ID8 3
|
|
LMLM0.ID7 2
|
|
LMLM0.ID6 1
|
|
LMLM0.ID5 0
|
|
LMLM1 0xF70F Lower Mask of Last Message Register High
|
|
LMLM1.ID4 7
|
|
LMLM1.ID3 6
|
|
LMLM1.ID2 5
|
|
LMLM1.ID1 4
|
|
LMLM1.ID0 3
|
|
; -------------------------------------- CAN_1 --------------------------------
|
|
MCR0_1 0xF710 Message Control Register Low
|
|
MCR0_1.MSGVAL1 7
|
|
MCR0_1.MSGVAL0 6
|
|
MCR0_1.TXIE1 5
|
|
MCR0_1.TXIE0 4
|
|
MCR0_1.RXIE1 3
|
|
MCR0_1.RXIE0 2
|
|
MCR0_1.INTPND1 1
|
|
MCR0_1.INTPND0 0
|
|
MCR1_1 0xF711 Message Control Register High
|
|
MCR1_1.RMTPND1 7
|
|
MCR1_1.RMTPND0 6
|
|
MCR1_1.TXRQ1 5
|
|
MCR1_1.TXRQ0 4
|
|
MCR1_1.MSGLSTCPUUPD1 3
|
|
MCR1_1.MSGLSTCPUUPD0 2
|
|
MCR1_1.NEWDAT1 1
|
|
MCR1_1.NEWDAT0 0
|
|
UAR0_1 0xF712 Upper Arbitration Register Low
|
|
UAR0_1.ID28 7
|
|
UAR0_1.ID27 6
|
|
UAR0_1.ID26 5
|
|
UAR0_1.ID25 4
|
|
UAR0_1.ID24 3
|
|
UAR0_1.ID23 2
|
|
UAR0_1.ID22 1
|
|
UAR0_1.ID21 0
|
|
UAR1_1 0xF713 Upper Arbitration Register High
|
|
UAR1_1.ID20 7
|
|
UAR1_1.ID19 6
|
|
UAR1_1.ID18 5
|
|
UAR1_1.ID17 4
|
|
UAR1_1.ID16 3
|
|
UAR1_1.ID15 2
|
|
UAR1_1.ID14 1
|
|
UAR1_1.ID13 0
|
|
LAR0_1 0xF714 Lower Arbitration Register Low
|
|
LAR0_1.ID12 7
|
|
LAR0_1.ID11 6
|
|
LAR0_1.ID10 5
|
|
LAR0_1.ID9 4
|
|
LAR0_1.ID8 3
|
|
LAR0_1.ID7 2
|
|
LAR0_1.ID6 1
|
|
LAR0_1.ID5 0
|
|
LAR1_1 0xF715 Lower Arbitration Register High
|
|
LAR1_1.ID4 7
|
|
LAR1_1.ID3 6
|
|
LAR1_1.ID2 5
|
|
LAR1_1.ID1 4
|
|
LAR1_1.ID0 3
|
|
MCFG_1 0xF716 Message Configuration Register
|
|
MCFG_1.DLC7 7
|
|
MCFG_1.DLC6 6
|
|
MCFG_1.DLC5 5
|
|
MCFG_1.DLC4 4
|
|
MCFG_1.DIR 3
|
|
MCFG_1.XTD 2
|
|
DB0_1 0xF717 Message Data Byte 0
|
|
DB0_1.DB07 7
|
|
DB0_1.DB06 6
|
|
DB0_1.DB05 5
|
|
DB0_1.DB04 4
|
|
DB0_1.DB03 3
|
|
DB0_1.DB02 2
|
|
DB0_1.DB01 1
|
|
DB0_1.DB00 0
|
|
DB1_1 0xF718 Message Data Byte 1
|
|
DB1_1.DB17 7
|
|
DB1_1.DB16 6
|
|
DB1_1.DB15 5
|
|
DB1_1.DB14 4
|
|
DB1_1.DB13 3
|
|
DB1_1.DB12 2
|
|
DB1_1.DB11 1
|
|
DB1_1.DB10 0
|
|
DB2_1 0xF719 Message Data Byte 2
|
|
DB2_1.DB27 7
|
|
DB2_1.DB26 6
|
|
DB2_1.DB25 5
|
|
DB2_1.DB24 4
|
|
DB2_1.DB23 3
|
|
DB2_1.DB22 2
|
|
DB2_1.DB21 1
|
|
DB2_1.DB20 0
|
|
DB3_1 0xF71A Message Data Byte 3
|
|
DB3_1.DB37 7
|
|
DB3_1.DB36 6
|
|
DB3_1.DB35 5
|
|
DB3_1.DB34 4
|
|
DB3_1.DB33 3
|
|
DB3_1.DB32 2
|
|
DB3_1.DB31 1
|
|
DB3_1.DB30 0
|
|
DB4_1 0xF71B Message Data Byte 4
|
|
DB4_1.DB47 7
|
|
DB4_1.DB46 6
|
|
DB4_1.DB45 5
|
|
DB4_1.DB44 4
|
|
DB4_1.DB43 3
|
|
DB4_1.DB42 2
|
|
DB4_1.DB41 1
|
|
DB4_1.DB40 0
|
|
DB5_1 0xF71C Message Data Byte 5
|
|
DB5_1.DB57 7
|
|
DB5_1.DB56 6
|
|
DB5_1.DB55 5
|
|
DB5_1.DB54 4
|
|
DB5_1.DB53 3
|
|
DB5_1.DB52 2
|
|
DB5_1.DB51 1
|
|
DB5_1.DB50 0
|
|
DB6_1 0xF71D Message Data Byte 6
|
|
DB6_1.DB67 7
|
|
DB6_1.DB66 6
|
|
DB6_1.DB65 5
|
|
DB6_1.DB64 4
|
|
DB6_1.DB63 3
|
|
DB6_1.DB62 2
|
|
DB6_1.DB61 1
|
|
DB6_1.DB60 0
|
|
DB7_1 0xF71E Message Data Byte 7
|
|
DB7_1.DB77 7
|
|
DB7_1.DB76 6
|
|
DB7_1.DB75 5
|
|
DB7_1.DB74 4
|
|
DB7_1.DB73 3
|
|
DB7_1.DB72 2
|
|
DB7_1.DB71 1
|
|
DB7_1.DB70 0
|
|
RESERVEDF71F 0xF71F RESERVED
|
|
; -------------------------------------- CAN_2 --------------------------------
|
|
MCR0_2 0xF720 Message Control Register Low
|
|
MCR0_2.MSGVAL1 7
|
|
MCR0_2.MSGVAL0 6
|
|
MCR0_2.TXIE1 5
|
|
MCR0_2.TXIE0 4
|
|
MCR0_2.RXIE1 3
|
|
MCR0_2.RXIE0 2
|
|
MCR0_2.INTPND1 1
|
|
MCR0_2.INTPND0 0
|
|
MCR1_2 0xF721 Message Control Register High
|
|
MCR1_2.RMTPND1 7
|
|
MCR1_2.RMTPND0 6
|
|
MCR1_2.TXRQ1 5
|
|
MCR1_2.TXRQ0 4
|
|
MCR1_2.MSGLSTCPUUPD1 3
|
|
MCR1_2.MSGLSTCPUUPD0 2
|
|
MCR1_2.NEWDAT1 1
|
|
MCR1_2.NEWDAT0 0
|
|
UAR0_2 0xF722 Upper Arbitration Register Low
|
|
UAR0_2.ID28 7
|
|
UAR0_2.ID27 6
|
|
UAR0_2.ID26 5
|
|
UAR0_2.ID25 4
|
|
UAR0_2.ID24 3
|
|
UAR0_2.ID23 2
|
|
UAR0_2.ID22 1
|
|
UAR0_2.ID21 0
|
|
UAR1_2 0xF723 Upper Arbitration Register High
|
|
UAR1_2.ID20 7
|
|
UAR1_2.ID19 6
|
|
UAR1_2.ID18 5
|
|
UAR1_2.ID17 4
|
|
UAR1_2.ID16 3
|
|
UAR1_2.ID15 2
|
|
UAR1_2.ID14 1
|
|
UAR1_2.ID13 0
|
|
LAR0_2 0xF724 Lower Arbitration Register Low
|
|
LAR0_2.ID12 7
|
|
LAR0_2.ID11 6
|
|
LAR0_2.ID10 5
|
|
LAR0_2.ID9 4
|
|
LAR0_2.ID8 3
|
|
LAR0_2.ID7 2
|
|
LAR0_2.ID6 1
|
|
LAR0_2.ID5 0
|
|
LAR1_2 0xF725 Lower Arbitration Register High
|
|
LAR1_2.ID4 7
|
|
LAR1_2.ID3 6
|
|
LAR1_2.ID2 5
|
|
LAR1_2.ID1 4
|
|
LAR1_2.ID0 3
|
|
MCFG_2 0xF726 Message Configuration Register
|
|
MCFG_2.DLC7 7
|
|
MCFG_2.DLC6 6
|
|
MCFG_2.DLC5 5
|
|
MCFG_2.DLC4 4
|
|
MCFG_2.DIR 3
|
|
MCFG_2.XTD 2
|
|
DB0_2 0xF727 Message Data Byte 0
|
|
DB0_2.DB07 7
|
|
DB0_2.DB06 6
|
|
DB0_2.DB05 5
|
|
DB0_2.DB04 4
|
|
DB0_2.DB03 3
|
|
DB0_2.DB02 2
|
|
DB0_2.DB01 1
|
|
DB0_2.DB00 0
|
|
DB1_2 0xF728 Message Data Byte 1
|
|
DB1_2.DB17 7
|
|
DB1_2.DB16 6
|
|
DB1_2.DB15 5
|
|
DB1_2.DB14 4
|
|
DB1_2.DB13 3
|
|
DB1_2.DB12 2
|
|
DB1_2.DB11 1
|
|
DB1_2.DB10 0
|
|
DB2_2 0xF729 Message Data Byte 2
|
|
DB2_2.DB27 7
|
|
DB2_2.DB26 6
|
|
DB2_2.DB25 5
|
|
DB2_2.DB24 4
|
|
DB2_2.DB23 3
|
|
DB2_2.DB22 2
|
|
DB2_2.DB21 1
|
|
DB2_2.DB20 0
|
|
DB3_2 0xF72A Message Data Byte 3
|
|
DB3_2.DB37 7
|
|
DB3_2.DB36 6
|
|
DB3_2.DB35 5
|
|
DB3_2.DB34 4
|
|
DB3_2.DB33 3
|
|
DB3_2.DB32 2
|
|
DB3_2.DB31 1
|
|
DB3_2.DB30 0
|
|
DB4_2 0xF72B Message Data Byte 4
|
|
DB4_2.DB47 7
|
|
DB4_2.DB46 6
|
|
DB4_2.DB45 5
|
|
DB4_2.DB44 4
|
|
DB4_2.DB43 3
|
|
DB4_2.DB42 2
|
|
DB4_2.DB41 1
|
|
DB4_2.DB40 0
|
|
DB5_2 0xF72C Message Data Byte 5
|
|
DB5_2.DB57 7
|
|
DB5_2.DB56 6
|
|
DB5_2.DB55 5
|
|
DB5_2.DB54 4
|
|
DB5_2.DB53 3
|
|
DB5_2.DB52 2
|
|
DB5_2.DB51 1
|
|
DB5_2.DB50 0
|
|
DB6_2 0xF72D Message Data Byte 6
|
|
DB6_2.DB67 7
|
|
DB6_2.DB66 6
|
|
DB6_2.DB65 5
|
|
DB6_2.DB64 4
|
|
DB6_2.DB63 3
|
|
DB6_2.DB62 2
|
|
DB6_2.DB61 1
|
|
DB6_2.DB60 0
|
|
DB7_2 0xF72E Message Data Byte 7
|
|
DB7_2.DB77 7
|
|
DB7_2.DB76 6
|
|
DB7_2.DB75 5
|
|
DB7_2.DB74 4
|
|
DB7_2.DB73 3
|
|
DB7_2.DB72 2
|
|
DB7_2.DB71 1
|
|
DB7_2.DB70 0
|
|
RESERVEDF72F 0xF72F RESERVED
|
|
; -------------------------------------- CAN_3 --------------------------------
|
|
MCR0_3 0xF730 Message Control Register Low
|
|
MCR0_3.MSGVAL1 7
|
|
MCR0_3.MSGVAL0 6
|
|
MCR0_3.TXIE1 5
|
|
MCR0_3.TXIE0 4
|
|
MCR0_3.RXIE1 3
|
|
MCR0_3.RXIE0 2
|
|
MCR0_3.INTPND1 1
|
|
MCR0_3.INTPND0 0
|
|
MCR1_3 0xF731 Message Control Register High
|
|
MCR1_3.RMTPND1 7
|
|
MCR1_3.RMTPND0 6
|
|
MCR1_3.TXRQ1 5
|
|
MCR1_3.TXRQ0 4
|
|
MCR1_3.MSGLSTCPUUPD1 3
|
|
MCR1_3.MSGLSTCPUUPD0 2
|
|
MCR1_3.NEWDAT1 1
|
|
MCR1_3.NEWDAT0 0
|
|
UAR0_3 0xF732 Upper Arbitration Register Low
|
|
UAR0_3.ID28 7
|
|
UAR0_3.ID27 6
|
|
UAR0_3.ID26 5
|
|
UAR0_3.ID25 4
|
|
UAR0_3.ID24 3
|
|
UAR0_3.ID23 2
|
|
UAR0_3.ID22 1
|
|
UAR0_3.ID21 0
|
|
UAR1_3 0xF733 Upper Arbitration Register High
|
|
UAR1_3.ID20 7
|
|
UAR1_3.ID19 6
|
|
UAR1_3.ID18 5
|
|
UAR1_3.ID17 4
|
|
UAR1_3.ID16 3
|
|
UAR1_3.ID15 2
|
|
UAR1_3.ID14 1
|
|
UAR1_3.ID13 0
|
|
LAR0_3 0xF734 Lower Arbitration Register Low
|
|
LAR0_3.ID12 7
|
|
LAR0_3.ID11 6
|
|
LAR0_3.ID10 5
|
|
LAR0_3.ID9 4
|
|
LAR0_3.ID8 3
|
|
LAR0_3.ID7 2
|
|
LAR0_3.ID6 1
|
|
LAR0_3.ID5 0
|
|
LAR1_3 0xF735 Lower Arbitration Register High
|
|
LAR1_3.ID4 7
|
|
LAR1_3.ID3 6
|
|
LAR1_3.ID2 5
|
|
LAR1_3.ID1 4
|
|
LAR1_3.ID0 3
|
|
MCFG_3 0xF736 Message Configuration Register
|
|
MCFG_3.DLC7 7
|
|
MCFG_3.DLC6 6
|
|
MCFG_3.DLC5 5
|
|
MCFG_3.DLC4 4
|
|
MCFG_3.DIR 3
|
|
MCFG_3.XTD 2
|
|
DB0_3 0xF737 Message Data Byte 0
|
|
DB0_3.DB07 7
|
|
DB0_3.DB06 6
|
|
DB0_3.DB05 5
|
|
DB0_3.DB04 4
|
|
DB0_3.DB03 3
|
|
DB0_3.DB02 2
|
|
DB0_3.DB01 1
|
|
DB0_3.DB00 0
|
|
DB1_3 0xF738 Message Data Byte 1
|
|
DB1_3.DB17 7
|
|
DB1_3.DB16 6
|
|
DB1_3.DB15 5
|
|
DB1_3.DB14 4
|
|
DB1_3.DB13 3
|
|
DB1_3.DB12 2
|
|
DB1_3.DB11 1
|
|
DB1_3.DB10 0
|
|
DB2_3 0xF739 Message Data Byte 2
|
|
DB2_3.DB27 7
|
|
DB2_3.DB26 6
|
|
DB2_3.DB25 5
|
|
DB2_3.DB24 4
|
|
DB2_3.DB23 3
|
|
DB2_3.DB22 2
|
|
DB2_3.DB21 1
|
|
DB2_3.DB20 0
|
|
DB3_3 0xF73A Message Data Byte 3
|
|
DB3_3.DB37 7
|
|
DB3_3.DB36 6
|
|
DB3_3.DB35 5
|
|
DB3_3.DB34 4
|
|
DB3_3.DB33 3
|
|
DB3_3.DB32 2
|
|
DB3_3.DB31 1
|
|
DB3_3.DB30 0
|
|
DB4_3 0xF73B Message Data Byte 4
|
|
DB4_3.DB47 7
|
|
DB4_3.DB46 6
|
|
DB4_3.DB45 5
|
|
DB4_3.DB44 4
|
|
DB4_3.DB43 3
|
|
DB4_3.DB42 2
|
|
DB4_3.DB41 1
|
|
DB4_3.DB40 0
|
|
DB5_3 0xF73C Message Data Byte 5
|
|
DB5_3.DB57 7
|
|
DB5_3.DB56 6
|
|
DB5_3.DB55 5
|
|
DB5_3.DB54 4
|
|
DB5_3.DB53 3
|
|
DB5_3.DB52 2
|
|
DB5_3.DB51 1
|
|
DB5_3.DB50 0
|
|
DB6_3 0xF73D Message Data Byte 6
|
|
DB6_3.DB67 7
|
|
DB6_3.DB66 6
|
|
DB6_3.DB65 5
|
|
DB6_3.DB64 4
|
|
DB6_3.DB63 3
|
|
DB6_3.DB62 2
|
|
DB6_3.DB61 1
|
|
DB6_3.DB60 0
|
|
DB7_3 0xF73E Message Data Byte 7
|
|
DB7_3.DB77 7
|
|
DB7_3.DB76 6
|
|
DB7_3.DB75 5
|
|
DB7_3.DB74 4
|
|
DB7_3.DB73 3
|
|
DB7_3.DB72 2
|
|
DB7_3.DB71 1
|
|
DB7_3.DB70 0
|
|
RESERVEDF73F 0xF73F RESERVED
|
|
; -------------------------------------- CAN_4 --------------------------------
|
|
MCR0_4 0xF740 Message Control Register Low
|
|
MCR0_4.MSGVAL1 7
|
|
MCR0_4.MSGVAL0 6
|
|
MCR0_4.TXIE1 5
|
|
MCR0_4.TXIE0 4
|
|
MCR0_4.RXIE1 3
|
|
MCR0_4.RXIE0 2
|
|
MCR0_4.INTPND1 1
|
|
MCR0_4.INTPND0 0
|
|
MCR1_4 0xF741 Message Control Register High
|
|
MCR1_4.RMTPND1 7
|
|
MCR1_4.RMTPND0 6
|
|
MCR1_4.TXRQ1 5
|
|
MCR1_4.TXRQ0 4
|
|
MCR1_4.MSGLSTCPUUPD1 3
|
|
MCR1_4.MSGLSTCPUUPD0 2
|
|
MCR1_4.NEWDAT1 1
|
|
MCR1_4.NEWDAT0 0
|
|
UAR0_4 0xF742 Upper Arbitration Register Low
|
|
UAR0_4.ID28 7
|
|
UAR0_4.ID27 6
|
|
UAR0_4.ID26 5
|
|
UAR0_4.ID25 4
|
|
UAR0_4.ID24 3
|
|
UAR0_4.ID23 2
|
|
UAR0_4.ID22 1
|
|
UAR0_4.ID21 0
|
|
UAR1_4 0xF743 Upper Arbitration Register High
|
|
UAR1_4.ID20 7
|
|
UAR1_4.ID19 6
|
|
UAR1_4.ID18 5
|
|
UAR1_4.ID17 4
|
|
UAR1_4.ID16 3
|
|
UAR1_4.ID15 2
|
|
UAR1_4.ID14 1
|
|
UAR1_4.ID13 0
|
|
LAR0_4 0xF744 Lower Arbitration Register Low
|
|
LAR0_4.ID12 7
|
|
LAR0_4.ID11 6
|
|
LAR0_4.ID10 5
|
|
LAR0_4.ID9 4
|
|
LAR0_4.ID8 3
|
|
LAR0_4.ID7 2
|
|
LAR0_4.ID6 1
|
|
LAR0_4.ID5 0
|
|
LAR1_4 0xF745 Lower Arbitration Register High
|
|
LAR1_4.ID4 7
|
|
LAR1_4.ID3 6
|
|
LAR1_4.ID2 5
|
|
LAR1_4.ID1 4
|
|
LAR1_4.ID0 3
|
|
MCFG_4 0xF746 Message Configuration Register
|
|
MCFG_4.DLC7 7
|
|
MCFG_4.DLC6 6
|
|
MCFG_4.DLC5 5
|
|
MCFG_4.DLC4 4
|
|
MCFG_4.DIR 3
|
|
MCFG_4.XTD 2
|
|
DB0_4 0xF747 Message Data Byte 0
|
|
DB0_4.DB07 7
|
|
DB0_4.DB06 6
|
|
DB0_4.DB05 5
|
|
DB0_4.DB04 4
|
|
DB0_4.DB03 3
|
|
DB0_4.DB02 2
|
|
DB0_4.DB01 1
|
|
DB0_4.DB00 0
|
|
DB1_4 0xF748 Message Data Byte 1
|
|
DB1_4.DB17 7
|
|
DB1_4.DB16 6
|
|
DB1_4.DB15 5
|
|
DB1_4.DB14 4
|
|
DB1_4.DB13 3
|
|
DB1_4.DB12 2
|
|
DB1_4.DB11 1
|
|
DB1_4.DB10 0
|
|
DB2_4 0xF749 Message Data Byte 2
|
|
DB2_4.DB27 7
|
|
DB2_4.DB26 6
|
|
DB2_4.DB25 5
|
|
DB2_4.DB24 4
|
|
DB2_4.DB23 3
|
|
DB2_4.DB22 2
|
|
DB2_4.DB21 1
|
|
DB2_4.DB20 0
|
|
DB3_4 0xF74A Message Data Byte 3
|
|
DB3_4.DB37 7
|
|
DB3_4.DB36 6
|
|
DB3_4.DB35 5
|
|
DB3_4.DB34 4
|
|
DB3_4.DB33 3
|
|
DB3_4.DB32 2
|
|
DB3_4.DB31 1
|
|
DB3_4.DB30 0
|
|
DB4_4 0xF74B Message Data Byte 4
|
|
DB4_4.DB47 7
|
|
DB4_4.DB46 6
|
|
DB4_4.DB45 5
|
|
DB4_4.DB44 4
|
|
DB4_4.DB43 3
|
|
DB4_4.DB42 2
|
|
DB4_4.DB41 1
|
|
DB4_4.DB40 0
|
|
DB5_4 0xF74C Message Data Byte 5
|
|
DB5_4.DB57 7
|
|
DB5_4.DB56 6
|
|
DB5_4.DB55 5
|
|
DB5_4.DB54 4
|
|
DB5_4.DB53 3
|
|
DB5_4.DB52 2
|
|
DB5_4.DB51 1
|
|
DB5_4.DB50 0
|
|
DB6_4 0xF74D Message Data Byte 6
|
|
DB6_4.DB67 7
|
|
DB6_4.DB66 6
|
|
DB6_4.DB65 5
|
|
DB6_4.DB64 4
|
|
DB6_4.DB63 3
|
|
DB6_4.DB62 2
|
|
DB6_4.DB61 1
|
|
DB6_4.DB60 0
|
|
DB7_4 0xF74E Message Data Byte 7
|
|
DB7_4.DB77 7
|
|
DB7_4.DB76 6
|
|
DB7_4.DB75 5
|
|
DB7_4.DB74 4
|
|
DB7_4.DB73 3
|
|
DB7_4.DB72 2
|
|
DB7_4.DB71 1
|
|
DB7_4.DB70 0
|
|
RESERVEDF74F 0xF74F RESERVED
|
|
; -------------------------------------- CAN_5 --------------------------------
|
|
MCR0_5 0xF750 Message Control Register Low
|
|
MCR0_5.MSGVAL1 7
|
|
MCR0_5.MSGVAL0 6
|
|
MCR0_5.TXIE1 5
|
|
MCR0_5.TXIE0 4
|
|
MCR0_5.RXIE1 3
|
|
MCR0_5.RXIE0 2
|
|
MCR0_5.INTPND1 1
|
|
MCR0_5.INTPND0 0
|
|
MCR1_5 0xF751 Message Control Register High
|
|
MCR1_5.RMTPND1 7
|
|
MCR1_5.RMTPND0 6
|
|
MCR1_5.TXRQ1 5
|
|
MCR1_5.TXRQ0 4
|
|
MCR1_5.MSGLSTCPUUPD1 3
|
|
MCR1_5.MSGLSTCPUUPD0 2
|
|
MCR1_5.NEWDAT1 1
|
|
MCR1_5.NEWDAT0 0
|
|
UAR0_5 0xF752 Upper Arbitration Register Low
|
|
UAR0_5.ID28 7
|
|
UAR0_5.ID27 6
|
|
UAR0_5.ID26 5
|
|
UAR0_5.ID25 4
|
|
UAR0_5.ID24 3
|
|
UAR0_5.ID23 2
|
|
UAR0_5.ID22 1
|
|
UAR0_5.ID21 0
|
|
UAR1_5 0xF753 Upper Arbitration Register High
|
|
UAR1_5.ID20 7
|
|
UAR1_5.ID19 6
|
|
UAR1_5.ID18 5
|
|
UAR1_5.ID17 4
|
|
UAR1_5.ID16 3
|
|
UAR1_5.ID15 2
|
|
UAR1_5.ID14 1
|
|
UAR1_5.ID13 0
|
|
LAR0_5 0xF754 Lower Arbitration Register Low
|
|
LAR0_5.ID12 7
|
|
LAR0_5.ID11 6
|
|
LAR0_5.ID10 5
|
|
LAR0_5.ID9 4
|
|
LAR0_5.ID8 3
|
|
LAR0_5.ID7 2
|
|
LAR0_5.ID6 1
|
|
LAR0_5.ID5 0
|
|
LAR1_5 0xF755 Lower Arbitration Register High
|
|
LAR1_5.ID4 7
|
|
LAR1_5.ID3 6
|
|
LAR1_5.ID2 5
|
|
LAR1_5.ID1 4
|
|
LAR1_5.ID0 3
|
|
MCFG_5 0xF756 Message Configuration Register
|
|
MCFG_5.DLC7 7
|
|
MCFG_5.DLC6 6
|
|
MCFG_5.DLC5 5
|
|
MCFG_5.DLC4 4
|
|
MCFG_5.DIR 3
|
|
MCFG_5.XTD 2
|
|
DB0_5 0xF757 Message Data Byte 0
|
|
DB0_5.DB07 7
|
|
DB0_5.DB06 6
|
|
DB0_5.DB05 5
|
|
DB0_5.DB04 4
|
|
DB0_5.DB03 3
|
|
DB0_5.DB02 2
|
|
DB0_5.DB01 1
|
|
DB0_5.DB00 0
|
|
DB1_5 0xF758 Message Data Byte 1
|
|
DB1_5.DB17 7
|
|
DB1_5.DB16 6
|
|
DB1_5.DB15 5
|
|
DB1_5.DB14 4
|
|
DB1_5.DB13 3
|
|
DB1_5.DB12 2
|
|
DB1_5.DB11 1
|
|
DB1_5.DB10 0
|
|
DB2_5 0xF759 Message Data Byte 2
|
|
DB2_5.DB27 7
|
|
DB2_5.DB26 6
|
|
DB2_5.DB25 5
|
|
DB2_5.DB24 4
|
|
DB2_5.DB23 3
|
|
DB2_5.DB22 2
|
|
DB2_5.DB21 1
|
|
DB2_5.DB20 0
|
|
DB3_5 0xF75A Message Data Byte 3
|
|
DB3_5.DB37 7
|
|
DB3_5.DB36 6
|
|
DB3_5.DB35 5
|
|
DB3_5.DB34 4
|
|
DB3_5.DB33 3
|
|
DB3_5.DB32 2
|
|
DB3_5.DB31 1
|
|
DB3_5.DB30 0
|
|
DB4_5 0xF75B Message Data Byte 4
|
|
DB4_5.DB47 7
|
|
DB4_5.DB46 6
|
|
DB4_5.DB45 5
|
|
DB4_5.DB44 4
|
|
DB4_5.DB43 3
|
|
DB4_5.DB42 2
|
|
DB4_5.DB41 1
|
|
DB4_5.DB40 0
|
|
DB5_5 0xF75C Message Data Byte 5
|
|
DB5_5.DB57 7
|
|
DB5_5.DB56 6
|
|
DB5_5.DB55 5
|
|
DB5_5.DB54 4
|
|
DB5_5.DB53 3
|
|
DB5_5.DB52 2
|
|
DB5_5.DB51 1
|
|
DB5_5.DB50 0
|
|
DB6_5 0xF75D Message Data Byte 6
|
|
DB6_5.DB67 7
|
|
DB6_5.DB66 6
|
|
DB6_5.DB65 5
|
|
DB6_5.DB64 4
|
|
DB6_5.DB63 3
|
|
DB6_5.DB62 2
|
|
DB6_5.DB61 1
|
|
DB6_5.DB60 0
|
|
DB7_5 0xF75E Message Data Byte 7
|
|
DB7_5.DB77 7
|
|
DB7_5.DB76 6
|
|
DB7_5.DB75 5
|
|
DB7_5.DB74 4
|
|
DB7_5.DB73 3
|
|
DB7_5.DB72 2
|
|
DB7_5.DB71 1
|
|
DB7_5.DB70 0
|
|
RESERVEDF75F 0xF75F RESERVED
|
|
; -------------------------------------- CAN_6 --------------------------------
|
|
MCR0_6 0xF760 Message Control Register Low
|
|
MCR0_6.MSGVAL1 7
|
|
MCR0_6.MSGVAL0 6
|
|
MCR0_6.TXIE1 5
|
|
MCR0_6.TXIE0 4
|
|
MCR0_6.RXIE1 3
|
|
MCR0_6.RXIE0 2
|
|
MCR0_6.INTPND1 1
|
|
MCR0_6.INTPND0 0
|
|
MCR1_6 0xF761 Message Control Register High
|
|
MCR1_6.RMTPND1 7
|
|
MCR1_6.RMTPND0 6
|
|
MCR1_6.TXRQ1 5
|
|
MCR1_6.TXRQ0 4
|
|
MCR1_6.MSGLSTCPUUPD1 3
|
|
MCR1_6.MSGLSTCPUUPD0 2
|
|
MCR1_6.NEWDAT1 1
|
|
MCR1_6.NEWDAT0 0
|
|
UAR0_6 0xF762 Upper Arbitration Register Low
|
|
UAR0_6.ID28 7
|
|
UAR0_6.ID27 6
|
|
UAR0_6.ID26 5
|
|
UAR0_6.ID25 4
|
|
UAR0_6.ID24 3
|
|
UAR0_6.ID23 2
|
|
UAR0_6.ID22 1
|
|
UAR0_6.ID21 0
|
|
UAR1_6 0xF763 Upper Arbitration Register High
|
|
UAR1_6.ID20 7
|
|
UAR1_6.ID19 6
|
|
UAR1_6.ID18 5
|
|
UAR1_6.ID17 4
|
|
UAR1_6.ID16 3
|
|
UAR1_6.ID15 2
|
|
UAR1_6.ID14 1
|
|
UAR1_6.ID13 0
|
|
LAR0_6 0xF764 Lower Arbitration Register Low
|
|
LAR0_6.ID12 7
|
|
LAR0_6.ID11 6
|
|
LAR0_6.ID10 5
|
|
LAR0_6.ID9 4
|
|
LAR0_6.ID8 3
|
|
LAR0_6.ID7 2
|
|
LAR0_6.ID6 1
|
|
LAR0_6.ID5 0
|
|
LAR1_6 0xF765 Lower Arbitration Register High
|
|
LAR1_6.ID4 7
|
|
LAR1_6.ID3 6
|
|
LAR1_6.ID2 5
|
|
LAR1_6.ID1 4
|
|
LAR1_6.ID0 3
|
|
MCFG_6 0xF766 Message Configuration Register
|
|
MCFG_6.DLC7 7
|
|
MCFG_6.DLC6 6
|
|
MCFG_6.DLC5 5
|
|
MCFG_6.DLC4 4
|
|
MCFG_6.DIR 3
|
|
MCFG_6.XTD 2
|
|
DB0_6 0xF767 Message Data Byte 0
|
|
DB0_6.DB07 7
|
|
DB0_6.DB06 6
|
|
DB0_6.DB05 5
|
|
DB0_6.DB04 4
|
|
DB0_6.DB03 3
|
|
DB0_6.DB02 2
|
|
DB0_6.DB01 1
|
|
DB0_6.DB00 0
|
|
DB1_6 0xF768 Message Data Byte 1
|
|
DB1_6.DB17 7
|
|
DB1_6.DB16 6
|
|
DB1_6.DB15 5
|
|
DB1_6.DB14 4
|
|
DB1_6.DB13 3
|
|
DB1_6.DB12 2
|
|
DB1_6.DB11 1
|
|
DB1_6.DB10 0
|
|
DB2_6 0xF769 Message Data Byte 2
|
|
DB2_6.DB27 7
|
|
DB2_6.DB26 6
|
|
DB2_6.DB25 5
|
|
DB2_6.DB24 4
|
|
DB2_6.DB23 3
|
|
DB2_6.DB22 2
|
|
DB2_6.DB21 1
|
|
DB2_6.DB20 0
|
|
DB3_6 0xF76A Message Data Byte 3
|
|
DB3_6.DB37 7
|
|
DB3_6.DB36 6
|
|
DB3_6.DB35 5
|
|
DB3_6.DB34 4
|
|
DB3_6.DB33 3
|
|
DB3_6.DB32 2
|
|
DB3_6.DB31 1
|
|
DB3_6.DB30 0
|
|
DB4_6 0xF76B Message Data Byte 4
|
|
DB4_6.DB47 7
|
|
DB4_6.DB46 6
|
|
DB4_6.DB45 5
|
|
DB4_6.DB44 4
|
|
DB4_6.DB43 3
|
|
DB4_6.DB42 2
|
|
DB4_6.DB41 1
|
|
DB4_6.DB40 0
|
|
DB5_6 0xF76C Message Data Byte 5
|
|
DB5_6.DB57 7
|
|
DB5_6.DB56 6
|
|
DB5_6.DB55 5
|
|
DB5_6.DB54 4
|
|
DB5_6.DB53 3
|
|
DB5_6.DB52 2
|
|
DB5_6.DB51 1
|
|
DB5_6.DB50 0
|
|
DB6_6 0xF76D Message Data Byte 6
|
|
DB6_6.DB67 7
|
|
DB6_6.DB66 6
|
|
DB6_6.DB65 5
|
|
DB6_6.DB64 4
|
|
DB6_6.DB63 3
|
|
DB6_6.DB62 2
|
|
DB6_6.DB61 1
|
|
DB6_6.DB60 0
|
|
DB7_6 0xF76E Message Data Byte 7
|
|
DB7_6.DB77 7
|
|
DB7_6.DB76 6
|
|
DB7_6.DB75 5
|
|
DB7_6.DB74 4
|
|
DB7_6.DB73 3
|
|
DB7_6.DB72 2
|
|
DB7_6.DB71 1
|
|
DB7_6.DB70 0
|
|
RESERVEDF76F 0xF76F RESERVED
|
|
; -------------------------------------- CAN_7 --------------------------------
|
|
MCR0_7 0xF770 Message Control Register Low
|
|
MCR0_7.MSGVAL1 7
|
|
MCR0_7.MSGVAL0 6
|
|
MCR0_7.TXIE1 5
|
|
MCR0_7.TXIE0 4
|
|
MCR0_7.RXIE1 3
|
|
MCR0_7.RXIE0 2
|
|
MCR0_7.INTPND1 1
|
|
MCR0_7.INTPND0 0
|
|
MCR1_7 0xF771 Message Control Register High
|
|
MCR1_7.RMTPND1 7
|
|
MCR1_7.RMTPND0 6
|
|
MCR1_7.TXRQ1 5
|
|
MCR1_7.TXRQ0 4
|
|
MCR1_7.MSGLSTCPUUPD1 3
|
|
MCR1_7.MSGLSTCPUUPD0 2
|
|
MCR1_7.NEWDAT1 1
|
|
MCR1_7.NEWDAT0 0
|
|
UAR0_7 0xF772 Upper Arbitration Register Low
|
|
UAR0_7.ID28 7
|
|
UAR0_7.ID27 6
|
|
UAR0_7.ID26 5
|
|
UAR0_7.ID25 4
|
|
UAR0_7.ID24 3
|
|
UAR0_7.ID23 2
|
|
UAR0_7.ID22 1
|
|
UAR0_7.ID21 0
|
|
UAR1_7 0xF773 Upper Arbitration Register High
|
|
UAR1_7.ID20 7
|
|
UAR1_7.ID19 6
|
|
UAR1_7.ID18 5
|
|
UAR1_7.ID17 4
|
|
UAR1_7.ID16 3
|
|
UAR1_7.ID15 2
|
|
UAR1_7.ID14 1
|
|
UAR1_7.ID13 0
|
|
LAR0_7 0xF774 Lower Arbitration Register Low
|
|
LAR0_7.ID12 7
|
|
LAR0_7.ID11 6
|
|
LAR0_7.ID10 5
|
|
LAR0_7.ID9 4
|
|
LAR0_7.ID8 3
|
|
LAR0_7.ID7 2
|
|
LAR0_7.ID6 1
|
|
LAR0_7.ID5 0
|
|
LAR1_7 0xF775 Lower Arbitration Register High
|
|
LAR1_7.ID4 7
|
|
LAR1_7.ID3 6
|
|
LAR1_7.ID2 5
|
|
LAR1_7.ID1 4
|
|
LAR1_7.ID0 3
|
|
MCFG_7 0xF776 Message Configuration Register
|
|
MCFG_7.DLC7 7
|
|
MCFG_7.DLC6 6
|
|
MCFG_7.DLC5 5
|
|
MCFG_7.DLC4 4
|
|
MCFG_7.DIR 3
|
|
MCFG_7.XTD 2
|
|
DB0_7 0xF777 Message Data Byte 0
|
|
DB0_7.DB07 7
|
|
DB0_7.DB06 6
|
|
DB0_7.DB05 5
|
|
DB0_7.DB04 4
|
|
DB0_7.DB03 3
|
|
DB0_7.DB02 2
|
|
DB0_7.DB01 1
|
|
DB0_7.DB00 0
|
|
DB1_7 0xF778 Message Data Byte 1
|
|
DB1_7.DB17 7
|
|
DB1_7.DB16 6
|
|
DB1_7.DB15 5
|
|
DB1_7.DB14 4
|
|
DB1_7.DB13 3
|
|
DB1_7.DB12 2
|
|
DB1_7.DB11 1
|
|
DB1_7.DB10 0
|
|
DB2_7 0xF779 Message Data Byte 2
|
|
DB2_7.DB27 7
|
|
DB2_7.DB26 6
|
|
DB2_7.DB25 5
|
|
DB2_7.DB24 4
|
|
DB2_7.DB23 3
|
|
DB2_7.DB22 2
|
|
DB2_7.DB21 1
|
|
DB2_7.DB20 0
|
|
DB3_7 0xF77A Message Data Byte 3
|
|
DB3_7.DB37 7
|
|
DB3_7.DB36 6
|
|
DB3_7.DB35 5
|
|
DB3_7.DB34 4
|
|
DB3_7.DB33 3
|
|
DB3_7.DB32 2
|
|
DB3_7.DB31 1
|
|
DB3_7.DB30 0
|
|
DB4_7 0xF77B Message Data Byte 4
|
|
DB4_7.DB47 7
|
|
DB4_7.DB46 6
|
|
DB4_7.DB45 5
|
|
DB4_7.DB44 4
|
|
DB4_7.DB43 3
|
|
DB4_7.DB42 2
|
|
DB4_7.DB41 1
|
|
DB4_7.DB40 0
|
|
DB5_7 0xF77C Message Data Byte 5
|
|
DB5_7.DB57 7
|
|
DB5_7.DB56 6
|
|
DB5_7.DB55 5
|
|
DB5_7.DB54 4
|
|
DB5_7.DB53 3
|
|
DB5_7.DB52 2
|
|
DB5_7.DB51 1
|
|
DB5_7.DB50 0
|
|
DB6_7 0xF77D Message Data Byte 6
|
|
DB6_7.DB67 7
|
|
DB6_7.DB66 6
|
|
DB6_7.DB65 5
|
|
DB6_7.DB64 4
|
|
DB6_7.DB63 3
|
|
DB6_7.DB62 2
|
|
DB6_7.DB61 1
|
|
DB6_7.DB60 0
|
|
DB7_7 0xF77E Message Data Byte 7
|
|
DB7_7.DB77 7
|
|
DB7_7.DB76 6
|
|
DB7_7.DB75 5
|
|
DB7_7.DB74 4
|
|
DB7_7.DB73 3
|
|
DB7_7.DB72 2
|
|
DB7_7.DB71 1
|
|
DB7_7.DB70 0
|
|
RESERVEDF77F 0xF77F RESERVED
|
|
; -------------------------------------- CAN_8 --------------------------------
|
|
MCR0_8 0xF780 Message Control Register Low
|
|
MCR0_8.MSGVAL1 7
|
|
MCR0_8.MSGVAL0 6
|
|
MCR0_8.TXIE1 5
|
|
MCR0_8.TXIE0 4
|
|
MCR0_8.RXIE1 3
|
|
MCR0_8.RXIE0 2
|
|
MCR0_8.INTPND1 1
|
|
MCR0_8.INTPND0 0
|
|
MCR1_8 0xF781 Message Control Register High
|
|
MCR1_8.RMTPND1 7
|
|
MCR1_8.RMTPND0 6
|
|
MCR1_8.TXRQ1 5
|
|
MCR1_8.TXRQ0 4
|
|
MCR1_8.MSGLSTCPUUPD1 3
|
|
MCR1_8.MSGLSTCPUUPD0 2
|
|
MCR1_8.NEWDAT1 1
|
|
MCR1_8.NEWDAT0 0
|
|
UAR0_8 0xF782 Upper Arbitration Register Low
|
|
UAR0_8.ID28 7
|
|
UAR0_8.ID27 6
|
|
UAR0_8.ID26 5
|
|
UAR0_8.ID25 4
|
|
UAR0_8.ID24 3
|
|
UAR0_8.ID23 2
|
|
UAR0_8.ID22 1
|
|
UAR0_8.ID21 0
|
|
UAR1_8 0xF783 Upper Arbitration Register High
|
|
UAR1_8.ID20 7
|
|
UAR1_8.ID19 6
|
|
UAR1_8.ID18 5
|
|
UAR1_8.ID17 4
|
|
UAR1_8.ID16 3
|
|
UAR1_8.ID15 2
|
|
UAR1_8.ID14 1
|
|
UAR1_8.ID13 0
|
|
LAR0_8 0xF784 Lower Arbitration Register Low
|
|
LAR0_8.ID12 7
|
|
LAR0_8.ID11 6
|
|
LAR0_8.ID10 5
|
|
LAR0_8.ID9 4
|
|
LAR0_8.ID8 3
|
|
LAR0_8.ID7 2
|
|
LAR0_8.ID6 1
|
|
LAR0_8.ID5 0
|
|
LAR1_8 0xF785 Lower Arbitration Register High
|
|
LAR1_8.ID4 7
|
|
LAR1_8.ID3 6
|
|
LAR1_8.ID2 5
|
|
LAR1_8.ID1 4
|
|
LAR1_8.ID0 3
|
|
MCFG_8 0xF786 Message Configuration Register
|
|
MCFG_8.DLC7 7
|
|
MCFG_8.DLC6 6
|
|
MCFG_8.DLC5 5
|
|
MCFG_8.DLC4 4
|
|
MCFG_8.DIR 3
|
|
MCFG_8.XTD 2
|
|
DB0_8 0xF787 Message Data Byte 0
|
|
DB0_8.DB07 7
|
|
DB0_8.DB06 6
|
|
DB0_8.DB05 5
|
|
DB0_8.DB04 4
|
|
DB0_8.DB03 3
|
|
DB0_8.DB02 2
|
|
DB0_8.DB01 1
|
|
DB0_8.DB00 0
|
|
DB1_8 0xF788 Message Data Byte 1
|
|
DB1_8.DB17 7
|
|
DB1_8.DB16 6
|
|
DB1_8.DB15 5
|
|
DB1_8.DB14 4
|
|
DB1_8.DB13 3
|
|
DB1_8.DB12 2
|
|
DB1_8.DB11 1
|
|
DB1_8.DB10 0
|
|
DB2_8 0xF789 Message Data Byte 2
|
|
DB2_8.DB27 7
|
|
DB2_8.DB26 6
|
|
DB2_8.DB25 5
|
|
DB2_8.DB24 4
|
|
DB2_8.DB23 3
|
|
DB2_8.DB22 2
|
|
DB2_8.DB21 1
|
|
DB2_8.DB20 0
|
|
DB3_8 0xF78A Message Data Byte 3
|
|
DB3_8.DB37 7
|
|
DB3_8.DB36 6
|
|
DB3_8.DB35 5
|
|
DB3_8.DB34 4
|
|
DB3_8.DB33 3
|
|
DB3_8.DB32 2
|
|
DB3_8.DB31 1
|
|
DB3_8.DB30 0
|
|
DB4_8 0xF78B Message Data Byte 4
|
|
DB4_8.DB47 7
|
|
DB4_8.DB46 6
|
|
DB4_8.DB45 5
|
|
DB4_8.DB44 4
|
|
DB4_8.DB43 3
|
|
DB4_8.DB42 2
|
|
DB4_8.DB41 1
|
|
DB4_8.DB40 0
|
|
DB5_8 0xF78C Message Data Byte 5
|
|
DB5_8.DB57 7
|
|
DB5_8.DB56 6
|
|
DB5_8.DB55 5
|
|
DB5_8.DB54 4
|
|
DB5_8.DB53 3
|
|
DB5_8.DB52 2
|
|
DB5_8.DB51 1
|
|
DB5_8.DB50 0
|
|
DB6_8 0xF78D Message Data Byte 6
|
|
DB6_8.DB67 7
|
|
DB6_8.DB66 6
|
|
DB6_8.DB65 5
|
|
DB6_8.DB64 4
|
|
DB6_8.DB63 3
|
|
DB6_8.DB62 2
|
|
DB6_8.DB61 1
|
|
DB6_8.DB60 0
|
|
DB7_8 0xF78E Message Data Byte 7
|
|
DB7_8.DB77 7
|
|
DB7_8.DB76 6
|
|
DB7_8.DB75 5
|
|
DB7_8.DB74 4
|
|
DB7_8.DB73 3
|
|
DB7_8.DB72 2
|
|
DB7_8.DB71 1
|
|
DB7_8.DB70 0
|
|
RESERVEDF78F 0xF78F RESERVED
|
|
; -------------------------------------- CAN_9 --------------------------------
|
|
MCR0_9 0xF790 Message Control Register Low
|
|
MCR0_9.MSGVAL1 7
|
|
MCR0_9.MSGVAL0 6
|
|
MCR0_9.TXIE1 5
|
|
MCR0_9.TXIE0 4
|
|
MCR0_9.RXIE1 3
|
|
MCR0_9.RXIE0 2
|
|
MCR0_9.INTPND1 1
|
|
MCR0_9.INTPND0 0
|
|
MCR1_9 0xF791 Message Control Register High
|
|
MCR1_9.RMTPND1 7
|
|
MCR1_9.RMTPND0 6
|
|
MCR1_9.TXRQ1 5
|
|
MCR1_9.TXRQ0 4
|
|
MCR1_9.MSGLSTCPUUPD1 3
|
|
MCR1_9.MSGLSTCPUUPD0 2
|
|
MCR1_9.NEWDAT1 1
|
|
MCR1_9.NEWDAT0 0
|
|
UAR0_9 0xF792 Upper Arbitration Register Low
|
|
UAR0_9.ID28 7
|
|
UAR0_9.ID27 6
|
|
UAR0_9.ID26 5
|
|
UAR0_9.ID25 4
|
|
UAR0_9.ID24 3
|
|
UAR0_9.ID23 2
|
|
UAR0_9.ID22 1
|
|
UAR0_9.ID21 0
|
|
UAR1_9 0xF793 Upper Arbitration Register High
|
|
UAR1_9.ID20 7
|
|
UAR1_9.ID19 6
|
|
UAR1_9.ID18 5
|
|
UAR1_9.ID17 4
|
|
UAR1_9.ID16 3
|
|
UAR1_9.ID15 2
|
|
UAR1_9.ID14 1
|
|
UAR1_9.ID13 0
|
|
LAR0_9 0xF794 Lower Arbitration Register Low
|
|
LAR0_9.ID12 7
|
|
LAR0_9.ID11 6
|
|
LAR0_9.ID10 5
|
|
LAR0_9.ID9 4
|
|
LAR0_9.ID8 3
|
|
LAR0_9.ID7 2
|
|
LAR0_9.ID6 1
|
|
LAR0_9.ID5 0
|
|
LAR1_9 0xF795 Lower Arbitration Register High
|
|
LAR1_9.ID4 7
|
|
LAR1_9.ID3 6
|
|
LAR1_9.ID2 5
|
|
LAR1_9.ID1 4
|
|
LAR1_9.ID0 3
|
|
MCFG_9 0xF796 Message Configuration Register
|
|
MCFG_9.DLC7 7
|
|
MCFG_9.DLC6 6
|
|
MCFG_9.DLC5 5
|
|
MCFG_9.DLC4 4
|
|
MCFG_9.DIR 3
|
|
MCFG_9.XTD 2
|
|
DB0_9 0xF797 Message Data Byte 0
|
|
DB0_9.DB07 7
|
|
DB0_9.DB06 6
|
|
DB0_9.DB05 5
|
|
DB0_9.DB04 4
|
|
DB0_9.DB03 3
|
|
DB0_9.DB02 2
|
|
DB0_9.DB01 1
|
|
DB0_9.DB00 0
|
|
DB1_9 0xF798 Message Data Byte 1
|
|
DB1_9.DB17 7
|
|
DB1_9.DB16 6
|
|
DB1_9.DB15 5
|
|
DB1_9.DB14 4
|
|
DB1_9.DB13 3
|
|
DB1_9.DB12 2
|
|
DB1_9.DB11 1
|
|
DB1_9.DB10 0
|
|
DB2_9 0xF799 Message Data Byte 2
|
|
DB2_9.DB27 7
|
|
DB2_9.DB26 6
|
|
DB2_9.DB25 5
|
|
DB2_9.DB24 4
|
|
DB2_9.DB23 3
|
|
DB2_9.DB22 2
|
|
DB2_9.DB21 1
|
|
DB2_9.DB20 0
|
|
DB3_9 0xF79A Message Data Byte 3
|
|
DB3_9.DB37 7
|
|
DB3_9.DB36 6
|
|
DB3_9.DB35 5
|
|
DB3_9.DB34 4
|
|
DB3_9.DB33 3
|
|
DB3_9.DB32 2
|
|
DB3_9.DB31 1
|
|
DB3_9.DB30 0
|
|
DB4_9 0xF79B Message Data Byte 4
|
|
DB4_9.DB47 7
|
|
DB4_9.DB46 6
|
|
DB4_9.DB45 5
|
|
DB4_9.DB44 4
|
|
DB4_9.DB43 3
|
|
DB4_9.DB42 2
|
|
DB4_9.DB41 1
|
|
DB4_9.DB40 0
|
|
DB5_9 0xF79C Message Data Byte 5
|
|
DB5_9.DB57 7
|
|
DB5_9.DB56 6
|
|
DB5_9.DB55 5
|
|
DB5_9.DB54 4
|
|
DB5_9.DB53 3
|
|
DB5_9.DB52 2
|
|
DB5_9.DB51 1
|
|
DB5_9.DB50 0
|
|
DB6_9 0xF79D Message Data Byte 6
|
|
DB6_9.DB67 7
|
|
DB6_9.DB66 6
|
|
DB6_9.DB65 5
|
|
DB6_9.DB64 4
|
|
DB6_9.DB63 3
|
|
DB6_9.DB62 2
|
|
DB6_9.DB61 1
|
|
DB6_9.DB60 0
|
|
DB7_9 0xF79E Message Data Byte 7
|
|
DB7_9.DB77 7
|
|
DB7_9.DB76 6
|
|
DB7_9.DB75 5
|
|
DB7_9.DB74 4
|
|
DB7_9.DB73 3
|
|
DB7_9.DB72 2
|
|
DB7_9.DB71 1
|
|
DB7_9.DB70 0
|
|
RESERVEDF79F 0xF79F RESERVED
|
|
; -------------------------------------- CAN_A --------------------------------
|
|
MCR0_A 0xF7A0 Message Control Register Low
|
|
MCR0_A.MSGVAL1 7
|
|
MCR0_A.MSGVAL0 6
|
|
MCR0_A.TXIE1 5
|
|
MCR0_A.TXIE0 4
|
|
MCR0_A.RXIE1 3
|
|
MCR0_A.RXIE0 2
|
|
MCR0_A.INTPND1 1
|
|
MCR0_A.INTPND0 0
|
|
MCR1_A 0xF7A1 Message Control Register High
|
|
MCR1_A.RMTPND1 7
|
|
MCR1_A.RMTPND0 6
|
|
MCR1_A.TXRQ1 5
|
|
MCR1_A.TXRQ0 4
|
|
MCR1_A.MSGLSTCPUUPD1 3
|
|
MCR1_A.MSGLSTCPUUPD0 2
|
|
MCR1_A.NEWDAT1 1
|
|
MCR1_A.NEWDAT0 0
|
|
UAR0_A 0xF7A2 Upper Arbitration Register Low
|
|
UAR0_A.ID28 7
|
|
UAR0_A.ID27 6
|
|
UAR0_A.ID26 5
|
|
UAR0_A.ID25 4
|
|
UAR0_A.ID24 3
|
|
UAR0_A.ID23 2
|
|
UAR0_A.ID22 1
|
|
UAR0_A.ID21 0
|
|
UAR1_A 0xF7A3 Upper Arbitration Register High
|
|
UAR1_A.ID20 7
|
|
UAR1_A.ID19 6
|
|
UAR1_A.ID18 5
|
|
UAR1_A.ID17 4
|
|
UAR1_A.ID16 3
|
|
UAR1_A.ID15 2
|
|
UAR1_A.ID14 1
|
|
UAR1_A.ID13 0
|
|
LAR0_A 0xF7A4 Lower Arbitration Register Low
|
|
LAR0_A.ID12 7
|
|
LAR0_A.ID11 6
|
|
LAR0_A.ID10 5
|
|
LAR0_A.ID9 4
|
|
LAR0_A.ID8 3
|
|
LAR0_A.ID7 2
|
|
LAR0_A.ID6 1
|
|
LAR0_A.ID5 0
|
|
LAR1_A 0xF7A5 Lower Arbitration Register High
|
|
LAR1_A.ID4 7
|
|
LAR1_A.ID3 6
|
|
LAR1_A.ID2 5
|
|
LAR1_A.ID1 4
|
|
LAR1_A.ID0 3
|
|
MCFG_A 0xF7A6 Message Configuration Register
|
|
MCFG_A.DLC7 7
|
|
MCFG_A.DLC6 6
|
|
MCFG_A.DLC5 5
|
|
MCFG_A.DLC4 4
|
|
MCFG_A.DIR 3
|
|
MCFG_A.XTD 2
|
|
DB0_A 0xF7A7 Message Data Byte 0
|
|
DB0_A.DB07 7
|
|
DB0_A.DB06 6
|
|
DB0_A.DB05 5
|
|
DB0_A.DB04 4
|
|
DB0_A.DB03 3
|
|
DB0_A.DB02 2
|
|
DB0_A.DB01 1
|
|
DB0_A.DB00 0
|
|
DB1_A 0xF7A8 Message Data Byte 1
|
|
DB1_A.DB17 7
|
|
DB1_A.DB16 6
|
|
DB1_A.DB15 5
|
|
DB1_A.DB14 4
|
|
DB1_A.DB13 3
|
|
DB1_A.DB12 2
|
|
DB1_A.DB11 1
|
|
DB1_A.DB10 0
|
|
DB2_A 0xF7A9 Message Data Byte 2
|
|
DB2_A.DB27 7
|
|
DB2_A.DB26 6
|
|
DB2_A.DB25 5
|
|
DB2_A.DB24 4
|
|
DB2_A.DB23 3
|
|
DB2_A.DB22 2
|
|
DB2_A.DB21 1
|
|
DB2_A.DB20 0
|
|
DB3_A 0xF7AA Message Data Byte 3
|
|
DB3_A.DB37 7
|
|
DB3_A.DB36 6
|
|
DB3_A.DB35 5
|
|
DB3_A.DB34 4
|
|
DB3_A.DB33 3
|
|
DB3_A.DB32 2
|
|
DB3_A.DB31 1
|
|
DB3_A.DB30 0
|
|
DB4_A 0xF7AB Message Data Byte 4
|
|
DB4_A.DB47 7
|
|
DB4_A.DB46 6
|
|
DB4_A.DB45 5
|
|
DB4_A.DB44 4
|
|
DB4_A.DB43 3
|
|
DB4_A.DB42 2
|
|
DB4_A.DB41 1
|
|
DB4_A.DB40 0
|
|
DB5_A 0xF7AC Message Data Byte 5
|
|
DB5_A.DB57 7
|
|
DB5_A.DB56 6
|
|
DB5_A.DB55 5
|
|
DB5_A.DB54 4
|
|
DB5_A.DB53 3
|
|
DB5_A.DB52 2
|
|
DB5_A.DB51 1
|
|
DB5_A.DB50 0
|
|
DB6_A 0xF7AD Message Data Byte 6
|
|
DB6_A.DB67 7
|
|
DB6_A.DB66 6
|
|
DB6_A.DB65 5
|
|
DB6_A.DB64 4
|
|
DB6_A.DB63 3
|
|
DB6_A.DB62 2
|
|
DB6_A.DB61 1
|
|
DB6_A.DB60 0
|
|
DB7_A 0xF7AE Message Data Byte 7
|
|
DB7_A.DB77 7
|
|
DB7_A.DB76 6
|
|
DB7_A.DB75 5
|
|
DB7_A.DB74 4
|
|
DB7_A.DB73 3
|
|
DB7_A.DB72 2
|
|
DB7_A.DB71 1
|
|
DB7_A.DB70 0
|
|
RESERVEDF7AF 0xF7AF RESERVED
|
|
; -------------------------------------- CAN_B --------------------------------
|
|
MCR0_B 0xF7B0 Message Control Register Low
|
|
MCR0_B.MSGVAL1 7
|
|
MCR0_B.MSGVAL0 6
|
|
MCR0_B.TXIE1 5
|
|
MCR0_B.TXIE0 4
|
|
MCR0_B.RXIE1 3
|
|
MCR0_B.RXIE0 2
|
|
MCR0_B.INTPND1 1
|
|
MCR0_B.INTPND0 0
|
|
MCR1_B 0xF7B1 Message Control Register High
|
|
MCR1_B.RMTPND1 7
|
|
MCR1_B.RMTPND0 6
|
|
MCR1_B.TXRQ1 5
|
|
MCR1_B.TXRQ0 4
|
|
MCR1_B.MSGLSTCPUUPD1 3
|
|
MCR1_B.MSGLSTCPUUPD0 2
|
|
MCR1_B.NEWDAT1 1
|
|
MCR1_B.NEWDAT0 0
|
|
UAR0_B 0xF7B2 Upper Arbitration Register Low
|
|
UAR0_B.ID28 7
|
|
UAR0_B.ID27 6
|
|
UAR0_B.ID26 5
|
|
UAR0_B.ID25 4
|
|
UAR0_B.ID24 3
|
|
UAR0_B.ID23 2
|
|
UAR0_B.ID22 1
|
|
UAR0_B.ID21 0
|
|
UAR1_B 0xF7B3 Upper Arbitration Register High
|
|
UAR1_B.ID20 7
|
|
UAR1_B.ID19 6
|
|
UAR1_B.ID18 5
|
|
UAR1_B.ID17 4
|
|
UAR1_B.ID16 3
|
|
UAR1_B.ID15 2
|
|
UAR1_B.ID14 1
|
|
UAR1_B.ID13 0
|
|
LAR0_B 0xF7B4 Lower Arbitration Register Low
|
|
LAR0_B.ID12 7
|
|
LAR0_B.ID11 6
|
|
LAR0_B.ID10 5
|
|
LAR0_B.ID9 4
|
|
LAR0_B.ID8 3
|
|
LAR0_B.ID7 2
|
|
LAR0_B.ID6 1
|
|
LAR0_B.ID5 0
|
|
LAR1_B 0xF7B5 Lower Arbitration Register High
|
|
LAR1_B.ID4 7
|
|
LAR1_B.ID3 6
|
|
LAR1_B.ID2 5
|
|
LAR1_B.ID1 4
|
|
LAR1_B.ID0 3
|
|
MCFG_B 0xF7B6 Message Configuration Register
|
|
MCFG_B.DLC7 7
|
|
MCFG_B.DLC6 6
|
|
MCFG_B.DLC5 5
|
|
MCFG_B.DLC4 4
|
|
MCFG_B.DIR 3
|
|
MCFG_B.XTD 2
|
|
DB0_B 0xF7B7 Message Data Byte 0
|
|
DB0_B.DB07 7
|
|
DB0_B.DB06 6
|
|
DB0_B.DB05 5
|
|
DB0_B.DB04 4
|
|
DB0_B.DB03 3
|
|
DB0_B.DB02 2
|
|
DB0_B.DB01 1
|
|
DB0_B.DB00 0
|
|
DB1_B 0xF7B8 Message Data Byte 1
|
|
DB1_B.DB17 7
|
|
DB1_B.DB16 6
|
|
DB1_B.DB15 5
|
|
DB1_B.DB14 4
|
|
DB1_B.DB13 3
|
|
DB1_B.DB12 2
|
|
DB1_B.DB11 1
|
|
DB1_B.DB10 0
|
|
DB2_B 0xF7B9 Message Data Byte 2
|
|
DB2_B.DB27 7
|
|
DB2_B.DB26 6
|
|
DB2_B.DB25 5
|
|
DB2_B.DB24 4
|
|
DB2_B.DB23 3
|
|
DB2_B.DB22 2
|
|
DB2_B.DB21 1
|
|
DB2_B.DB20 0
|
|
DB3_B 0xF7BA Message Data Byte 3
|
|
DB3_B.DB37 7
|
|
DB3_B.DB36 6
|
|
DB3_B.DB35 5
|
|
DB3_B.DB34 4
|
|
DB3_B.DB33 3
|
|
DB3_B.DB32 2
|
|
DB3_B.DB31 1
|
|
DB3_B.DB30 0
|
|
DB4_B 0xF7BB Message Data Byte 4
|
|
DB4_B.DB47 7
|
|
DB4_B.DB46 6
|
|
DB4_B.DB45 5
|
|
DB4_B.DB44 4
|
|
DB4_B.DB43 3
|
|
DB4_B.DB42 2
|
|
DB4_B.DB41 1
|
|
DB4_B.DB40 0
|
|
DB5_B 0xF7BC Message Data Byte 5
|
|
DB5_B.DB57 7
|
|
DB5_B.DB56 6
|
|
DB5_B.DB55 5
|
|
DB5_B.DB54 4
|
|
DB5_B.DB53 3
|
|
DB5_B.DB52 2
|
|
DB5_B.DB51 1
|
|
DB5_B.DB50 0
|
|
DB6_B 0xF7BD Message Data Byte 6
|
|
DB6_B.DB67 7
|
|
DB6_B.DB66 6
|
|
DB6_B.DB65 5
|
|
DB6_B.DB64 4
|
|
DB6_B.DB63 3
|
|
DB6_B.DB62 2
|
|
DB6_B.DB61 1
|
|
DB6_B.DB60 0
|
|
DB7_B 0xF7BE Message Data Byte 7
|
|
DB7_B.DB77 7
|
|
DB7_B.DB76 6
|
|
DB7_B.DB75 5
|
|
DB7_B.DB74 4
|
|
DB7_B.DB73 3
|
|
DB7_B.DB72 2
|
|
DB7_B.DB71 1
|
|
DB7_B.DB70 0
|
|
RESERVEDF7BF 0xF7BF RESERVED
|
|
; -------------------------------------- CAN_C --------------------------------
|
|
MCR0_C 0xF7C0 Message Control Register Low
|
|
MCR0_C.MSGVAL1 7
|
|
MCR0_C.MSGVAL0 6
|
|
MCR0_C.TXIE1 5
|
|
MCR0_C.TXIE0 4
|
|
MCR0_C.RXIE1 3
|
|
MCR0_C.RXIE0 2
|
|
MCR0_C.INTPND1 1
|
|
MCR0_C.INTPND0 0
|
|
MCR1_C 0xF7C1 Message Control Register High
|
|
MCR1_C.RMTPND1 7
|
|
MCR1_C.RMTPND0 6
|
|
MCR1_C.TXRQ1 5
|
|
MCR1_C.TXRQ0 4
|
|
MCR1_C.MSGLSTCPUUPD1 3
|
|
MCR1_C.MSGLSTCPUUPD0 2
|
|
MCR1_C.NEWDAT1 1
|
|
MCR1_C.NEWDAT0 0
|
|
UAR0_C 0xF7C2 Upper Arbitration Register Low
|
|
UAR0_C.ID28 7
|
|
UAR0_C.ID27 6
|
|
UAR0_C.ID26 5
|
|
UAR0_C.ID25 4
|
|
UAR0_C.ID24 3
|
|
UAR0_C.ID23 2
|
|
UAR0_C.ID22 1
|
|
UAR0_C.ID21 0
|
|
UAR1_C 0xF7C3 Upper Arbitration Register High
|
|
UAR1_C.ID20 7
|
|
UAR1_C.ID19 6
|
|
UAR1_C.ID18 5
|
|
UAR1_C.ID17 4
|
|
UAR1_C.ID16 3
|
|
UAR1_C.ID15 2
|
|
UAR1_C.ID14 1
|
|
UAR1_C.ID13 0
|
|
LAR0_C 0xF7C4 Lower Arbitration Register Low
|
|
LAR0_C.ID12 7
|
|
LAR0_C.ID11 6
|
|
LAR0_C.ID10 5
|
|
LAR0_C.ID9 4
|
|
LAR0_C.ID8 3
|
|
LAR0_C.ID7 2
|
|
LAR0_C.ID6 1
|
|
LAR0_C.ID5 0
|
|
LAR1_C 0xF7C5 Lower Arbitration Register High
|
|
LAR1_C.ID4 7
|
|
LAR1_C.ID3 6
|
|
LAR1_C.ID2 5
|
|
LAR1_C.ID1 4
|
|
LAR1_C.ID0 3
|
|
MCFG_C 0xF7C6 Message Configuration Register
|
|
MCFG_C.DLC7 7
|
|
MCFG_C.DLC6 6
|
|
MCFG_C.DLC5 5
|
|
MCFG_C.DLC4 4
|
|
MCFG_C.DIR 3
|
|
MCFG_C.XTD 2
|
|
DB0_C 0xF7C7 Message Data Byte 0
|
|
DB0_C.DB07 7
|
|
DB0_C.DB06 6
|
|
DB0_C.DB05 5
|
|
DB0_C.DB04 4
|
|
DB0_C.DB03 3
|
|
DB0_C.DB02 2
|
|
DB0_C.DB01 1
|
|
DB0_C.DB00 0
|
|
DB1_C 0xF7C8 Message Data Byte 1
|
|
DB1_C.DB17 7
|
|
DB1_C.DB16 6
|
|
DB1_C.DB15 5
|
|
DB1_C.DB14 4
|
|
DB1_C.DB13 3
|
|
DB1_C.DB12 2
|
|
DB1_C.DB11 1
|
|
DB1_C.DB10 0
|
|
DB2_C 0xF7C9 Message Data Byte 2
|
|
DB2_C.DB27 7
|
|
DB2_C.DB26 6
|
|
DB2_C.DB25 5
|
|
DB2_C.DB24 4
|
|
DB2_C.DB23 3
|
|
DB2_C.DB22 2
|
|
DB2_C.DB21 1
|
|
DB2_C.DB20 0
|
|
DB3_C 0xF7CA Message Data Byte 3
|
|
DB3_C.DB37 7
|
|
DB3_C.DB36 6
|
|
DB3_C.DB35 5
|
|
DB3_C.DB34 4
|
|
DB3_C.DB33 3
|
|
DB3_C.DB32 2
|
|
DB3_C.DB31 1
|
|
DB3_C.DB30 0
|
|
DB4_C 0xF7CB Message Data Byte 4
|
|
DB4_C.DB47 7
|
|
DB4_C.DB46 6
|
|
DB4_C.DB45 5
|
|
DB4_C.DB44 4
|
|
DB4_C.DB43 3
|
|
DB4_C.DB42 2
|
|
DB4_C.DB41 1
|
|
DB4_C.DB40 0
|
|
DB5_C 0xF7CC Message Data Byte 5
|
|
DB5_C.DB57 7
|
|
DB5_C.DB56 6
|
|
DB5_C.DB55 5
|
|
DB5_C.DB54 4
|
|
DB5_C.DB53 3
|
|
DB5_C.DB52 2
|
|
DB5_C.DB51 1
|
|
DB5_C.DB50 0
|
|
DB6_C 0xF7CD Message Data Byte 6
|
|
DB6_C.DB67 7
|
|
DB6_C.DB66 6
|
|
DB6_C.DB65 5
|
|
DB6_C.DB64 4
|
|
DB6_C.DB63 3
|
|
DB6_C.DB62 2
|
|
DB6_C.DB61 1
|
|
DB6_C.DB60 0
|
|
DB7_C 0xF7CE Message Data Byte 7
|
|
DB7_C.DB77 7
|
|
DB7_C.DB76 6
|
|
DB7_C.DB75 5
|
|
DB7_C.DB74 4
|
|
DB7_C.DB73 3
|
|
DB7_C.DB72 2
|
|
DB7_C.DB71 1
|
|
DB7_C.DB70 0
|
|
RESERVEDF7CF 0xF7CF RESERVED
|
|
; -------------------------------------- CAN_D --------------------------------
|
|
MCR0_D 0xF7D0 Message Control Register Low
|
|
MCR0_D.MSGVAL1 7
|
|
MCR0_D.MSGVAL0 6
|
|
MCR0_D.TXIE1 5
|
|
MCR0_D.TXIE0 4
|
|
MCR0_D.RXIE1 3
|
|
MCR0_D.RXIE0 2
|
|
MCR0_D.INTPND1 1
|
|
MCR0_D.INTPND0 0
|
|
MCR1_D 0xF7D1 Message Control Register High
|
|
MCR1_D.RMTPND1 7
|
|
MCR1_D.RMTPND0 6
|
|
MCR1_D.TXRQ1 5
|
|
MCR1_D.TXRQ0 4
|
|
MCR1_D.MSGLSTCPUUPD1 3
|
|
MCR1_D.MSGLSTCPUUPD0 2
|
|
MCR1_D.NEWDAT1 1
|
|
MCR1_D.NEWDAT0 0
|
|
UAR0_D 0xF7D2 Upper Arbitration Register Low
|
|
UAR0_D.ID28 7
|
|
UAR0_D.ID27 6
|
|
UAR0_D.ID26 5
|
|
UAR0_D.ID25 4
|
|
UAR0_D.ID24 3
|
|
UAR0_D.ID23 2
|
|
UAR0_D.ID22 1
|
|
UAR0_D.ID21 0
|
|
UAR1_D 0xF7D3 Upper Arbitration Register High
|
|
UAR1_D.ID20 7
|
|
UAR1_D.ID19 6
|
|
UAR1_D.ID18 5
|
|
UAR1_D.ID17 4
|
|
UAR1_D.ID16 3
|
|
UAR1_D.ID15 2
|
|
UAR1_D.ID14 1
|
|
UAR1_D.ID13 0
|
|
LAR0_D 0xF7D4 Lower Arbitration Register Low
|
|
LAR0_D.ID12 7
|
|
LAR0_D.ID11 6
|
|
LAR0_D.ID10 5
|
|
LAR0_D.ID9 4
|
|
LAR0_D.ID8 3
|
|
LAR0_D.ID7 2
|
|
LAR0_D.ID6 1
|
|
LAR0_D.ID5 0
|
|
LAR1_D 0xF7D5 Lower Arbitration Register High
|
|
LAR1_D.ID4 7
|
|
LAR1_D.ID3 6
|
|
LAR1_D.ID2 5
|
|
LAR1_D.ID1 4
|
|
LAR1_D.ID0 3
|
|
MCFG_D 0xF7D6 Message Configuration Register
|
|
MCFG_D.DLC7 7
|
|
MCFG_D.DLC6 6
|
|
MCFG_D.DLC5 5
|
|
MCFG_D.DLC4 4
|
|
MCFG_D.DIR 3
|
|
MCFG_D.XTD 2
|
|
DB0_D 0xF7D7 Message Data Byte 0
|
|
DB0_D.DB07 7
|
|
DB0_D.DB06 6
|
|
DB0_D.DB05 5
|
|
DB0_D.DB04 4
|
|
DB0_D.DB03 3
|
|
DB0_D.DB02 2
|
|
DB0_D.DB01 1
|
|
DB0_D.DB00 0
|
|
DB1_D 0xF7D8 Message Data Byte 1
|
|
DB1_D.DB17 7
|
|
DB1_D.DB16 6
|
|
DB1_D.DB15 5
|
|
DB1_D.DB14 4
|
|
DB1_D.DB13 3
|
|
DB1_D.DB12 2
|
|
DB1_D.DB11 1
|
|
DB1_D.DB10 0
|
|
DB2_D 0xF7D9 Message Data Byte 2
|
|
DB2_D.DB27 7
|
|
DB2_D.DB26 6
|
|
DB2_D.DB25 5
|
|
DB2_D.DB24 4
|
|
DB2_D.DB23 3
|
|
DB2_D.DB22 2
|
|
DB2_D.DB21 1
|
|
DB2_D.DB20 0
|
|
DB3_D 0xF7DA Message Data Byte 3
|
|
DB3_D.DB37 7
|
|
DB3_D.DB36 6
|
|
DB3_D.DB35 5
|
|
DB3_D.DB34 4
|
|
DB3_D.DB33 3
|
|
DB3_D.DB32 2
|
|
DB3_D.DB31 1
|
|
DB3_D.DB30 0
|
|
DB4_D 0xF7DB Message Data Byte 4
|
|
DB4_D.DB47 7
|
|
DB4_D.DB46 6
|
|
DB4_D.DB45 5
|
|
DB4_D.DB44 4
|
|
DB4_D.DB43 3
|
|
DB4_D.DB42 2
|
|
DB4_D.DB41 1
|
|
DB4_D.DB40 0
|
|
DB5_D 0xF7DC Message Data Byte 5
|
|
DB5_D.DB57 7
|
|
DB5_D.DB56 6
|
|
DB5_D.DB55 5
|
|
DB5_D.DB54 4
|
|
DB5_D.DB53 3
|
|
DB5_D.DB52 2
|
|
DB5_D.DB51 1
|
|
DB5_D.DB50 0
|
|
DB6_D 0xF7DD Message Data Byte 6
|
|
DB6_D.DB67 7
|
|
DB6_D.DB66 6
|
|
DB6_D.DB65 5
|
|
DB6_D.DB64 4
|
|
DB6_D.DB63 3
|
|
DB6_D.DB62 2
|
|
DB6_D.DB61 1
|
|
DB6_D.DB60 0
|
|
DB7_D 0xF7DE Message Data Byte 7
|
|
DB7_D.DB77 7
|
|
DB7_D.DB76 6
|
|
DB7_D.DB75 5
|
|
DB7_D.DB74 4
|
|
DB7_D.DB73 3
|
|
DB7_D.DB72 2
|
|
DB7_D.DB71 1
|
|
DB7_D.DB70 0
|
|
RESERVEDF7DF 0xF7DF RESERVED
|
|
; -------------------------------------- CAN_E --------------------------------
|
|
MCR0_E 0xF7E0 Message Control Register Low
|
|
MCR0_E.MSGVAL1 7
|
|
MCR0_E.MSGVAL0 6
|
|
MCR0_E.TXIE1 5
|
|
MCR0_E.TXIE0 4
|
|
MCR0_E.RXIE1 3
|
|
MCR0_E.RXIE0 2
|
|
MCR0_E.INTPND1 1
|
|
MCR0_E.INTPND0 0
|
|
MCR1_E 0xF7E1 Message Control Register High
|
|
MCR1_E.RMTPND1 7
|
|
MCR1_E.RMTPND0 6
|
|
MCR1_E.TXRQ1 5
|
|
MCR1_E.TXRQ0 4
|
|
MCR1_E.MSGLSTCPUUPD1 3
|
|
MCR1_E.MSGLSTCPUUPD0 2
|
|
MCR1_E.NEWDAT1 1
|
|
MCR1_E.NEWDAT0 0
|
|
UAR0_E 0xF7E2 Upper Arbitration Register Low
|
|
UAR0_E.ID28 7
|
|
UAR0_E.ID27 6
|
|
UAR0_E.ID26 5
|
|
UAR0_E.ID25 4
|
|
UAR0_E.ID24 3
|
|
UAR0_E.ID23 2
|
|
UAR0_E.ID22 1
|
|
UAR0_E.ID21 0
|
|
UAR1_E 0xF7E3 Upper Arbitration Register High
|
|
UAR1_E.ID20 7
|
|
UAR1_E.ID19 6
|
|
UAR1_E.ID18 5
|
|
UAR1_E.ID17 4
|
|
UAR1_E.ID16 3
|
|
UAR1_E.ID15 2
|
|
UAR1_E.ID14 1
|
|
UAR1_E.ID13 0
|
|
LAR0_E 0xF7E4 Lower Arbitration Register Low
|
|
LAR0_E.ID12 7
|
|
LAR0_E.ID11 6
|
|
LAR0_E.ID10 5
|
|
LAR0_E.ID9 4
|
|
LAR0_E.ID8 3
|
|
LAR0_E.ID7 2
|
|
LAR0_E.ID6 1
|
|
LAR0_E.ID5 0
|
|
LAR1_E 0xF7E5 Lower Arbitration Register High
|
|
LAR1_E.ID4 7
|
|
LAR1_E.ID3 6
|
|
LAR1_E.ID2 5
|
|
LAR1_E.ID1 4
|
|
LAR1_E.ID0 3
|
|
MCFG_E 0xF7E6 Message Configuration Register
|
|
MCFG_E.DLC7 7
|
|
MCFG_E.DLC6 6
|
|
MCFG_E.DLC5 5
|
|
MCFG_E.DLC4 4
|
|
MCFG_E.DIR 3
|
|
MCFG_E.XTD 2
|
|
DB0_E 0xF7E7 Message Data Byte 0
|
|
DB0_E.DB07 7
|
|
DB0_E.DB06 6
|
|
DB0_E.DB05 5
|
|
DB0_E.DB04 4
|
|
DB0_E.DB03 3
|
|
DB0_E.DB02 2
|
|
DB0_E.DB01 1
|
|
DB0_E.DB00 0
|
|
DB1_E 0xF7E8 Message Data Byte 1
|
|
DB1_E.DB17 7
|
|
DB1_E.DB16 6
|
|
DB1_E.DB15 5
|
|
DB1_E.DB14 4
|
|
DB1_E.DB13 3
|
|
DB1_E.DB12 2
|
|
DB1_E.DB11 1
|
|
DB1_E.DB10 0
|
|
DB2_E 0xF7E9 Message Data Byte 2
|
|
DB2_E.DB27 7
|
|
DB2_E.DB26 6
|
|
DB2_E.DB25 5
|
|
DB2_E.DB24 4
|
|
DB2_E.DB23 3
|
|
DB2_E.DB22 2
|
|
DB2_E.DB21 1
|
|
DB2_E.DB20 0
|
|
DB3_E 0xF7EA Message Data Byte 3
|
|
DB3_E.DB37 7
|
|
DB3_E.DB36 6
|
|
DB3_E.DB35 5
|
|
DB3_E.DB34 4
|
|
DB3_E.DB33 3
|
|
DB3_E.DB32 2
|
|
DB3_E.DB31 1
|
|
DB3_E.DB30 0
|
|
DB4_E 0xF7EB Message Data Byte 4
|
|
DB4_E.DB47 7
|
|
DB4_E.DB46 6
|
|
DB4_E.DB45 5
|
|
DB4_E.DB44 4
|
|
DB4_E.DB43 3
|
|
DB4_E.DB42 2
|
|
DB4_E.DB41 1
|
|
DB4_E.DB40 0
|
|
DB5_E 0xF7EC Message Data Byte 5
|
|
DB5_E.DB57 7
|
|
DB5_E.DB56 6
|
|
DB5_E.DB55 5
|
|
DB5_E.DB54 4
|
|
DB5_E.DB53 3
|
|
DB5_E.DB52 2
|
|
DB5_E.DB51 1
|
|
DB5_E.DB50 0
|
|
DB6_E 0xF7ED Message Data Byte 6
|
|
DB6_E.DB67 7
|
|
DB6_E.DB66 6
|
|
DB6_E.DB65 5
|
|
DB6_E.DB64 4
|
|
DB6_E.DB63 3
|
|
DB6_E.DB62 2
|
|
DB6_E.DB61 1
|
|
DB6_E.DB60 0
|
|
DB7_E 0xF7DE Message Data Byte 7
|
|
DB7_E.DB77 7
|
|
DB7_E.DB76 6
|
|
DB7_E.DB75 5
|
|
DB7_E.DB74 4
|
|
DB7_E.DB73 3
|
|
DB7_E.DB72 2
|
|
DB7_E.DB71 1
|
|
DB7_E.DB70 0
|
|
RESERVEDF7EF 0xF7EF RESERVED
|
|
; -------------------------------------- CAN_F --------------------------------
|
|
MCR0_F 0xF7F0 Message Control Register Low
|
|
MCR0_F.MSGVAL1 7
|
|
MCR0_F.MSGVAL0 6
|
|
MCR0_F.TXIE1 5
|
|
MCR0_F.TXIE0 4
|
|
MCR0_F.RXIE1 3
|
|
MCR0_F.RXIE0 2
|
|
MCR0_F.INTPND1 1
|
|
MCR0_F.INTPND0 0
|
|
MCR1_F 0xF7F1 Message Control Register High
|
|
MCR1_F.RMTPND1 7
|
|
MCR1_F.RMTPND0 6
|
|
MCR1_F.TXRQ1 5
|
|
MCR1_F.TXRQ0 4
|
|
MCR1_F.MSGLSTCPUUPD1 3
|
|
MCR1_F.MSGLSTCPUUPD0 2
|
|
MCR1_F.NEWDAT1 1
|
|
MCR1_F.NEWDAT0 0
|
|
UAR0_F 0xF7F2 Upper Arbitration Register Low
|
|
UAR0_F.ID28 7
|
|
UAR0_F.ID27 6
|
|
UAR0_F.ID26 5
|
|
UAR0_F.ID25 4
|
|
UAR0_F.ID24 3
|
|
UAR0_F.ID23 2
|
|
UAR0_F.ID22 1
|
|
UAR0_F.ID21 0
|
|
UAR1_F 0xF7F3 Upper Arbitration Register High
|
|
UAR1_F.ID20 7
|
|
UAR1_F.ID19 6
|
|
UAR1_F.ID18 5
|
|
UAR1_F.ID17 4
|
|
UAR1_F.ID16 3
|
|
UAR1_F.ID15 2
|
|
UAR1_F.ID14 1
|
|
UAR1_F.ID13 0
|
|
LAR0_F 0xF7F4 Lower Arbitration Register Low
|
|
LAR0_F.ID12 7
|
|
LAR0_F.ID11 6
|
|
LAR0_F.ID10 5
|
|
LAR0_F.ID9 4
|
|
LAR0_F.ID8 3
|
|
LAR0_F.ID7 2
|
|
LAR0_F.ID6 1
|
|
LAR0_F.ID5 0
|
|
LAR1_F 0xF7F5 Lower Arbitration Register High
|
|
LAR1_F.ID4 7
|
|
LAR1_F.ID3 6
|
|
LAR1_F.ID2 5
|
|
LAR1_F.ID1 4
|
|
LAR1_F.ID0 3
|
|
MCFG_F 0xF7F6 Message Configuration Register
|
|
MCFG_F.DLC7 7
|
|
MCFG_F.DLC6 6
|
|
MCFG_F.DLC5 5
|
|
MCFG_F.DLC4 4
|
|
MCFG_F.DIR 3
|
|
MCFG_F.XTD 2
|
|
DB0_F 0xF7F7 Message Data Byte 0
|
|
DB0_F.DB07 7
|
|
DB0_F.DB06 6
|
|
DB0_F.DB05 5
|
|
DB0_F.DB04 4
|
|
DB0_F.DB03 3
|
|
DB0_F.DB02 2
|
|
DB0_F.DB01 1
|
|
DB0_F.DB00 0
|
|
DB1_F 0xF7F8 Message Data Byte 1
|
|
DB1_F.DB17 7
|
|
DB1_F.DB16 6
|
|
DB1_F.DB15 5
|
|
DB1_F.DB14 4
|
|
DB1_F.DB13 3
|
|
DB1_F.DB12 2
|
|
DB1_F.DB11 1
|
|
DB1_F.DB10 0
|
|
DB2_F 0xF7F9 Message Data Byte 2
|
|
DB2_F.DB27 7
|
|
DB2_F.DB26 6
|
|
DB2_F.DB25 5
|
|
DB2_F.DB24 4
|
|
DB2_F.DB23 3
|
|
DB2_F.DB22 2
|
|
DB2_F.DB21 1
|
|
DB2_F.DB20 0
|
|
DB3_F 0xF7FA Message Data Byte 3
|
|
DB3_F.DB37 7
|
|
DB3_F.DB36 6
|
|
DB3_F.DB35 5
|
|
DB3_F.DB34 4
|
|
DB3_F.DB33 3
|
|
DB3_F.DB32 2
|
|
DB3_F.DB31 1
|
|
DB3_F.DB30 0
|
|
DB4_F 0xF7FB Message Data Byte 4
|
|
DB4_F.DB47 7
|
|
DB4_F.DB46 6
|
|
DB4_F.DB45 5
|
|
DB4_F.DB44 4
|
|
DB4_F.DB43 3
|
|
DB4_F.DB42 2
|
|
DB4_F.DB41 1
|
|
DB4_F.DB40 0
|
|
DB5_F 0xF7FC Message Data Byte 5
|
|
DB5_F.DB57 7
|
|
DB5_F.DB56 6
|
|
DB5_F.DB55 5
|
|
DB5_F.DB54 4
|
|
DB5_F.DB53 3
|
|
DB5_F.DB52 2
|
|
DB5_F.DB51 1
|
|
DB5_F.DB50 0
|
|
DB6_F 0xF7FD Message Data Byte 6
|
|
DB6_F.DB67 7
|
|
DB6_F.DB66 6
|
|
DB6_F.DB65 5
|
|
DB6_F.DB64 4
|
|
DB6_F.DB63 3
|
|
DB6_F.DB62 2
|
|
DB6_F.DB61 1
|
|
DB6_F.DB60 0
|
|
DB7_F 0xF7FE Message Data Byte 7
|
|
DB7_F.DB77 7
|
|
DB7_F.DB76 6
|
|
DB7_F.DB75 5
|
|
DB7_F.DB74 4
|
|
DB7_F.DB73 3
|
|
DB7_F.DB72 2
|
|
DB7_F.DB71 1
|
|
DB7_F.DB70 0
|
|
RESERVEDF7FF 0xF7FF RESERVED
|
|
|
|
|
|
.C505CA
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=11843&parent_oid=8088
|
|
; C505C.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF700
|
|
area DATA CAN 0xF700:0xF800
|
|
area BSS RESERVED 0xF800:0xFC00
|
|
area DATA XRAM 0xFC00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry CAN_SWI 0x004B CAN Controller / Software Interrupt
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry IRTC 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.P14 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN7 7
|
|
; P1ANA.EAN6 6
|
|
; P1ANA.EAN5 5
|
|
; P1ANA.EAN4 4
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register (C505CA only)
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.CMOD 3
|
|
SYSCON.CSWO 2
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.ECAN 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.SWI 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Reload Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Reload Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter High Byte Data Register (C505A / C505CA only)
|
|
ADDATH.ADDATH7 7
|
|
ADDATH.ADDATH6 6
|
|
ADDATH.ADDATH5 5
|
|
ADDATH.ADDATH4 4
|
|
ADDATH.ADDATH3 3
|
|
ADDATH.ADDATH2 2
|
|
ADDATH.ADDATH1 1
|
|
ADDATH.ADDATH0 0
|
|
ADDATL 0x00DA A/D Converter Low Byte Data Register (C505A / C505CA only)
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.RXDC 1
|
|
P4.TXDC 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
; -------------------------------------- CAN --------------------------------
|
|
CR 0xF700 Control Register
|
|
CR.TEST 7
|
|
CR.CCE 6
|
|
CR.EIE 3
|
|
CR.SIE 2
|
|
CR.IE 1
|
|
CR.INIT 0
|
|
SR 0xF701 Status Register
|
|
SR.BOFF 7
|
|
SR.EWRN 6
|
|
SR.RXOK 4
|
|
SR.TXOK 3
|
|
SR.LEC2 2
|
|
SR.LEC1 1
|
|
SR.LEC0 0
|
|
IR 0xF702 Interrupt Register
|
|
IR.INTID7 7
|
|
IR.INTID6 6
|
|
IR.INTID5 5
|
|
IR.INTID4 4
|
|
IR.INTID3 3
|
|
IR.INTID2 2
|
|
IR.INTID1 1
|
|
IR.INTID0 0
|
|
RESERVEDF703 0xF703 RESERVED
|
|
BTR0 0xF704 Bit Timing Register Low
|
|
BTR0.SJW7 7
|
|
BTR0.SJW6 6
|
|
BTR0.BRP5 5
|
|
BTR0.BRP4 4
|
|
BTR0.BRP3 3
|
|
BTR0.BRP2 2
|
|
BTR0.BRP1 1
|
|
BTR0.BRP0 0
|
|
BTR1 0xF705 Bit Timing Register High
|
|
BTR1.TSEG26 6
|
|
BTR1.TSEG25 5
|
|
BTR1.TSEG24 4
|
|
BTR1.TSEG13 3
|
|
BTR1.TSEG12 2
|
|
BTR1.TSEG11 1
|
|
BTR1.TSEG10 0
|
|
GMS0 0xF706 Global Mask Short Register Low
|
|
GMS0.ID28 7
|
|
GMS0.ID27 6
|
|
GMS0.ID26 5
|
|
GMS0.ID25 4
|
|
GMS0.ID24 3
|
|
GMS0.ID23 2
|
|
GMS0.ID22 1
|
|
GMS0.ID21 0
|
|
GMS1 0xF707 Global Mask Short Register High
|
|
GMS1.ID20 7
|
|
GMS1.ID19 6
|
|
GMS1.ID18 5
|
|
UGML0 0xF708 Upper Global Mask Long Register Low
|
|
UGML0.ID28 7
|
|
UGML0.ID27 6
|
|
UGML0.ID26 5
|
|
UGML0.ID25 4
|
|
UGML0.ID24 3
|
|
UGML0.ID23 2
|
|
UGML0.ID22 1
|
|
UGML0.ID21 0
|
|
UGML1 0xF709 Upper Global Mask Long Register High
|
|
UGML1.ID20 7
|
|
UGML1.ID19 6
|
|
UGML1.ID18 5
|
|
UGML1.ID17 4
|
|
UGML1.ID16 3
|
|
UGML1.ID15 2
|
|
UGML1.ID14 1
|
|
UGML1.ID13 0
|
|
LGML0 0xF70A Lower Global Mask Long Register Low
|
|
LGML0.ID12 7
|
|
LGML0.ID11 6
|
|
LGML0.ID10 5
|
|
LGML0.ID9 4
|
|
LGML0.ID8 3
|
|
LGML0.ID7 2
|
|
LGML0.ID6 1
|
|
LGML0.ID5 0
|
|
LGML1 0xF70B Lower Global Mask Long Register High
|
|
LGML1.ID4 7
|
|
LGML1.ID3 6
|
|
LGML1.ID2 5
|
|
LGML1.ID1 4
|
|
LGML1.ID0 3
|
|
UMLM0 0xF70C Upper Mask of Last Message Register Low
|
|
UMLM0.ID28 7
|
|
UMLM0.ID27 6
|
|
UMLM0.ID26 5
|
|
UMLM0.ID25 4
|
|
UMLM0.ID24 3
|
|
UMLM0.ID23 2
|
|
UMLM0.ID22 1
|
|
UMLM0.ID21 0
|
|
UMLM1 0xF70D Upper Mask of Last Message Register High
|
|
UMLM1.ID20 7
|
|
UMLM1.ID19 6
|
|
UMLM1.ID18 5
|
|
UMLM1.ID17 4
|
|
UMLM1.ID16 3
|
|
UMLM1.ID15 2
|
|
UMLM1.ID14 1
|
|
UMLM1.ID13 0
|
|
LMLM0 0xF70E Lower Mask of Last Message Register Low
|
|
LMLM0.ID12 7
|
|
LMLM0.ID11 6
|
|
LMLM0.ID10 5
|
|
LMLM0.ID9 4
|
|
LMLM0.ID8 3
|
|
LMLM0.ID7 2
|
|
LMLM0.ID6 1
|
|
LMLM0.ID5 0
|
|
LMLM1 0xF70F Lower Mask of Last Message Register High
|
|
LMLM1.ID4 7
|
|
LMLM1.ID3 6
|
|
LMLM1.ID2 5
|
|
LMLM1.ID1 4
|
|
LMLM1.ID0 3
|
|
; -------------------------------------- CAN_1 --------------------------------
|
|
MCR0_1 0xF710 Message Control Register Low
|
|
MCR0_1.MSGVAL1 7
|
|
MCR0_1.MSGVAL0 6
|
|
MCR0_1.TXIE1 5
|
|
MCR0_1.TXIE0 4
|
|
MCR0_1.RXIE1 3
|
|
MCR0_1.RXIE0 2
|
|
MCR0_1.INTPND1 1
|
|
MCR0_1.INTPND0 0
|
|
MCR1_1 0xF711 Message Control Register High
|
|
MCR1_1.RMTPND1 7
|
|
MCR1_1.RMTPND0 6
|
|
MCR1_1.TXRQ1 5
|
|
MCR1_1.TXRQ0 4
|
|
MCR1_1.MSGLSTCPUUPD1 3
|
|
MCR1_1.MSGLSTCPUUPD0 2
|
|
MCR1_1.NEWDAT1 1
|
|
MCR1_1.NEWDAT0 0
|
|
UAR0_1 0xF712 Upper Arbitration Register Low
|
|
UAR0_1.ID28 7
|
|
UAR0_1.ID27 6
|
|
UAR0_1.ID26 5
|
|
UAR0_1.ID25 4
|
|
UAR0_1.ID24 3
|
|
UAR0_1.ID23 2
|
|
UAR0_1.ID22 1
|
|
UAR0_1.ID21 0
|
|
UAR1_1 0xF713 Upper Arbitration Register High
|
|
UAR1_1.ID20 7
|
|
UAR1_1.ID19 6
|
|
UAR1_1.ID18 5
|
|
UAR1_1.ID17 4
|
|
UAR1_1.ID16 3
|
|
UAR1_1.ID15 2
|
|
UAR1_1.ID14 1
|
|
UAR1_1.ID13 0
|
|
LAR0_1 0xF714 Lower Arbitration Register Low
|
|
LAR0_1.ID12 7
|
|
LAR0_1.ID11 6
|
|
LAR0_1.ID10 5
|
|
LAR0_1.ID9 4
|
|
LAR0_1.ID8 3
|
|
LAR0_1.ID7 2
|
|
LAR0_1.ID6 1
|
|
LAR0_1.ID5 0
|
|
LAR1_1 0xF715 Lower Arbitration Register High
|
|
LAR1_1.ID4 7
|
|
LAR1_1.ID3 6
|
|
LAR1_1.ID2 5
|
|
LAR1_1.ID1 4
|
|
LAR1_1.ID0 3
|
|
MCFG_1 0xF716 Message Configuration Register
|
|
MCFG_1.DLC7 7
|
|
MCFG_1.DLC6 6
|
|
MCFG_1.DLC5 5
|
|
MCFG_1.DLC4 4
|
|
MCFG_1.DIR 3
|
|
MCFG_1.XTD 2
|
|
DB0_1 0xF717 Message Data Byte 0
|
|
DB0_1.DB07 7
|
|
DB0_1.DB06 6
|
|
DB0_1.DB05 5
|
|
DB0_1.DB04 4
|
|
DB0_1.DB03 3
|
|
DB0_1.DB02 2
|
|
DB0_1.DB01 1
|
|
DB0_1.DB00 0
|
|
DB1_1 0xF718 Message Data Byte 1
|
|
DB1_1.DB17 7
|
|
DB1_1.DB16 6
|
|
DB1_1.DB15 5
|
|
DB1_1.DB14 4
|
|
DB1_1.DB13 3
|
|
DB1_1.DB12 2
|
|
DB1_1.DB11 1
|
|
DB1_1.DB10 0
|
|
DB2_1 0xF719 Message Data Byte 2
|
|
DB2_1.DB27 7
|
|
DB2_1.DB26 6
|
|
DB2_1.DB25 5
|
|
DB2_1.DB24 4
|
|
DB2_1.DB23 3
|
|
DB2_1.DB22 2
|
|
DB2_1.DB21 1
|
|
DB2_1.DB20 0
|
|
DB3_1 0xF71A Message Data Byte 3
|
|
DB3_1.DB37 7
|
|
DB3_1.DB36 6
|
|
DB3_1.DB35 5
|
|
DB3_1.DB34 4
|
|
DB3_1.DB33 3
|
|
DB3_1.DB32 2
|
|
DB3_1.DB31 1
|
|
DB3_1.DB30 0
|
|
DB4_1 0xF71B Message Data Byte 4
|
|
DB4_1.DB47 7
|
|
DB4_1.DB46 6
|
|
DB4_1.DB45 5
|
|
DB4_1.DB44 4
|
|
DB4_1.DB43 3
|
|
DB4_1.DB42 2
|
|
DB4_1.DB41 1
|
|
DB4_1.DB40 0
|
|
DB5_1 0xF71C Message Data Byte 5
|
|
DB5_1.DB57 7
|
|
DB5_1.DB56 6
|
|
DB5_1.DB55 5
|
|
DB5_1.DB54 4
|
|
DB5_1.DB53 3
|
|
DB5_1.DB52 2
|
|
DB5_1.DB51 1
|
|
DB5_1.DB50 0
|
|
DB6_1 0xF71D Message Data Byte 6
|
|
DB6_1.DB67 7
|
|
DB6_1.DB66 6
|
|
DB6_1.DB65 5
|
|
DB6_1.DB64 4
|
|
DB6_1.DB63 3
|
|
DB6_1.DB62 2
|
|
DB6_1.DB61 1
|
|
DB6_1.DB60 0
|
|
DB7_1 0xF71E Message Data Byte 7
|
|
DB7_1.DB77 7
|
|
DB7_1.DB76 6
|
|
DB7_1.DB75 5
|
|
DB7_1.DB74 4
|
|
DB7_1.DB73 3
|
|
DB7_1.DB72 2
|
|
DB7_1.DB71 1
|
|
DB7_1.DB70 0
|
|
RESERVEDF71F 0xF71F RESERVED
|
|
; -------------------------------------- CAN_2 --------------------------------
|
|
MCR0_2 0xF720 Message Control Register Low
|
|
MCR0_2.MSGVAL1 7
|
|
MCR0_2.MSGVAL0 6
|
|
MCR0_2.TXIE1 5
|
|
MCR0_2.TXIE0 4
|
|
MCR0_2.RXIE1 3
|
|
MCR0_2.RXIE0 2
|
|
MCR0_2.INTPND1 1
|
|
MCR0_2.INTPND0 0
|
|
MCR1_2 0xF721 Message Control Register High
|
|
MCR1_2.RMTPND1 7
|
|
MCR1_2.RMTPND0 6
|
|
MCR1_2.TXRQ1 5
|
|
MCR1_2.TXRQ0 4
|
|
MCR1_2.MSGLSTCPUUPD1 3
|
|
MCR1_2.MSGLSTCPUUPD0 2
|
|
MCR1_2.NEWDAT1 1
|
|
MCR1_2.NEWDAT0 0
|
|
UAR0_2 0xF722 Upper Arbitration Register Low
|
|
UAR0_2.ID28 7
|
|
UAR0_2.ID27 6
|
|
UAR0_2.ID26 5
|
|
UAR0_2.ID25 4
|
|
UAR0_2.ID24 3
|
|
UAR0_2.ID23 2
|
|
UAR0_2.ID22 1
|
|
UAR0_2.ID21 0
|
|
UAR1_2 0xF723 Upper Arbitration Register High
|
|
UAR1_2.ID20 7
|
|
UAR1_2.ID19 6
|
|
UAR1_2.ID18 5
|
|
UAR1_2.ID17 4
|
|
UAR1_2.ID16 3
|
|
UAR1_2.ID15 2
|
|
UAR1_2.ID14 1
|
|
UAR1_2.ID13 0
|
|
LAR0_2 0xF724 Lower Arbitration Register Low
|
|
LAR0_2.ID12 7
|
|
LAR0_2.ID11 6
|
|
LAR0_2.ID10 5
|
|
LAR0_2.ID9 4
|
|
LAR0_2.ID8 3
|
|
LAR0_2.ID7 2
|
|
LAR0_2.ID6 1
|
|
LAR0_2.ID5 0
|
|
LAR1_2 0xF725 Lower Arbitration Register High
|
|
LAR1_2.ID4 7
|
|
LAR1_2.ID3 6
|
|
LAR1_2.ID2 5
|
|
LAR1_2.ID1 4
|
|
LAR1_2.ID0 3
|
|
MCFG_2 0xF726 Message Configuration Register
|
|
MCFG_2.DLC7 7
|
|
MCFG_2.DLC6 6
|
|
MCFG_2.DLC5 5
|
|
MCFG_2.DLC4 4
|
|
MCFG_2.DIR 3
|
|
MCFG_2.XTD 2
|
|
DB0_2 0xF727 Message Data Byte 0
|
|
DB0_2.DB07 7
|
|
DB0_2.DB06 6
|
|
DB0_2.DB05 5
|
|
DB0_2.DB04 4
|
|
DB0_2.DB03 3
|
|
DB0_2.DB02 2
|
|
DB0_2.DB01 1
|
|
DB0_2.DB00 0
|
|
DB1_2 0xF728 Message Data Byte 1
|
|
DB1_2.DB17 7
|
|
DB1_2.DB16 6
|
|
DB1_2.DB15 5
|
|
DB1_2.DB14 4
|
|
DB1_2.DB13 3
|
|
DB1_2.DB12 2
|
|
DB1_2.DB11 1
|
|
DB1_2.DB10 0
|
|
DB2_2 0xF729 Message Data Byte 2
|
|
DB2_2.DB27 7
|
|
DB2_2.DB26 6
|
|
DB2_2.DB25 5
|
|
DB2_2.DB24 4
|
|
DB2_2.DB23 3
|
|
DB2_2.DB22 2
|
|
DB2_2.DB21 1
|
|
DB2_2.DB20 0
|
|
DB3_2 0xF72A Message Data Byte 3
|
|
DB3_2.DB37 7
|
|
DB3_2.DB36 6
|
|
DB3_2.DB35 5
|
|
DB3_2.DB34 4
|
|
DB3_2.DB33 3
|
|
DB3_2.DB32 2
|
|
DB3_2.DB31 1
|
|
DB3_2.DB30 0
|
|
DB4_2 0xF72B Message Data Byte 4
|
|
DB4_2.DB47 7
|
|
DB4_2.DB46 6
|
|
DB4_2.DB45 5
|
|
DB4_2.DB44 4
|
|
DB4_2.DB43 3
|
|
DB4_2.DB42 2
|
|
DB4_2.DB41 1
|
|
DB4_2.DB40 0
|
|
DB5_2 0xF72C Message Data Byte 5
|
|
DB5_2.DB57 7
|
|
DB5_2.DB56 6
|
|
DB5_2.DB55 5
|
|
DB5_2.DB54 4
|
|
DB5_2.DB53 3
|
|
DB5_2.DB52 2
|
|
DB5_2.DB51 1
|
|
DB5_2.DB50 0
|
|
DB6_2 0xF72D Message Data Byte 6
|
|
DB6_2.DB67 7
|
|
DB6_2.DB66 6
|
|
DB6_2.DB65 5
|
|
DB6_2.DB64 4
|
|
DB6_2.DB63 3
|
|
DB6_2.DB62 2
|
|
DB6_2.DB61 1
|
|
DB6_2.DB60 0
|
|
DB7_2 0xF72E Message Data Byte 7
|
|
DB7_2.DB77 7
|
|
DB7_2.DB76 6
|
|
DB7_2.DB75 5
|
|
DB7_2.DB74 4
|
|
DB7_2.DB73 3
|
|
DB7_2.DB72 2
|
|
DB7_2.DB71 1
|
|
DB7_2.DB70 0
|
|
RESERVEDF72F 0xF72F RESERVED
|
|
; -------------------------------------- CAN_3 --------------------------------
|
|
MCR0_3 0xF730 Message Control Register Low
|
|
MCR0_3.MSGVAL1 7
|
|
MCR0_3.MSGVAL0 6
|
|
MCR0_3.TXIE1 5
|
|
MCR0_3.TXIE0 4
|
|
MCR0_3.RXIE1 3
|
|
MCR0_3.RXIE0 2
|
|
MCR0_3.INTPND1 1
|
|
MCR0_3.INTPND0 0
|
|
MCR1_3 0xF731 Message Control Register High
|
|
MCR1_3.RMTPND1 7
|
|
MCR1_3.RMTPND0 6
|
|
MCR1_3.TXRQ1 5
|
|
MCR1_3.TXRQ0 4
|
|
MCR1_3.MSGLSTCPUUPD1 3
|
|
MCR1_3.MSGLSTCPUUPD0 2
|
|
MCR1_3.NEWDAT1 1
|
|
MCR1_3.NEWDAT0 0
|
|
UAR0_3 0xF732 Upper Arbitration Register Low
|
|
UAR0_3.ID28 7
|
|
UAR0_3.ID27 6
|
|
UAR0_3.ID26 5
|
|
UAR0_3.ID25 4
|
|
UAR0_3.ID24 3
|
|
UAR0_3.ID23 2
|
|
UAR0_3.ID22 1
|
|
UAR0_3.ID21 0
|
|
UAR1_3 0xF733 Upper Arbitration Register High
|
|
UAR1_3.ID20 7
|
|
UAR1_3.ID19 6
|
|
UAR1_3.ID18 5
|
|
UAR1_3.ID17 4
|
|
UAR1_3.ID16 3
|
|
UAR1_3.ID15 2
|
|
UAR1_3.ID14 1
|
|
UAR1_3.ID13 0
|
|
LAR0_3 0xF734 Lower Arbitration Register Low
|
|
LAR0_3.ID12 7
|
|
LAR0_3.ID11 6
|
|
LAR0_3.ID10 5
|
|
LAR0_3.ID9 4
|
|
LAR0_3.ID8 3
|
|
LAR0_3.ID7 2
|
|
LAR0_3.ID6 1
|
|
LAR0_3.ID5 0
|
|
LAR1_3 0xF735 Lower Arbitration Register High
|
|
LAR1_3.ID4 7
|
|
LAR1_3.ID3 6
|
|
LAR1_3.ID2 5
|
|
LAR1_3.ID1 4
|
|
LAR1_3.ID0 3
|
|
MCFG_3 0xF736 Message Configuration Register
|
|
MCFG_3.DLC7 7
|
|
MCFG_3.DLC6 6
|
|
MCFG_3.DLC5 5
|
|
MCFG_3.DLC4 4
|
|
MCFG_3.DIR 3
|
|
MCFG_3.XTD 2
|
|
DB0_3 0xF737 Message Data Byte 0
|
|
DB0_3.DB07 7
|
|
DB0_3.DB06 6
|
|
DB0_3.DB05 5
|
|
DB0_3.DB04 4
|
|
DB0_3.DB03 3
|
|
DB0_3.DB02 2
|
|
DB0_3.DB01 1
|
|
DB0_3.DB00 0
|
|
DB1_3 0xF738 Message Data Byte 1
|
|
DB1_3.DB17 7
|
|
DB1_3.DB16 6
|
|
DB1_3.DB15 5
|
|
DB1_3.DB14 4
|
|
DB1_3.DB13 3
|
|
DB1_3.DB12 2
|
|
DB1_3.DB11 1
|
|
DB1_3.DB10 0
|
|
DB2_3 0xF739 Message Data Byte 2
|
|
DB2_3.DB27 7
|
|
DB2_3.DB26 6
|
|
DB2_3.DB25 5
|
|
DB2_3.DB24 4
|
|
DB2_3.DB23 3
|
|
DB2_3.DB22 2
|
|
DB2_3.DB21 1
|
|
DB2_3.DB20 0
|
|
DB3_3 0xF73A Message Data Byte 3
|
|
DB3_3.DB37 7
|
|
DB3_3.DB36 6
|
|
DB3_3.DB35 5
|
|
DB3_3.DB34 4
|
|
DB3_3.DB33 3
|
|
DB3_3.DB32 2
|
|
DB3_3.DB31 1
|
|
DB3_3.DB30 0
|
|
DB4_3 0xF73B Message Data Byte 4
|
|
DB4_3.DB47 7
|
|
DB4_3.DB46 6
|
|
DB4_3.DB45 5
|
|
DB4_3.DB44 4
|
|
DB4_3.DB43 3
|
|
DB4_3.DB42 2
|
|
DB4_3.DB41 1
|
|
DB4_3.DB40 0
|
|
DB5_3 0xF73C Message Data Byte 5
|
|
DB5_3.DB57 7
|
|
DB5_3.DB56 6
|
|
DB5_3.DB55 5
|
|
DB5_3.DB54 4
|
|
DB5_3.DB53 3
|
|
DB5_3.DB52 2
|
|
DB5_3.DB51 1
|
|
DB5_3.DB50 0
|
|
DB6_3 0xF73D Message Data Byte 6
|
|
DB6_3.DB67 7
|
|
DB6_3.DB66 6
|
|
DB6_3.DB65 5
|
|
DB6_3.DB64 4
|
|
DB6_3.DB63 3
|
|
DB6_3.DB62 2
|
|
DB6_3.DB61 1
|
|
DB6_3.DB60 0
|
|
DB7_3 0xF73E Message Data Byte 7
|
|
DB7_3.DB77 7
|
|
DB7_3.DB76 6
|
|
DB7_3.DB75 5
|
|
DB7_3.DB74 4
|
|
DB7_3.DB73 3
|
|
DB7_3.DB72 2
|
|
DB7_3.DB71 1
|
|
DB7_3.DB70 0
|
|
RESERVEDF73F 0xF73F RESERVED
|
|
; -------------------------------------- CAN_4 --------------------------------
|
|
MCR0_4 0xF740 Message Control Register Low
|
|
MCR0_4.MSGVAL1 7
|
|
MCR0_4.MSGVAL0 6
|
|
MCR0_4.TXIE1 5
|
|
MCR0_4.TXIE0 4
|
|
MCR0_4.RXIE1 3
|
|
MCR0_4.RXIE0 2
|
|
MCR0_4.INTPND1 1
|
|
MCR0_4.INTPND0 0
|
|
MCR1_4 0xF741 Message Control Register High
|
|
MCR1_4.RMTPND1 7
|
|
MCR1_4.RMTPND0 6
|
|
MCR1_4.TXRQ1 5
|
|
MCR1_4.TXRQ0 4
|
|
MCR1_4.MSGLSTCPUUPD1 3
|
|
MCR1_4.MSGLSTCPUUPD0 2
|
|
MCR1_4.NEWDAT1 1
|
|
MCR1_4.NEWDAT0 0
|
|
UAR0_4 0xF742 Upper Arbitration Register Low
|
|
UAR0_4.ID28 7
|
|
UAR0_4.ID27 6
|
|
UAR0_4.ID26 5
|
|
UAR0_4.ID25 4
|
|
UAR0_4.ID24 3
|
|
UAR0_4.ID23 2
|
|
UAR0_4.ID22 1
|
|
UAR0_4.ID21 0
|
|
UAR1_4 0xF743 Upper Arbitration Register High
|
|
UAR1_4.ID20 7
|
|
UAR1_4.ID19 6
|
|
UAR1_4.ID18 5
|
|
UAR1_4.ID17 4
|
|
UAR1_4.ID16 3
|
|
UAR1_4.ID15 2
|
|
UAR1_4.ID14 1
|
|
UAR1_4.ID13 0
|
|
LAR0_4 0xF744 Lower Arbitration Register Low
|
|
LAR0_4.ID12 7
|
|
LAR0_4.ID11 6
|
|
LAR0_4.ID10 5
|
|
LAR0_4.ID9 4
|
|
LAR0_4.ID8 3
|
|
LAR0_4.ID7 2
|
|
LAR0_4.ID6 1
|
|
LAR0_4.ID5 0
|
|
LAR1_4 0xF745 Lower Arbitration Register High
|
|
LAR1_4.ID4 7
|
|
LAR1_4.ID3 6
|
|
LAR1_4.ID2 5
|
|
LAR1_4.ID1 4
|
|
LAR1_4.ID0 3
|
|
MCFG_4 0xF746 Message Configuration Register
|
|
MCFG_4.DLC7 7
|
|
MCFG_4.DLC6 6
|
|
MCFG_4.DLC5 5
|
|
MCFG_4.DLC4 4
|
|
MCFG_4.DIR 3
|
|
MCFG_4.XTD 2
|
|
DB0_4 0xF747 Message Data Byte 0
|
|
DB0_4.DB07 7
|
|
DB0_4.DB06 6
|
|
DB0_4.DB05 5
|
|
DB0_4.DB04 4
|
|
DB0_4.DB03 3
|
|
DB0_4.DB02 2
|
|
DB0_4.DB01 1
|
|
DB0_4.DB00 0
|
|
DB1_4 0xF748 Message Data Byte 1
|
|
DB1_4.DB17 7
|
|
DB1_4.DB16 6
|
|
DB1_4.DB15 5
|
|
DB1_4.DB14 4
|
|
DB1_4.DB13 3
|
|
DB1_4.DB12 2
|
|
DB1_4.DB11 1
|
|
DB1_4.DB10 0
|
|
DB2_4 0xF749 Message Data Byte 2
|
|
DB2_4.DB27 7
|
|
DB2_4.DB26 6
|
|
DB2_4.DB25 5
|
|
DB2_4.DB24 4
|
|
DB2_4.DB23 3
|
|
DB2_4.DB22 2
|
|
DB2_4.DB21 1
|
|
DB2_4.DB20 0
|
|
DB3_4 0xF74A Message Data Byte 3
|
|
DB3_4.DB37 7
|
|
DB3_4.DB36 6
|
|
DB3_4.DB35 5
|
|
DB3_4.DB34 4
|
|
DB3_4.DB33 3
|
|
DB3_4.DB32 2
|
|
DB3_4.DB31 1
|
|
DB3_4.DB30 0
|
|
DB4_4 0xF74B Message Data Byte 4
|
|
DB4_4.DB47 7
|
|
DB4_4.DB46 6
|
|
DB4_4.DB45 5
|
|
DB4_4.DB44 4
|
|
DB4_4.DB43 3
|
|
DB4_4.DB42 2
|
|
DB4_4.DB41 1
|
|
DB4_4.DB40 0
|
|
DB5_4 0xF74C Message Data Byte 5
|
|
DB5_4.DB57 7
|
|
DB5_4.DB56 6
|
|
DB5_4.DB55 5
|
|
DB5_4.DB54 4
|
|
DB5_4.DB53 3
|
|
DB5_4.DB52 2
|
|
DB5_4.DB51 1
|
|
DB5_4.DB50 0
|
|
DB6_4 0xF74D Message Data Byte 6
|
|
DB6_4.DB67 7
|
|
DB6_4.DB66 6
|
|
DB6_4.DB65 5
|
|
DB6_4.DB64 4
|
|
DB6_4.DB63 3
|
|
DB6_4.DB62 2
|
|
DB6_4.DB61 1
|
|
DB6_4.DB60 0
|
|
DB7_4 0xF74E Message Data Byte 7
|
|
DB7_4.DB77 7
|
|
DB7_4.DB76 6
|
|
DB7_4.DB75 5
|
|
DB7_4.DB74 4
|
|
DB7_4.DB73 3
|
|
DB7_4.DB72 2
|
|
DB7_4.DB71 1
|
|
DB7_4.DB70 0
|
|
RESERVEDF74F 0xF74F RESERVED
|
|
; -------------------------------------- CAN_5 --------------------------------
|
|
MCR0_5 0xF750 Message Control Register Low
|
|
MCR0_5.MSGVAL1 7
|
|
MCR0_5.MSGVAL0 6
|
|
MCR0_5.TXIE1 5
|
|
MCR0_5.TXIE0 4
|
|
MCR0_5.RXIE1 3
|
|
MCR0_5.RXIE0 2
|
|
MCR0_5.INTPND1 1
|
|
MCR0_5.INTPND0 0
|
|
MCR1_5 0xF751 Message Control Register High
|
|
MCR1_5.RMTPND1 7
|
|
MCR1_5.RMTPND0 6
|
|
MCR1_5.TXRQ1 5
|
|
MCR1_5.TXRQ0 4
|
|
MCR1_5.MSGLSTCPUUPD1 3
|
|
MCR1_5.MSGLSTCPUUPD0 2
|
|
MCR1_5.NEWDAT1 1
|
|
MCR1_5.NEWDAT0 0
|
|
UAR0_5 0xF752 Upper Arbitration Register Low
|
|
UAR0_5.ID28 7
|
|
UAR0_5.ID27 6
|
|
UAR0_5.ID26 5
|
|
UAR0_5.ID25 4
|
|
UAR0_5.ID24 3
|
|
UAR0_5.ID23 2
|
|
UAR0_5.ID22 1
|
|
UAR0_5.ID21 0
|
|
UAR1_5 0xF753 Upper Arbitration Register High
|
|
UAR1_5.ID20 7
|
|
UAR1_5.ID19 6
|
|
UAR1_5.ID18 5
|
|
UAR1_5.ID17 4
|
|
UAR1_5.ID16 3
|
|
UAR1_5.ID15 2
|
|
UAR1_5.ID14 1
|
|
UAR1_5.ID13 0
|
|
LAR0_5 0xF754 Lower Arbitration Register Low
|
|
LAR0_5.ID12 7
|
|
LAR0_5.ID11 6
|
|
LAR0_5.ID10 5
|
|
LAR0_5.ID9 4
|
|
LAR0_5.ID8 3
|
|
LAR0_5.ID7 2
|
|
LAR0_5.ID6 1
|
|
LAR0_5.ID5 0
|
|
LAR1_5 0xF755 Lower Arbitration Register High
|
|
LAR1_5.ID4 7
|
|
LAR1_5.ID3 6
|
|
LAR1_5.ID2 5
|
|
LAR1_5.ID1 4
|
|
LAR1_5.ID0 3
|
|
MCFG_5 0xF756 Message Configuration Register
|
|
MCFG_5.DLC7 7
|
|
MCFG_5.DLC6 6
|
|
MCFG_5.DLC5 5
|
|
MCFG_5.DLC4 4
|
|
MCFG_5.DIR 3
|
|
MCFG_5.XTD 2
|
|
DB0_5 0xF757 Message Data Byte 0
|
|
DB0_5.DB07 7
|
|
DB0_5.DB06 6
|
|
DB0_5.DB05 5
|
|
DB0_5.DB04 4
|
|
DB0_5.DB03 3
|
|
DB0_5.DB02 2
|
|
DB0_5.DB01 1
|
|
DB0_5.DB00 0
|
|
DB1_5 0xF758 Message Data Byte 1
|
|
DB1_5.DB17 7
|
|
DB1_5.DB16 6
|
|
DB1_5.DB15 5
|
|
DB1_5.DB14 4
|
|
DB1_5.DB13 3
|
|
DB1_5.DB12 2
|
|
DB1_5.DB11 1
|
|
DB1_5.DB10 0
|
|
DB2_5 0xF759 Message Data Byte 2
|
|
DB2_5.DB27 7
|
|
DB2_5.DB26 6
|
|
DB2_5.DB25 5
|
|
DB2_5.DB24 4
|
|
DB2_5.DB23 3
|
|
DB2_5.DB22 2
|
|
DB2_5.DB21 1
|
|
DB2_5.DB20 0
|
|
DB3_5 0xF75A Message Data Byte 3
|
|
DB3_5.DB37 7
|
|
DB3_5.DB36 6
|
|
DB3_5.DB35 5
|
|
DB3_5.DB34 4
|
|
DB3_5.DB33 3
|
|
DB3_5.DB32 2
|
|
DB3_5.DB31 1
|
|
DB3_5.DB30 0
|
|
DB4_5 0xF75B Message Data Byte 4
|
|
DB4_5.DB47 7
|
|
DB4_5.DB46 6
|
|
DB4_5.DB45 5
|
|
DB4_5.DB44 4
|
|
DB4_5.DB43 3
|
|
DB4_5.DB42 2
|
|
DB4_5.DB41 1
|
|
DB4_5.DB40 0
|
|
DB5_5 0xF75C Message Data Byte 5
|
|
DB5_5.DB57 7
|
|
DB5_5.DB56 6
|
|
DB5_5.DB55 5
|
|
DB5_5.DB54 4
|
|
DB5_5.DB53 3
|
|
DB5_5.DB52 2
|
|
DB5_5.DB51 1
|
|
DB5_5.DB50 0
|
|
DB6_5 0xF75D Message Data Byte 6
|
|
DB6_5.DB67 7
|
|
DB6_5.DB66 6
|
|
DB6_5.DB65 5
|
|
DB6_5.DB64 4
|
|
DB6_5.DB63 3
|
|
DB6_5.DB62 2
|
|
DB6_5.DB61 1
|
|
DB6_5.DB60 0
|
|
DB7_5 0xF75E Message Data Byte 7
|
|
DB7_5.DB77 7
|
|
DB7_5.DB76 6
|
|
DB7_5.DB75 5
|
|
DB7_5.DB74 4
|
|
DB7_5.DB73 3
|
|
DB7_5.DB72 2
|
|
DB7_5.DB71 1
|
|
DB7_5.DB70 0
|
|
RESERVEDF75F 0xF75F RESERVED
|
|
; -------------------------------------- CAN_6 --------------------------------
|
|
MCR0_6 0xF760 Message Control Register Low
|
|
MCR0_6.MSGVAL1 7
|
|
MCR0_6.MSGVAL0 6
|
|
MCR0_6.TXIE1 5
|
|
MCR0_6.TXIE0 4
|
|
MCR0_6.RXIE1 3
|
|
MCR0_6.RXIE0 2
|
|
MCR0_6.INTPND1 1
|
|
MCR0_6.INTPND0 0
|
|
MCR1_6 0xF761 Message Control Register High
|
|
MCR1_6.RMTPND1 7
|
|
MCR1_6.RMTPND0 6
|
|
MCR1_6.TXRQ1 5
|
|
MCR1_6.TXRQ0 4
|
|
MCR1_6.MSGLSTCPUUPD1 3
|
|
MCR1_6.MSGLSTCPUUPD0 2
|
|
MCR1_6.NEWDAT1 1
|
|
MCR1_6.NEWDAT0 0
|
|
UAR0_6 0xF762 Upper Arbitration Register Low
|
|
UAR0_6.ID28 7
|
|
UAR0_6.ID27 6
|
|
UAR0_6.ID26 5
|
|
UAR0_6.ID25 4
|
|
UAR0_6.ID24 3
|
|
UAR0_6.ID23 2
|
|
UAR0_6.ID22 1
|
|
UAR0_6.ID21 0
|
|
UAR1_6 0xF763 Upper Arbitration Register High
|
|
UAR1_6.ID20 7
|
|
UAR1_6.ID19 6
|
|
UAR1_6.ID18 5
|
|
UAR1_6.ID17 4
|
|
UAR1_6.ID16 3
|
|
UAR1_6.ID15 2
|
|
UAR1_6.ID14 1
|
|
UAR1_6.ID13 0
|
|
LAR0_6 0xF764 Lower Arbitration Register Low
|
|
LAR0_6.ID12 7
|
|
LAR0_6.ID11 6
|
|
LAR0_6.ID10 5
|
|
LAR0_6.ID9 4
|
|
LAR0_6.ID8 3
|
|
LAR0_6.ID7 2
|
|
LAR0_6.ID6 1
|
|
LAR0_6.ID5 0
|
|
LAR1_6 0xF765 Lower Arbitration Register High
|
|
LAR1_6.ID4 7
|
|
LAR1_6.ID3 6
|
|
LAR1_6.ID2 5
|
|
LAR1_6.ID1 4
|
|
LAR1_6.ID0 3
|
|
MCFG_6 0xF766 Message Configuration Register
|
|
MCFG_6.DLC7 7
|
|
MCFG_6.DLC6 6
|
|
MCFG_6.DLC5 5
|
|
MCFG_6.DLC4 4
|
|
MCFG_6.DIR 3
|
|
MCFG_6.XTD 2
|
|
DB0_6 0xF767 Message Data Byte 0
|
|
DB0_6.DB07 7
|
|
DB0_6.DB06 6
|
|
DB0_6.DB05 5
|
|
DB0_6.DB04 4
|
|
DB0_6.DB03 3
|
|
DB0_6.DB02 2
|
|
DB0_6.DB01 1
|
|
DB0_6.DB00 0
|
|
DB1_6 0xF768 Message Data Byte 1
|
|
DB1_6.DB17 7
|
|
DB1_6.DB16 6
|
|
DB1_6.DB15 5
|
|
DB1_6.DB14 4
|
|
DB1_6.DB13 3
|
|
DB1_6.DB12 2
|
|
DB1_6.DB11 1
|
|
DB1_6.DB10 0
|
|
DB2_6 0xF769 Message Data Byte 2
|
|
DB2_6.DB27 7
|
|
DB2_6.DB26 6
|
|
DB2_6.DB25 5
|
|
DB2_6.DB24 4
|
|
DB2_6.DB23 3
|
|
DB2_6.DB22 2
|
|
DB2_6.DB21 1
|
|
DB2_6.DB20 0
|
|
DB3_6 0xF76A Message Data Byte 3
|
|
DB3_6.DB37 7
|
|
DB3_6.DB36 6
|
|
DB3_6.DB35 5
|
|
DB3_6.DB34 4
|
|
DB3_6.DB33 3
|
|
DB3_6.DB32 2
|
|
DB3_6.DB31 1
|
|
DB3_6.DB30 0
|
|
DB4_6 0xF76B Message Data Byte 4
|
|
DB4_6.DB47 7
|
|
DB4_6.DB46 6
|
|
DB4_6.DB45 5
|
|
DB4_6.DB44 4
|
|
DB4_6.DB43 3
|
|
DB4_6.DB42 2
|
|
DB4_6.DB41 1
|
|
DB4_6.DB40 0
|
|
DB5_6 0xF76C Message Data Byte 5
|
|
DB5_6.DB57 7
|
|
DB5_6.DB56 6
|
|
DB5_6.DB55 5
|
|
DB5_6.DB54 4
|
|
DB5_6.DB53 3
|
|
DB5_6.DB52 2
|
|
DB5_6.DB51 1
|
|
DB5_6.DB50 0
|
|
DB6_6 0xF76D Message Data Byte 6
|
|
DB6_6.DB67 7
|
|
DB6_6.DB66 6
|
|
DB6_6.DB65 5
|
|
DB6_6.DB64 4
|
|
DB6_6.DB63 3
|
|
DB6_6.DB62 2
|
|
DB6_6.DB61 1
|
|
DB6_6.DB60 0
|
|
DB7_6 0xF76E Message Data Byte 7
|
|
DB7_6.DB77 7
|
|
DB7_6.DB76 6
|
|
DB7_6.DB75 5
|
|
DB7_6.DB74 4
|
|
DB7_6.DB73 3
|
|
DB7_6.DB72 2
|
|
DB7_6.DB71 1
|
|
DB7_6.DB70 0
|
|
RESERVEDF76F 0xF76F RESERVED
|
|
; -------------------------------------- CAN_7 --------------------------------
|
|
MCR0_7 0xF770 Message Control Register Low
|
|
MCR0_7.MSGVAL1 7
|
|
MCR0_7.MSGVAL0 6
|
|
MCR0_7.TXIE1 5
|
|
MCR0_7.TXIE0 4
|
|
MCR0_7.RXIE1 3
|
|
MCR0_7.RXIE0 2
|
|
MCR0_7.INTPND1 1
|
|
MCR0_7.INTPND0 0
|
|
MCR1_7 0xF771 Message Control Register High
|
|
MCR1_7.RMTPND1 7
|
|
MCR1_7.RMTPND0 6
|
|
MCR1_7.TXRQ1 5
|
|
MCR1_7.TXRQ0 4
|
|
MCR1_7.MSGLSTCPUUPD1 3
|
|
MCR1_7.MSGLSTCPUUPD0 2
|
|
MCR1_7.NEWDAT1 1
|
|
MCR1_7.NEWDAT0 0
|
|
UAR0_7 0xF772 Upper Arbitration Register Low
|
|
UAR0_7.ID28 7
|
|
UAR0_7.ID27 6
|
|
UAR0_7.ID26 5
|
|
UAR0_7.ID25 4
|
|
UAR0_7.ID24 3
|
|
UAR0_7.ID23 2
|
|
UAR0_7.ID22 1
|
|
UAR0_7.ID21 0
|
|
UAR1_7 0xF773 Upper Arbitration Register High
|
|
UAR1_7.ID20 7
|
|
UAR1_7.ID19 6
|
|
UAR1_7.ID18 5
|
|
UAR1_7.ID17 4
|
|
UAR1_7.ID16 3
|
|
UAR1_7.ID15 2
|
|
UAR1_7.ID14 1
|
|
UAR1_7.ID13 0
|
|
LAR0_7 0xF774 Lower Arbitration Register Low
|
|
LAR0_7.ID12 7
|
|
LAR0_7.ID11 6
|
|
LAR0_7.ID10 5
|
|
LAR0_7.ID9 4
|
|
LAR0_7.ID8 3
|
|
LAR0_7.ID7 2
|
|
LAR0_7.ID6 1
|
|
LAR0_7.ID5 0
|
|
LAR1_7 0xF775 Lower Arbitration Register High
|
|
LAR1_7.ID4 7
|
|
LAR1_7.ID3 6
|
|
LAR1_7.ID2 5
|
|
LAR1_7.ID1 4
|
|
LAR1_7.ID0 3
|
|
MCFG_7 0xF776 Message Configuration Register
|
|
MCFG_7.DLC7 7
|
|
MCFG_7.DLC6 6
|
|
MCFG_7.DLC5 5
|
|
MCFG_7.DLC4 4
|
|
MCFG_7.DIR 3
|
|
MCFG_7.XTD 2
|
|
DB0_7 0xF777 Message Data Byte 0
|
|
DB0_7.DB07 7
|
|
DB0_7.DB06 6
|
|
DB0_7.DB05 5
|
|
DB0_7.DB04 4
|
|
DB0_7.DB03 3
|
|
DB0_7.DB02 2
|
|
DB0_7.DB01 1
|
|
DB0_7.DB00 0
|
|
DB1_7 0xF778 Message Data Byte 1
|
|
DB1_7.DB17 7
|
|
DB1_7.DB16 6
|
|
DB1_7.DB15 5
|
|
DB1_7.DB14 4
|
|
DB1_7.DB13 3
|
|
DB1_7.DB12 2
|
|
DB1_7.DB11 1
|
|
DB1_7.DB10 0
|
|
DB2_7 0xF779 Message Data Byte 2
|
|
DB2_7.DB27 7
|
|
DB2_7.DB26 6
|
|
DB2_7.DB25 5
|
|
DB2_7.DB24 4
|
|
DB2_7.DB23 3
|
|
DB2_7.DB22 2
|
|
DB2_7.DB21 1
|
|
DB2_7.DB20 0
|
|
DB3_7 0xF77A Message Data Byte 3
|
|
DB3_7.DB37 7
|
|
DB3_7.DB36 6
|
|
DB3_7.DB35 5
|
|
DB3_7.DB34 4
|
|
DB3_7.DB33 3
|
|
DB3_7.DB32 2
|
|
DB3_7.DB31 1
|
|
DB3_7.DB30 0
|
|
DB4_7 0xF77B Message Data Byte 4
|
|
DB4_7.DB47 7
|
|
DB4_7.DB46 6
|
|
DB4_7.DB45 5
|
|
DB4_7.DB44 4
|
|
DB4_7.DB43 3
|
|
DB4_7.DB42 2
|
|
DB4_7.DB41 1
|
|
DB4_7.DB40 0
|
|
DB5_7 0xF77C Message Data Byte 5
|
|
DB5_7.DB57 7
|
|
DB5_7.DB56 6
|
|
DB5_7.DB55 5
|
|
DB5_7.DB54 4
|
|
DB5_7.DB53 3
|
|
DB5_7.DB52 2
|
|
DB5_7.DB51 1
|
|
DB5_7.DB50 0
|
|
DB6_7 0xF77D Message Data Byte 6
|
|
DB6_7.DB67 7
|
|
DB6_7.DB66 6
|
|
DB6_7.DB65 5
|
|
DB6_7.DB64 4
|
|
DB6_7.DB63 3
|
|
DB6_7.DB62 2
|
|
DB6_7.DB61 1
|
|
DB6_7.DB60 0
|
|
DB7_7 0xF77E Message Data Byte 7
|
|
DB7_7.DB77 7
|
|
DB7_7.DB76 6
|
|
DB7_7.DB75 5
|
|
DB7_7.DB74 4
|
|
DB7_7.DB73 3
|
|
DB7_7.DB72 2
|
|
DB7_7.DB71 1
|
|
DB7_7.DB70 0
|
|
RESERVEDF77F 0xF77F RESERVED
|
|
; -------------------------------------- CAN_8 --------------------------------
|
|
MCR0_8 0xF780 Message Control Register Low
|
|
MCR0_8.MSGVAL1 7
|
|
MCR0_8.MSGVAL0 6
|
|
MCR0_8.TXIE1 5
|
|
MCR0_8.TXIE0 4
|
|
MCR0_8.RXIE1 3
|
|
MCR0_8.RXIE0 2
|
|
MCR0_8.INTPND1 1
|
|
MCR0_8.INTPND0 0
|
|
MCR1_8 0xF781 Message Control Register High
|
|
MCR1_8.RMTPND1 7
|
|
MCR1_8.RMTPND0 6
|
|
MCR1_8.TXRQ1 5
|
|
MCR1_8.TXRQ0 4
|
|
MCR1_8.MSGLSTCPUUPD1 3
|
|
MCR1_8.MSGLSTCPUUPD0 2
|
|
MCR1_8.NEWDAT1 1
|
|
MCR1_8.NEWDAT0 0
|
|
UAR0_8 0xF782 Upper Arbitration Register Low
|
|
UAR0_8.ID28 7
|
|
UAR0_8.ID27 6
|
|
UAR0_8.ID26 5
|
|
UAR0_8.ID25 4
|
|
UAR0_8.ID24 3
|
|
UAR0_8.ID23 2
|
|
UAR0_8.ID22 1
|
|
UAR0_8.ID21 0
|
|
UAR1_8 0xF783 Upper Arbitration Register High
|
|
UAR1_8.ID20 7
|
|
UAR1_8.ID19 6
|
|
UAR1_8.ID18 5
|
|
UAR1_8.ID17 4
|
|
UAR1_8.ID16 3
|
|
UAR1_8.ID15 2
|
|
UAR1_8.ID14 1
|
|
UAR1_8.ID13 0
|
|
LAR0_8 0xF784 Lower Arbitration Register Low
|
|
LAR0_8.ID12 7
|
|
LAR0_8.ID11 6
|
|
LAR0_8.ID10 5
|
|
LAR0_8.ID9 4
|
|
LAR0_8.ID8 3
|
|
LAR0_8.ID7 2
|
|
LAR0_8.ID6 1
|
|
LAR0_8.ID5 0
|
|
LAR1_8 0xF785 Lower Arbitration Register High
|
|
LAR1_8.ID4 7
|
|
LAR1_8.ID3 6
|
|
LAR1_8.ID2 5
|
|
LAR1_8.ID1 4
|
|
LAR1_8.ID0 3
|
|
MCFG_8 0xF786 Message Configuration Register
|
|
MCFG_8.DLC7 7
|
|
MCFG_8.DLC6 6
|
|
MCFG_8.DLC5 5
|
|
MCFG_8.DLC4 4
|
|
MCFG_8.DIR 3
|
|
MCFG_8.XTD 2
|
|
DB0_8 0xF787 Message Data Byte 0
|
|
DB0_8.DB07 7
|
|
DB0_8.DB06 6
|
|
DB0_8.DB05 5
|
|
DB0_8.DB04 4
|
|
DB0_8.DB03 3
|
|
DB0_8.DB02 2
|
|
DB0_8.DB01 1
|
|
DB0_8.DB00 0
|
|
DB1_8 0xF788 Message Data Byte 1
|
|
DB1_8.DB17 7
|
|
DB1_8.DB16 6
|
|
DB1_8.DB15 5
|
|
DB1_8.DB14 4
|
|
DB1_8.DB13 3
|
|
DB1_8.DB12 2
|
|
DB1_8.DB11 1
|
|
DB1_8.DB10 0
|
|
DB2_8 0xF789 Message Data Byte 2
|
|
DB2_8.DB27 7
|
|
DB2_8.DB26 6
|
|
DB2_8.DB25 5
|
|
DB2_8.DB24 4
|
|
DB2_8.DB23 3
|
|
DB2_8.DB22 2
|
|
DB2_8.DB21 1
|
|
DB2_8.DB20 0
|
|
DB3_8 0xF78A Message Data Byte 3
|
|
DB3_8.DB37 7
|
|
DB3_8.DB36 6
|
|
DB3_8.DB35 5
|
|
DB3_8.DB34 4
|
|
DB3_8.DB33 3
|
|
DB3_8.DB32 2
|
|
DB3_8.DB31 1
|
|
DB3_8.DB30 0
|
|
DB4_8 0xF78B Message Data Byte 4
|
|
DB4_8.DB47 7
|
|
DB4_8.DB46 6
|
|
DB4_8.DB45 5
|
|
DB4_8.DB44 4
|
|
DB4_8.DB43 3
|
|
DB4_8.DB42 2
|
|
DB4_8.DB41 1
|
|
DB4_8.DB40 0
|
|
DB5_8 0xF78C Message Data Byte 5
|
|
DB5_8.DB57 7
|
|
DB5_8.DB56 6
|
|
DB5_8.DB55 5
|
|
DB5_8.DB54 4
|
|
DB5_8.DB53 3
|
|
DB5_8.DB52 2
|
|
DB5_8.DB51 1
|
|
DB5_8.DB50 0
|
|
DB6_8 0xF78D Message Data Byte 6
|
|
DB6_8.DB67 7
|
|
DB6_8.DB66 6
|
|
DB6_8.DB65 5
|
|
DB6_8.DB64 4
|
|
DB6_8.DB63 3
|
|
DB6_8.DB62 2
|
|
DB6_8.DB61 1
|
|
DB6_8.DB60 0
|
|
DB7_8 0xF78E Message Data Byte 7
|
|
DB7_8.DB77 7
|
|
DB7_8.DB76 6
|
|
DB7_8.DB75 5
|
|
DB7_8.DB74 4
|
|
DB7_8.DB73 3
|
|
DB7_8.DB72 2
|
|
DB7_8.DB71 1
|
|
DB7_8.DB70 0
|
|
RESERVEDF78F 0xF78F RESERVED
|
|
; -------------------------------------- CAN_9 --------------------------------
|
|
MCR0_9 0xF790 Message Control Register Low
|
|
MCR0_9.MSGVAL1 7
|
|
MCR0_9.MSGVAL0 6
|
|
MCR0_9.TXIE1 5
|
|
MCR0_9.TXIE0 4
|
|
MCR0_9.RXIE1 3
|
|
MCR0_9.RXIE0 2
|
|
MCR0_9.INTPND1 1
|
|
MCR0_9.INTPND0 0
|
|
MCR1_9 0xF791 Message Control Register High
|
|
MCR1_9.RMTPND1 7
|
|
MCR1_9.RMTPND0 6
|
|
MCR1_9.TXRQ1 5
|
|
MCR1_9.TXRQ0 4
|
|
MCR1_9.MSGLSTCPUUPD1 3
|
|
MCR1_9.MSGLSTCPUUPD0 2
|
|
MCR1_9.NEWDAT1 1
|
|
MCR1_9.NEWDAT0 0
|
|
UAR0_9 0xF792 Upper Arbitration Register Low
|
|
UAR0_9.ID28 7
|
|
UAR0_9.ID27 6
|
|
UAR0_9.ID26 5
|
|
UAR0_9.ID25 4
|
|
UAR0_9.ID24 3
|
|
UAR0_9.ID23 2
|
|
UAR0_9.ID22 1
|
|
UAR0_9.ID21 0
|
|
UAR1_9 0xF793 Upper Arbitration Register High
|
|
UAR1_9.ID20 7
|
|
UAR1_9.ID19 6
|
|
UAR1_9.ID18 5
|
|
UAR1_9.ID17 4
|
|
UAR1_9.ID16 3
|
|
UAR1_9.ID15 2
|
|
UAR1_9.ID14 1
|
|
UAR1_9.ID13 0
|
|
LAR0_9 0xF794 Lower Arbitration Register Low
|
|
LAR0_9.ID12 7
|
|
LAR0_9.ID11 6
|
|
LAR0_9.ID10 5
|
|
LAR0_9.ID9 4
|
|
LAR0_9.ID8 3
|
|
LAR0_9.ID7 2
|
|
LAR0_9.ID6 1
|
|
LAR0_9.ID5 0
|
|
LAR1_9 0xF795 Lower Arbitration Register High
|
|
LAR1_9.ID4 7
|
|
LAR1_9.ID3 6
|
|
LAR1_9.ID2 5
|
|
LAR1_9.ID1 4
|
|
LAR1_9.ID0 3
|
|
MCFG_9 0xF796 Message Configuration Register
|
|
MCFG_9.DLC7 7
|
|
MCFG_9.DLC6 6
|
|
MCFG_9.DLC5 5
|
|
MCFG_9.DLC4 4
|
|
MCFG_9.DIR 3
|
|
MCFG_9.XTD 2
|
|
DB0_9 0xF797 Message Data Byte 0
|
|
DB0_9.DB07 7
|
|
DB0_9.DB06 6
|
|
DB0_9.DB05 5
|
|
DB0_9.DB04 4
|
|
DB0_9.DB03 3
|
|
DB0_9.DB02 2
|
|
DB0_9.DB01 1
|
|
DB0_9.DB00 0
|
|
DB1_9 0xF798 Message Data Byte 1
|
|
DB1_9.DB17 7
|
|
DB1_9.DB16 6
|
|
DB1_9.DB15 5
|
|
DB1_9.DB14 4
|
|
DB1_9.DB13 3
|
|
DB1_9.DB12 2
|
|
DB1_9.DB11 1
|
|
DB1_9.DB10 0
|
|
DB2_9 0xF799 Message Data Byte 2
|
|
DB2_9.DB27 7
|
|
DB2_9.DB26 6
|
|
DB2_9.DB25 5
|
|
DB2_9.DB24 4
|
|
DB2_9.DB23 3
|
|
DB2_9.DB22 2
|
|
DB2_9.DB21 1
|
|
DB2_9.DB20 0
|
|
DB3_9 0xF79A Message Data Byte 3
|
|
DB3_9.DB37 7
|
|
DB3_9.DB36 6
|
|
DB3_9.DB35 5
|
|
DB3_9.DB34 4
|
|
DB3_9.DB33 3
|
|
DB3_9.DB32 2
|
|
DB3_9.DB31 1
|
|
DB3_9.DB30 0
|
|
DB4_9 0xF79B Message Data Byte 4
|
|
DB4_9.DB47 7
|
|
DB4_9.DB46 6
|
|
DB4_9.DB45 5
|
|
DB4_9.DB44 4
|
|
DB4_9.DB43 3
|
|
DB4_9.DB42 2
|
|
DB4_9.DB41 1
|
|
DB4_9.DB40 0
|
|
DB5_9 0xF79C Message Data Byte 5
|
|
DB5_9.DB57 7
|
|
DB5_9.DB56 6
|
|
DB5_9.DB55 5
|
|
DB5_9.DB54 4
|
|
DB5_9.DB53 3
|
|
DB5_9.DB52 2
|
|
DB5_9.DB51 1
|
|
DB5_9.DB50 0
|
|
DB6_9 0xF79D Message Data Byte 6
|
|
DB6_9.DB67 7
|
|
DB6_9.DB66 6
|
|
DB6_9.DB65 5
|
|
DB6_9.DB64 4
|
|
DB6_9.DB63 3
|
|
DB6_9.DB62 2
|
|
DB6_9.DB61 1
|
|
DB6_9.DB60 0
|
|
DB7_9 0xF79E Message Data Byte 7
|
|
DB7_9.DB77 7
|
|
DB7_9.DB76 6
|
|
DB7_9.DB75 5
|
|
DB7_9.DB74 4
|
|
DB7_9.DB73 3
|
|
DB7_9.DB72 2
|
|
DB7_9.DB71 1
|
|
DB7_9.DB70 0
|
|
RESERVEDF79F 0xF79F RESERVED
|
|
; -------------------------------------- CAN_A --------------------------------
|
|
MCR0_A 0xF7A0 Message Control Register Low
|
|
MCR0_A.MSGVAL1 7
|
|
MCR0_A.MSGVAL0 6
|
|
MCR0_A.TXIE1 5
|
|
MCR0_A.TXIE0 4
|
|
MCR0_A.RXIE1 3
|
|
MCR0_A.RXIE0 2
|
|
MCR0_A.INTPND1 1
|
|
MCR0_A.INTPND0 0
|
|
MCR1_A 0xF7A1 Message Control Register High
|
|
MCR1_A.RMTPND1 7
|
|
MCR1_A.RMTPND0 6
|
|
MCR1_A.TXRQ1 5
|
|
MCR1_A.TXRQ0 4
|
|
MCR1_A.MSGLSTCPUUPD1 3
|
|
MCR1_A.MSGLSTCPUUPD0 2
|
|
MCR1_A.NEWDAT1 1
|
|
MCR1_A.NEWDAT0 0
|
|
UAR0_A 0xF7A2 Upper Arbitration Register Low
|
|
UAR0_A.ID28 7
|
|
UAR0_A.ID27 6
|
|
UAR0_A.ID26 5
|
|
UAR0_A.ID25 4
|
|
UAR0_A.ID24 3
|
|
UAR0_A.ID23 2
|
|
UAR0_A.ID22 1
|
|
UAR0_A.ID21 0
|
|
UAR1_A 0xF7A3 Upper Arbitration Register High
|
|
UAR1_A.ID20 7
|
|
UAR1_A.ID19 6
|
|
UAR1_A.ID18 5
|
|
UAR1_A.ID17 4
|
|
UAR1_A.ID16 3
|
|
UAR1_A.ID15 2
|
|
UAR1_A.ID14 1
|
|
UAR1_A.ID13 0
|
|
LAR0_A 0xF7A4 Lower Arbitration Register Low
|
|
LAR0_A.ID12 7
|
|
LAR0_A.ID11 6
|
|
LAR0_A.ID10 5
|
|
LAR0_A.ID9 4
|
|
LAR0_A.ID8 3
|
|
LAR0_A.ID7 2
|
|
LAR0_A.ID6 1
|
|
LAR0_A.ID5 0
|
|
LAR1_A 0xF7A5 Lower Arbitration Register High
|
|
LAR1_A.ID4 7
|
|
LAR1_A.ID3 6
|
|
LAR1_A.ID2 5
|
|
LAR1_A.ID1 4
|
|
LAR1_A.ID0 3
|
|
MCFG_A 0xF7A6 Message Configuration Register
|
|
MCFG_A.DLC7 7
|
|
MCFG_A.DLC6 6
|
|
MCFG_A.DLC5 5
|
|
MCFG_A.DLC4 4
|
|
MCFG_A.DIR 3
|
|
MCFG_A.XTD 2
|
|
DB0_A 0xF7A7 Message Data Byte 0
|
|
DB0_A.DB07 7
|
|
DB0_A.DB06 6
|
|
DB0_A.DB05 5
|
|
DB0_A.DB04 4
|
|
DB0_A.DB03 3
|
|
DB0_A.DB02 2
|
|
DB0_A.DB01 1
|
|
DB0_A.DB00 0
|
|
DB1_A 0xF7A8 Message Data Byte 1
|
|
DB1_A.DB17 7
|
|
DB1_A.DB16 6
|
|
DB1_A.DB15 5
|
|
DB1_A.DB14 4
|
|
DB1_A.DB13 3
|
|
DB1_A.DB12 2
|
|
DB1_A.DB11 1
|
|
DB1_A.DB10 0
|
|
DB2_A 0xF7A9 Message Data Byte 2
|
|
DB2_A.DB27 7
|
|
DB2_A.DB26 6
|
|
DB2_A.DB25 5
|
|
DB2_A.DB24 4
|
|
DB2_A.DB23 3
|
|
DB2_A.DB22 2
|
|
DB2_A.DB21 1
|
|
DB2_A.DB20 0
|
|
DB3_A 0xF7AA Message Data Byte 3
|
|
DB3_A.DB37 7
|
|
DB3_A.DB36 6
|
|
DB3_A.DB35 5
|
|
DB3_A.DB34 4
|
|
DB3_A.DB33 3
|
|
DB3_A.DB32 2
|
|
DB3_A.DB31 1
|
|
DB3_A.DB30 0
|
|
DB4_A 0xF7AB Message Data Byte 4
|
|
DB4_A.DB47 7
|
|
DB4_A.DB46 6
|
|
DB4_A.DB45 5
|
|
DB4_A.DB44 4
|
|
DB4_A.DB43 3
|
|
DB4_A.DB42 2
|
|
DB4_A.DB41 1
|
|
DB4_A.DB40 0
|
|
DB5_A 0xF7AC Message Data Byte 5
|
|
DB5_A.DB57 7
|
|
DB5_A.DB56 6
|
|
DB5_A.DB55 5
|
|
DB5_A.DB54 4
|
|
DB5_A.DB53 3
|
|
DB5_A.DB52 2
|
|
DB5_A.DB51 1
|
|
DB5_A.DB50 0
|
|
DB6_A 0xF7AD Message Data Byte 6
|
|
DB6_A.DB67 7
|
|
DB6_A.DB66 6
|
|
DB6_A.DB65 5
|
|
DB6_A.DB64 4
|
|
DB6_A.DB63 3
|
|
DB6_A.DB62 2
|
|
DB6_A.DB61 1
|
|
DB6_A.DB60 0
|
|
DB7_A 0xF7AE Message Data Byte 7
|
|
DB7_A.DB77 7
|
|
DB7_A.DB76 6
|
|
DB7_A.DB75 5
|
|
DB7_A.DB74 4
|
|
DB7_A.DB73 3
|
|
DB7_A.DB72 2
|
|
DB7_A.DB71 1
|
|
DB7_A.DB70 0
|
|
RESERVEDF7AF 0xF7AF RESERVED
|
|
; -------------------------------------- CAN_B --------------------------------
|
|
MCR0_B 0xF7B0 Message Control Register Low
|
|
MCR0_B.MSGVAL1 7
|
|
MCR0_B.MSGVAL0 6
|
|
MCR0_B.TXIE1 5
|
|
MCR0_B.TXIE0 4
|
|
MCR0_B.RXIE1 3
|
|
MCR0_B.RXIE0 2
|
|
MCR0_B.INTPND1 1
|
|
MCR0_B.INTPND0 0
|
|
MCR1_B 0xF7B1 Message Control Register High
|
|
MCR1_B.RMTPND1 7
|
|
MCR1_B.RMTPND0 6
|
|
MCR1_B.TXRQ1 5
|
|
MCR1_B.TXRQ0 4
|
|
MCR1_B.MSGLSTCPUUPD1 3
|
|
MCR1_B.MSGLSTCPUUPD0 2
|
|
MCR1_B.NEWDAT1 1
|
|
MCR1_B.NEWDAT0 0
|
|
UAR0_B 0xF7B2 Upper Arbitration Register Low
|
|
UAR0_B.ID28 7
|
|
UAR0_B.ID27 6
|
|
UAR0_B.ID26 5
|
|
UAR0_B.ID25 4
|
|
UAR0_B.ID24 3
|
|
UAR0_B.ID23 2
|
|
UAR0_B.ID22 1
|
|
UAR0_B.ID21 0
|
|
UAR1_B 0xF7B3 Upper Arbitration Register High
|
|
UAR1_B.ID20 7
|
|
UAR1_B.ID19 6
|
|
UAR1_B.ID18 5
|
|
UAR1_B.ID17 4
|
|
UAR1_B.ID16 3
|
|
UAR1_B.ID15 2
|
|
UAR1_B.ID14 1
|
|
UAR1_B.ID13 0
|
|
LAR0_B 0xF7B4 Lower Arbitration Register Low
|
|
LAR0_B.ID12 7
|
|
LAR0_B.ID11 6
|
|
LAR0_B.ID10 5
|
|
LAR0_B.ID9 4
|
|
LAR0_B.ID8 3
|
|
LAR0_B.ID7 2
|
|
LAR0_B.ID6 1
|
|
LAR0_B.ID5 0
|
|
LAR1_B 0xF7B5 Lower Arbitration Register High
|
|
LAR1_B.ID4 7
|
|
LAR1_B.ID3 6
|
|
LAR1_B.ID2 5
|
|
LAR1_B.ID1 4
|
|
LAR1_B.ID0 3
|
|
MCFG_B 0xF7B6 Message Configuration Register
|
|
MCFG_B.DLC7 7
|
|
MCFG_B.DLC6 6
|
|
MCFG_B.DLC5 5
|
|
MCFG_B.DLC4 4
|
|
MCFG_B.DIR 3
|
|
MCFG_B.XTD 2
|
|
DB0_B 0xF7B7 Message Data Byte 0
|
|
DB0_B.DB07 7
|
|
DB0_B.DB06 6
|
|
DB0_B.DB05 5
|
|
DB0_B.DB04 4
|
|
DB0_B.DB03 3
|
|
DB0_B.DB02 2
|
|
DB0_B.DB01 1
|
|
DB0_B.DB00 0
|
|
DB1_B 0xF7B8 Message Data Byte 1
|
|
DB1_B.DB17 7
|
|
DB1_B.DB16 6
|
|
DB1_B.DB15 5
|
|
DB1_B.DB14 4
|
|
DB1_B.DB13 3
|
|
DB1_B.DB12 2
|
|
DB1_B.DB11 1
|
|
DB1_B.DB10 0
|
|
DB2_B 0xF7B9 Message Data Byte 2
|
|
DB2_B.DB27 7
|
|
DB2_B.DB26 6
|
|
DB2_B.DB25 5
|
|
DB2_B.DB24 4
|
|
DB2_B.DB23 3
|
|
DB2_B.DB22 2
|
|
DB2_B.DB21 1
|
|
DB2_B.DB20 0
|
|
DB3_B 0xF7BA Message Data Byte 3
|
|
DB3_B.DB37 7
|
|
DB3_B.DB36 6
|
|
DB3_B.DB35 5
|
|
DB3_B.DB34 4
|
|
DB3_B.DB33 3
|
|
DB3_B.DB32 2
|
|
DB3_B.DB31 1
|
|
DB3_B.DB30 0
|
|
DB4_B 0xF7BB Message Data Byte 4
|
|
DB4_B.DB47 7
|
|
DB4_B.DB46 6
|
|
DB4_B.DB45 5
|
|
DB4_B.DB44 4
|
|
DB4_B.DB43 3
|
|
DB4_B.DB42 2
|
|
DB4_B.DB41 1
|
|
DB4_B.DB40 0
|
|
DB5_B 0xF7BC Message Data Byte 5
|
|
DB5_B.DB57 7
|
|
DB5_B.DB56 6
|
|
DB5_B.DB55 5
|
|
DB5_B.DB54 4
|
|
DB5_B.DB53 3
|
|
DB5_B.DB52 2
|
|
DB5_B.DB51 1
|
|
DB5_B.DB50 0
|
|
DB6_B 0xF7BD Message Data Byte 6
|
|
DB6_B.DB67 7
|
|
DB6_B.DB66 6
|
|
DB6_B.DB65 5
|
|
DB6_B.DB64 4
|
|
DB6_B.DB63 3
|
|
DB6_B.DB62 2
|
|
DB6_B.DB61 1
|
|
DB6_B.DB60 0
|
|
DB7_B 0xF7BE Message Data Byte 7
|
|
DB7_B.DB77 7
|
|
DB7_B.DB76 6
|
|
DB7_B.DB75 5
|
|
DB7_B.DB74 4
|
|
DB7_B.DB73 3
|
|
DB7_B.DB72 2
|
|
DB7_B.DB71 1
|
|
DB7_B.DB70 0
|
|
RESERVEDF7BF 0xF7BF RESERVED
|
|
; -------------------------------------- CAN_C --------------------------------
|
|
MCR0_C 0xF7C0 Message Control Register Low
|
|
MCR0_C.MSGVAL1 7
|
|
MCR0_C.MSGVAL0 6
|
|
MCR0_C.TXIE1 5
|
|
MCR0_C.TXIE0 4
|
|
MCR0_C.RXIE1 3
|
|
MCR0_C.RXIE0 2
|
|
MCR0_C.INTPND1 1
|
|
MCR0_C.INTPND0 0
|
|
MCR1_C 0xF7C1 Message Control Register High
|
|
MCR1_C.RMTPND1 7
|
|
MCR1_C.RMTPND0 6
|
|
MCR1_C.TXRQ1 5
|
|
MCR1_C.TXRQ0 4
|
|
MCR1_C.MSGLSTCPUUPD1 3
|
|
MCR1_C.MSGLSTCPUUPD0 2
|
|
MCR1_C.NEWDAT1 1
|
|
MCR1_C.NEWDAT0 0
|
|
UAR0_C 0xF7C2 Upper Arbitration Register Low
|
|
UAR0_C.ID28 7
|
|
UAR0_C.ID27 6
|
|
UAR0_C.ID26 5
|
|
UAR0_C.ID25 4
|
|
UAR0_C.ID24 3
|
|
UAR0_C.ID23 2
|
|
UAR0_C.ID22 1
|
|
UAR0_C.ID21 0
|
|
UAR1_C 0xF7C3 Upper Arbitration Register High
|
|
UAR1_C.ID20 7
|
|
UAR1_C.ID19 6
|
|
UAR1_C.ID18 5
|
|
UAR1_C.ID17 4
|
|
UAR1_C.ID16 3
|
|
UAR1_C.ID15 2
|
|
UAR1_C.ID14 1
|
|
UAR1_C.ID13 0
|
|
LAR0_C 0xF7C4 Lower Arbitration Register Low
|
|
LAR0_C.ID12 7
|
|
LAR0_C.ID11 6
|
|
LAR0_C.ID10 5
|
|
LAR0_C.ID9 4
|
|
LAR0_C.ID8 3
|
|
LAR0_C.ID7 2
|
|
LAR0_C.ID6 1
|
|
LAR0_C.ID5 0
|
|
LAR1_C 0xF7C5 Lower Arbitration Register High
|
|
LAR1_C.ID4 7
|
|
LAR1_C.ID3 6
|
|
LAR1_C.ID2 5
|
|
LAR1_C.ID1 4
|
|
LAR1_C.ID0 3
|
|
MCFG_C 0xF7C6 Message Configuration Register
|
|
MCFG_C.DLC7 7
|
|
MCFG_C.DLC6 6
|
|
MCFG_C.DLC5 5
|
|
MCFG_C.DLC4 4
|
|
MCFG_C.DIR 3
|
|
MCFG_C.XTD 2
|
|
DB0_C 0xF7C7 Message Data Byte 0
|
|
DB0_C.DB07 7
|
|
DB0_C.DB06 6
|
|
DB0_C.DB05 5
|
|
DB0_C.DB04 4
|
|
DB0_C.DB03 3
|
|
DB0_C.DB02 2
|
|
DB0_C.DB01 1
|
|
DB0_C.DB00 0
|
|
DB1_C 0xF7C8 Message Data Byte 1
|
|
DB1_C.DB17 7
|
|
DB1_C.DB16 6
|
|
DB1_C.DB15 5
|
|
DB1_C.DB14 4
|
|
DB1_C.DB13 3
|
|
DB1_C.DB12 2
|
|
DB1_C.DB11 1
|
|
DB1_C.DB10 0
|
|
DB2_C 0xF7C9 Message Data Byte 2
|
|
DB2_C.DB27 7
|
|
DB2_C.DB26 6
|
|
DB2_C.DB25 5
|
|
DB2_C.DB24 4
|
|
DB2_C.DB23 3
|
|
DB2_C.DB22 2
|
|
DB2_C.DB21 1
|
|
DB2_C.DB20 0
|
|
DB3_C 0xF7CA Message Data Byte 3
|
|
DB3_C.DB37 7
|
|
DB3_C.DB36 6
|
|
DB3_C.DB35 5
|
|
DB3_C.DB34 4
|
|
DB3_C.DB33 3
|
|
DB3_C.DB32 2
|
|
DB3_C.DB31 1
|
|
DB3_C.DB30 0
|
|
DB4_C 0xF7CB Message Data Byte 4
|
|
DB4_C.DB47 7
|
|
DB4_C.DB46 6
|
|
DB4_C.DB45 5
|
|
DB4_C.DB44 4
|
|
DB4_C.DB43 3
|
|
DB4_C.DB42 2
|
|
DB4_C.DB41 1
|
|
DB4_C.DB40 0
|
|
DB5_C 0xF7CC Message Data Byte 5
|
|
DB5_C.DB57 7
|
|
DB5_C.DB56 6
|
|
DB5_C.DB55 5
|
|
DB5_C.DB54 4
|
|
DB5_C.DB53 3
|
|
DB5_C.DB52 2
|
|
DB5_C.DB51 1
|
|
DB5_C.DB50 0
|
|
DB6_C 0xF7CD Message Data Byte 6
|
|
DB6_C.DB67 7
|
|
DB6_C.DB66 6
|
|
DB6_C.DB65 5
|
|
DB6_C.DB64 4
|
|
DB6_C.DB63 3
|
|
DB6_C.DB62 2
|
|
DB6_C.DB61 1
|
|
DB6_C.DB60 0
|
|
DB7_C 0xF7CE Message Data Byte 7
|
|
DB7_C.DB77 7
|
|
DB7_C.DB76 6
|
|
DB7_C.DB75 5
|
|
DB7_C.DB74 4
|
|
DB7_C.DB73 3
|
|
DB7_C.DB72 2
|
|
DB7_C.DB71 1
|
|
DB7_C.DB70 0
|
|
RESERVEDF7CF 0xF7CF RESERVED
|
|
; -------------------------------------- CAN_D --------------------------------
|
|
MCR0_D 0xF7D0 Message Control Register Low
|
|
MCR0_D.MSGVAL1 7
|
|
MCR0_D.MSGVAL0 6
|
|
MCR0_D.TXIE1 5
|
|
MCR0_D.TXIE0 4
|
|
MCR0_D.RXIE1 3
|
|
MCR0_D.RXIE0 2
|
|
MCR0_D.INTPND1 1
|
|
MCR0_D.INTPND0 0
|
|
MCR1_D 0xF7D1 Message Control Register High
|
|
MCR1_D.RMTPND1 7
|
|
MCR1_D.RMTPND0 6
|
|
MCR1_D.TXRQ1 5
|
|
MCR1_D.TXRQ0 4
|
|
MCR1_D.MSGLSTCPUUPD1 3
|
|
MCR1_D.MSGLSTCPUUPD0 2
|
|
MCR1_D.NEWDAT1 1
|
|
MCR1_D.NEWDAT0 0
|
|
UAR0_D 0xF7D2 Upper Arbitration Register Low
|
|
UAR0_D.ID28 7
|
|
UAR0_D.ID27 6
|
|
UAR0_D.ID26 5
|
|
UAR0_D.ID25 4
|
|
UAR0_D.ID24 3
|
|
UAR0_D.ID23 2
|
|
UAR0_D.ID22 1
|
|
UAR0_D.ID21 0
|
|
UAR1_D 0xF7D3 Upper Arbitration Register High
|
|
UAR1_D.ID20 7
|
|
UAR1_D.ID19 6
|
|
UAR1_D.ID18 5
|
|
UAR1_D.ID17 4
|
|
UAR1_D.ID16 3
|
|
UAR1_D.ID15 2
|
|
UAR1_D.ID14 1
|
|
UAR1_D.ID13 0
|
|
LAR0_D 0xF7D4 Lower Arbitration Register Low
|
|
LAR0_D.ID12 7
|
|
LAR0_D.ID11 6
|
|
LAR0_D.ID10 5
|
|
LAR0_D.ID9 4
|
|
LAR0_D.ID8 3
|
|
LAR0_D.ID7 2
|
|
LAR0_D.ID6 1
|
|
LAR0_D.ID5 0
|
|
LAR1_D 0xF7D5 Lower Arbitration Register High
|
|
LAR1_D.ID4 7
|
|
LAR1_D.ID3 6
|
|
LAR1_D.ID2 5
|
|
LAR1_D.ID1 4
|
|
LAR1_D.ID0 3
|
|
MCFG_D 0xF7D6 Message Configuration Register
|
|
MCFG_D.DLC7 7
|
|
MCFG_D.DLC6 6
|
|
MCFG_D.DLC5 5
|
|
MCFG_D.DLC4 4
|
|
MCFG_D.DIR 3
|
|
MCFG_D.XTD 2
|
|
DB0_D 0xF7D7 Message Data Byte 0
|
|
DB0_D.DB07 7
|
|
DB0_D.DB06 6
|
|
DB0_D.DB05 5
|
|
DB0_D.DB04 4
|
|
DB0_D.DB03 3
|
|
DB0_D.DB02 2
|
|
DB0_D.DB01 1
|
|
DB0_D.DB00 0
|
|
DB1_D 0xF7D8 Message Data Byte 1
|
|
DB1_D.DB17 7
|
|
DB1_D.DB16 6
|
|
DB1_D.DB15 5
|
|
DB1_D.DB14 4
|
|
DB1_D.DB13 3
|
|
DB1_D.DB12 2
|
|
DB1_D.DB11 1
|
|
DB1_D.DB10 0
|
|
DB2_D 0xF7D9 Message Data Byte 2
|
|
DB2_D.DB27 7
|
|
DB2_D.DB26 6
|
|
DB2_D.DB25 5
|
|
DB2_D.DB24 4
|
|
DB2_D.DB23 3
|
|
DB2_D.DB22 2
|
|
DB2_D.DB21 1
|
|
DB2_D.DB20 0
|
|
DB3_D 0xF7DA Message Data Byte 3
|
|
DB3_D.DB37 7
|
|
DB3_D.DB36 6
|
|
DB3_D.DB35 5
|
|
DB3_D.DB34 4
|
|
DB3_D.DB33 3
|
|
DB3_D.DB32 2
|
|
DB3_D.DB31 1
|
|
DB3_D.DB30 0
|
|
DB4_D 0xF7DB Message Data Byte 4
|
|
DB4_D.DB47 7
|
|
DB4_D.DB46 6
|
|
DB4_D.DB45 5
|
|
DB4_D.DB44 4
|
|
DB4_D.DB43 3
|
|
DB4_D.DB42 2
|
|
DB4_D.DB41 1
|
|
DB4_D.DB40 0
|
|
DB5_D 0xF7DC Message Data Byte 5
|
|
DB5_D.DB57 7
|
|
DB5_D.DB56 6
|
|
DB5_D.DB55 5
|
|
DB5_D.DB54 4
|
|
DB5_D.DB53 3
|
|
DB5_D.DB52 2
|
|
DB5_D.DB51 1
|
|
DB5_D.DB50 0
|
|
DB6_D 0xF7DD Message Data Byte 6
|
|
DB6_D.DB67 7
|
|
DB6_D.DB66 6
|
|
DB6_D.DB65 5
|
|
DB6_D.DB64 4
|
|
DB6_D.DB63 3
|
|
DB6_D.DB62 2
|
|
DB6_D.DB61 1
|
|
DB6_D.DB60 0
|
|
DB7_D 0xF7DE Message Data Byte 7
|
|
DB7_D.DB77 7
|
|
DB7_D.DB76 6
|
|
DB7_D.DB75 5
|
|
DB7_D.DB74 4
|
|
DB7_D.DB73 3
|
|
DB7_D.DB72 2
|
|
DB7_D.DB71 1
|
|
DB7_D.DB70 0
|
|
RESERVEDF7DF 0xF7DF RESERVED
|
|
; -------------------------------------- CAN_E --------------------------------
|
|
MCR0_E 0xF7E0 Message Control Register Low
|
|
MCR0_E.MSGVAL1 7
|
|
MCR0_E.MSGVAL0 6
|
|
MCR0_E.TXIE1 5
|
|
MCR0_E.TXIE0 4
|
|
MCR0_E.RXIE1 3
|
|
MCR0_E.RXIE0 2
|
|
MCR0_E.INTPND1 1
|
|
MCR0_E.INTPND0 0
|
|
MCR1_E 0xF7E1 Message Control Register High
|
|
MCR1_E.RMTPND1 7
|
|
MCR1_E.RMTPND0 6
|
|
MCR1_E.TXRQ1 5
|
|
MCR1_E.TXRQ0 4
|
|
MCR1_E.MSGLSTCPUUPD1 3
|
|
MCR1_E.MSGLSTCPUUPD0 2
|
|
MCR1_E.NEWDAT1 1
|
|
MCR1_E.NEWDAT0 0
|
|
UAR0_E 0xF7E2 Upper Arbitration Register Low
|
|
UAR0_E.ID28 7
|
|
UAR0_E.ID27 6
|
|
UAR0_E.ID26 5
|
|
UAR0_E.ID25 4
|
|
UAR0_E.ID24 3
|
|
UAR0_E.ID23 2
|
|
UAR0_E.ID22 1
|
|
UAR0_E.ID21 0
|
|
UAR1_E 0xF7E3 Upper Arbitration Register High
|
|
UAR1_E.ID20 7
|
|
UAR1_E.ID19 6
|
|
UAR1_E.ID18 5
|
|
UAR1_E.ID17 4
|
|
UAR1_E.ID16 3
|
|
UAR1_E.ID15 2
|
|
UAR1_E.ID14 1
|
|
UAR1_E.ID13 0
|
|
LAR0_E 0xF7E4 Lower Arbitration Register Low
|
|
LAR0_E.ID12 7
|
|
LAR0_E.ID11 6
|
|
LAR0_E.ID10 5
|
|
LAR0_E.ID9 4
|
|
LAR0_E.ID8 3
|
|
LAR0_E.ID7 2
|
|
LAR0_E.ID6 1
|
|
LAR0_E.ID5 0
|
|
LAR1_E 0xF7E5 Lower Arbitration Register High
|
|
LAR1_E.ID4 7
|
|
LAR1_E.ID3 6
|
|
LAR1_E.ID2 5
|
|
LAR1_E.ID1 4
|
|
LAR1_E.ID0 3
|
|
MCFG_E 0xF7E6 Message Configuration Register
|
|
MCFG_E.DLC7 7
|
|
MCFG_E.DLC6 6
|
|
MCFG_E.DLC5 5
|
|
MCFG_E.DLC4 4
|
|
MCFG_E.DIR 3
|
|
MCFG_E.XTD 2
|
|
DB0_E 0xF7E7 Message Data Byte 0
|
|
DB0_E.DB07 7
|
|
DB0_E.DB06 6
|
|
DB0_E.DB05 5
|
|
DB0_E.DB04 4
|
|
DB0_E.DB03 3
|
|
DB0_E.DB02 2
|
|
DB0_E.DB01 1
|
|
DB0_E.DB00 0
|
|
DB1_E 0xF7E8 Message Data Byte 1
|
|
DB1_E.DB17 7
|
|
DB1_E.DB16 6
|
|
DB1_E.DB15 5
|
|
DB1_E.DB14 4
|
|
DB1_E.DB13 3
|
|
DB1_E.DB12 2
|
|
DB1_E.DB11 1
|
|
DB1_E.DB10 0
|
|
DB2_E 0xF7E9 Message Data Byte 2
|
|
DB2_E.DB27 7
|
|
DB2_E.DB26 6
|
|
DB2_E.DB25 5
|
|
DB2_E.DB24 4
|
|
DB2_E.DB23 3
|
|
DB2_E.DB22 2
|
|
DB2_E.DB21 1
|
|
DB2_E.DB20 0
|
|
DB3_E 0xF7EA Message Data Byte 3
|
|
DB3_E.DB37 7
|
|
DB3_E.DB36 6
|
|
DB3_E.DB35 5
|
|
DB3_E.DB34 4
|
|
DB3_E.DB33 3
|
|
DB3_E.DB32 2
|
|
DB3_E.DB31 1
|
|
DB3_E.DB30 0
|
|
DB4_E 0xF7EB Message Data Byte 4
|
|
DB4_E.DB47 7
|
|
DB4_E.DB46 6
|
|
DB4_E.DB45 5
|
|
DB4_E.DB44 4
|
|
DB4_E.DB43 3
|
|
DB4_E.DB42 2
|
|
DB4_E.DB41 1
|
|
DB4_E.DB40 0
|
|
DB5_E 0xF7EC Message Data Byte 5
|
|
DB5_E.DB57 7
|
|
DB5_E.DB56 6
|
|
DB5_E.DB55 5
|
|
DB5_E.DB54 4
|
|
DB5_E.DB53 3
|
|
DB5_E.DB52 2
|
|
DB5_E.DB51 1
|
|
DB5_E.DB50 0
|
|
DB6_E 0xF7ED Message Data Byte 6
|
|
DB6_E.DB67 7
|
|
DB6_E.DB66 6
|
|
DB6_E.DB65 5
|
|
DB6_E.DB64 4
|
|
DB6_E.DB63 3
|
|
DB6_E.DB62 2
|
|
DB6_E.DB61 1
|
|
DB6_E.DB60 0
|
|
DB7_E 0xF7EE Message Data Byte 7
|
|
DB7_E.DB77 7
|
|
DB7_E.DB76 6
|
|
DB7_E.DB75 5
|
|
DB7_E.DB74 4
|
|
DB7_E.DB73 3
|
|
DB7_E.DB72 2
|
|
DB7_E.DB71 1
|
|
DB7_E.DB70 0
|
|
RESERVEDF7EF 0xF7EF RESERVED
|
|
; -------------------------------------- CAN_F --------------------------------
|
|
MCR0_F 0xF7F0 Message Control Register Low
|
|
MCR0_F.MSGVAL1 7
|
|
MCR0_F.MSGVAL0 6
|
|
MCR0_F.TXIE1 5
|
|
MCR0_F.TXIE0 4
|
|
MCR0_F.RXIE1 3
|
|
MCR0_F.RXIE0 2
|
|
MCR0_F.INTPND1 1
|
|
MCR0_F.INTPND0 0
|
|
MCR1_F 0xF7F1 Message Control Register High
|
|
MCR1_F.RMTPND1 7
|
|
MCR1_F.RMTPND0 6
|
|
MCR1_F.TXRQ1 5
|
|
MCR1_F.TXRQ0 4
|
|
MCR1_F.MSGLSTCPUUPD1 3
|
|
MCR1_F.MSGLSTCPUUPD0 2
|
|
MCR1_F.NEWDAT1 1
|
|
MCR1_F.NEWDAT0 0
|
|
UAR0_F 0xF7F2 Upper Arbitration Register Low
|
|
UAR0_F.ID28 7
|
|
UAR0_F.ID27 6
|
|
UAR0_F.ID26 5
|
|
UAR0_F.ID25 4
|
|
UAR0_F.ID24 3
|
|
UAR0_F.ID23 2
|
|
UAR0_F.ID22 1
|
|
UAR0_F.ID21 0
|
|
UAR1_F 0xF7F3 Upper Arbitration Register High
|
|
UAR1_F.ID20 7
|
|
UAR1_F.ID19 6
|
|
UAR1_F.ID18 5
|
|
UAR1_F.ID17 4
|
|
UAR1_F.ID16 3
|
|
UAR1_F.ID15 2
|
|
UAR1_F.ID14 1
|
|
UAR1_F.ID13 0
|
|
LAR0_F 0xF7F4 Lower Arbitration Register Low
|
|
LAR0_F.ID12 7
|
|
LAR0_F.ID11 6
|
|
LAR0_F.ID10 5
|
|
LAR0_F.ID9 4
|
|
LAR0_F.ID8 3
|
|
LAR0_F.ID7 2
|
|
LAR0_F.ID6 1
|
|
LAR0_F.ID5 0
|
|
LAR1_F 0xF7F5 Lower Arbitration Register High
|
|
LAR1_F.ID4 7
|
|
LAR1_F.ID3 6
|
|
LAR1_F.ID2 5
|
|
LAR1_F.ID1 4
|
|
LAR1_F.ID0 3
|
|
MCFG_F 0xF7F6 Message Configuration Register
|
|
MCFG_F.DLC7 7
|
|
MCFG_F.DLC6 6
|
|
MCFG_F.DLC5 5
|
|
MCFG_F.DLC4 4
|
|
MCFG_F.DIR 3
|
|
MCFG_F.XTD 2
|
|
DB0_F 0xF7F7 Message Data Byte 0
|
|
DB0_F.DB07 7
|
|
DB0_F.DB06 6
|
|
DB0_F.DB05 5
|
|
DB0_F.DB04 4
|
|
DB0_F.DB03 3
|
|
DB0_F.DB02 2
|
|
DB0_F.DB01 1
|
|
DB0_F.DB00 0
|
|
DB1_F 0xF7F8 Message Data Byte 1
|
|
DB1_F.DB17 7
|
|
DB1_F.DB16 6
|
|
DB1_F.DB15 5
|
|
DB1_F.DB14 4
|
|
DB1_F.DB13 3
|
|
DB1_F.DB12 2
|
|
DB1_F.DB11 1
|
|
DB1_F.DB10 0
|
|
DB2_F 0xF7F9 Message Data Byte 2
|
|
DB2_F.DB27 7
|
|
DB2_F.DB26 6
|
|
DB2_F.DB25 5
|
|
DB2_F.DB24 4
|
|
DB2_F.DB23 3
|
|
DB2_F.DB22 2
|
|
DB2_F.DB21 1
|
|
DB2_F.DB20 0
|
|
DB3_F 0xF7FA Message Data Byte 3
|
|
DB3_F.DB37 7
|
|
DB3_F.DB36 6
|
|
DB3_F.DB35 5
|
|
DB3_F.DB34 4
|
|
DB3_F.DB33 3
|
|
DB3_F.DB32 2
|
|
DB3_F.DB31 1
|
|
DB3_F.DB30 0
|
|
DB4_F 0xF7FB Message Data Byte 4
|
|
DB4_F.DB47 7
|
|
DB4_F.DB46 6
|
|
DB4_F.DB45 5
|
|
DB4_F.DB44 4
|
|
DB4_F.DB43 3
|
|
DB4_F.DB42 2
|
|
DB4_F.DB41 1
|
|
DB4_F.DB40 0
|
|
DB5_F 0xF7FC Message Data Byte 5
|
|
DB5_F.DB57 7
|
|
DB5_F.DB56 6
|
|
DB5_F.DB55 5
|
|
DB5_F.DB54 4
|
|
DB5_F.DB53 3
|
|
DB5_F.DB52 2
|
|
DB5_F.DB51 1
|
|
DB5_F.DB50 0
|
|
DB6_F 0xF7FD Message Data Byte 6
|
|
DB6_F.DB67 7
|
|
DB6_F.DB66 6
|
|
DB6_F.DB65 5
|
|
DB6_F.DB64 4
|
|
DB6_F.DB63 3
|
|
DB6_F.DB62 2
|
|
DB6_F.DB61 1
|
|
DB6_F.DB60 0
|
|
DB7_F 0xF7FE Message Data Byte 7
|
|
DB7_F.DB77 7
|
|
DB7_F.DB76 6
|
|
DB7_F.DB75 5
|
|
DB7_F.DB74 4
|
|
DB7_F.DB73 3
|
|
DB7_F.DB72 2
|
|
DB7_F.DB71 1
|
|
DB7_F.DB70 0
|
|
RESERVEDF7FF 0xF7FF RESERVED
|
|
|
|
|
|
.C505L
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=29187&parent_oid=29275
|
|
; SAF-C505L-4EM.pdf
|
|
|
|
|
|
; up to 64 Kbytes of program memory (32K on-chip OTP memory)
|
|
; up to 64 Kbytes of external data memory
|
|
; 256 bytes of internal data memory
|
|
; 256 bytes of internal XRAM data memory
|
|
; 20 bytes of LCD Controller registers
|
|
; 16 bytes of Real-Time Clock (RTC) registers
|
|
; A 128-byte Special Function Register (SFR) area
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry SWI 0x004B Software Interrupt
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry IRTC 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.P14 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; P1ANA 0x0090 Port 1 Analog Input Selection Register
|
|
; P1ANA.EAN7 7
|
|
; P1ANA.EAN6 6
|
|
; P1ANA.EAN5 5
|
|
; P1ANA.EAN4 4
|
|
; P1ANA.EAN3 3
|
|
; P1ANA.EAN2 2
|
|
; P1ANA.EAN1 1
|
|
; P1ANA.EAN0 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM, LCD Controller and RTC
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4 SFR map bit
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.ESWI 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.SWI 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Reload Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Reload Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7 Carry Flag
|
|
PSW.AC 6 Auxiliary Carry Flag
|
|
PSW.F0 5 General Purpose Flag
|
|
PSW.RS1 4 Register Bank select control bit 1
|
|
PSW.RS0 3 Register Bank select control bit 0
|
|
PSW.OV 2 Overflow Flag
|
|
PSW.F1 1 General Purpose Flag
|
|
PSW.P 0 Parity Flag
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Data Register Low Byte
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
RESERVED00DB 0x00DB RESERVED
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.P47 7
|
|
P4.P46 6
|
|
P4.P45 5
|
|
P4.P44 4
|
|
P4.P43 3
|
|
P4.P42 2
|
|
P4.P41 1
|
|
P4.P40 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
P5 0x00F8 Port 5
|
|
P5.P55 5
|
|
P5.P54 4
|
|
P5.P53 3
|
|
P5.P52 2
|
|
P5.P51 1
|
|
P5.P50 0
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
DAC0 0xF3DC D/A Conversion Register
|
|
DAC0.S7 7
|
|
DAC0.S6 6
|
|
DAC0.S5 5
|
|
DAC0.S4 4
|
|
DAC0.S3 3
|
|
DAC0.S2 2
|
|
DAC0.S1 1
|
|
DAC0.S0 0
|
|
LCON 0xF3DD LCD Control Register
|
|
LCON.DSB1 7
|
|
LCON.DSB0 6
|
|
LCON.CSEL 1
|
|
LCON.LCEN 0
|
|
LCRL 0xF3DE LCD Timer Reload Low Register
|
|
LCRL.LCRL7 7
|
|
LCRL.LCRL6 6
|
|
LCRL.LCRL5 5
|
|
LCRL.LCRL4 4
|
|
LCRL.LCRL3 3
|
|
LCRL.LCRL2 2
|
|
LCRL.LCRL1 1
|
|
LCRL.LCRL0 0
|
|
LCRH 0xF3DF LCD Timer Reload High Register
|
|
LCRH.SLT 7
|
|
LCRH.LCRH14 6
|
|
LCRH.LCRH13 5
|
|
LCRH.LCRH12 4
|
|
LCRH.LCRH11 3
|
|
LCRH.LCRH10 2
|
|
LCRH.LCRH9 1
|
|
LCRH.LCRH8 0
|
|
DIG0 0xF3E0 LCD Digit Register 0
|
|
DIG0.SEGF 7
|
|
DIG0.SEGA 6
|
|
DIG0.SEGG 5
|
|
DIG0.SEGB 4
|
|
DIG0.SEGE 3
|
|
DIG0.SEGC 2
|
|
DIG0.SEGH 1
|
|
DIG0.SEGD 0
|
|
DIG1 0xF3E1 LCD Digit Register 1
|
|
DIG1.SEGF 7
|
|
DIG1.SEGA 6
|
|
DIG1.SEGG 5
|
|
DIG1.SEGB 4
|
|
DIG1.SEGE 3
|
|
DIG1.SEGC 2
|
|
DIG1.SEGH 1
|
|
DIG1.SEGD 0
|
|
DIG2 0xF3E2 LCD Digit Register 2
|
|
DIG2.SEGF 7
|
|
DIG2.SEGA 6
|
|
DIG2.SEGG 5
|
|
DIG2.SEGB 4
|
|
DIG2.SEGE 3
|
|
DIG2.SEGC 2
|
|
DIG2.SEGH 1
|
|
DIG2.SEGD 0
|
|
DIG3 0xF3E3 LCD Digit Register 3
|
|
DIG3.SEGF 7
|
|
DIG3.SEGA 6
|
|
DIG3.SEGG 5
|
|
DIG3.SEGB 4
|
|
DIG3.SEGE 3
|
|
DIG3.SEGC 2
|
|
DIG3.SEGH 1
|
|
DIG3.SEGD 0
|
|
DIG4 0xF3E4 LCD Digit Register 4
|
|
DIG4.SEGF 7
|
|
DIG4.SEGA 6
|
|
DIG4.SEGG 5
|
|
DIG4.SEGB 4
|
|
DIG4.SEGE 3
|
|
DIG4.SEGC 2
|
|
DIG4.SEGH 1
|
|
DIG4.SEGD 0
|
|
DIG5 0xF3E5 LCD Digit Register 5
|
|
DIG5.SEGF 7
|
|
DIG5.SEGA 6
|
|
DIG5.SEGG 5
|
|
DIG5.SEGB 4
|
|
DIG5.SEGE 3
|
|
DIG5.SEGC 2
|
|
DIG5.SEGH 1
|
|
DIG5.SEGD 0
|
|
DIG6 0xF3E6 LCD Digit Register 6
|
|
DIG6.SEGF 7
|
|
DIG6.SEGA 6
|
|
DIG6.SEGG 5
|
|
DIG6.SEGB 4
|
|
DIG6.SEGE 3
|
|
DIG6.SEGC 2
|
|
DIG6.SEGH 1
|
|
DIG6.SEGD 0
|
|
DIG7 0xF3E7 LCD Digit Register 7
|
|
DIG7.SEGF 7
|
|
DIG7.SEGA 6
|
|
DIG7.SEGG 5
|
|
DIG7.SEGB 4
|
|
DIG7.SEGE 3
|
|
DIG7.SEGC 2
|
|
DIG7.SEGH 1
|
|
DIG7.SEGD 0
|
|
DIG8 0xF3E8 LCD Digit Register 8
|
|
DIG8.SEGF 7
|
|
DIG8.SEGA 6
|
|
DIG8.SEGG 5
|
|
DIG8.SEGB 4
|
|
DIG8.SEGE 3
|
|
DIG8.SEGC 2
|
|
DIG8.SEGH 1
|
|
DIG8.SEGD 0
|
|
DIG9 0xF3E9 LCD Digit Register 9
|
|
DIG9.SEGF 7
|
|
DIG9.SEGA 6
|
|
DIG9.SEGG 5
|
|
DIG9.SEGB 4
|
|
DIG9.SEGE 3
|
|
DIG9.SEGC 2
|
|
DIG9.SEGH 1
|
|
DIG9.SEGD 0
|
|
DIGA 0xF3EA LCD Digit Register A
|
|
DIGA.SEGF 7
|
|
DIGA.SEGA 6
|
|
DIGA.SEGG 5
|
|
DIGA.SEGB 4
|
|
DIGA.SEGE 3
|
|
DIGA.SEGC 2
|
|
DIGA.SEGH 1
|
|
DIGA.SEGD 0
|
|
DIGB 0xF3EB LCD Digit Register B
|
|
DIGB.SEGF 7
|
|
DIGB.SEGA 6
|
|
DIGB.SEGG 5
|
|
DIGB.SEGB 4
|
|
DIGB.SEGE 3
|
|
DIGB.SEGC 2
|
|
DIGB.SEGH 1
|
|
DIGB.SEGD 0
|
|
DIGC 0xF3EC LCD Digit Register C
|
|
DIGC.SEGF 7
|
|
DIGC.SEGA 6
|
|
DIGC.SEGG 5
|
|
DIGC.SEGB 4
|
|
DIGC.SEGE 3
|
|
DIGC.SEGC 2
|
|
DIGC.SEGH 1
|
|
DIGC.SEGD 0
|
|
DIGD 0xF3ED LCD Digit Register D
|
|
DIGD.SEGF 7
|
|
DIGD.SEGA 6
|
|
DIGD.SEGG 5
|
|
DIGD.SEGB 4
|
|
DIGD.SEGE 3
|
|
DIGD.SEGC 2
|
|
DIGD.SEGH 1
|
|
DIGD.SEGD 0
|
|
DIGE 0xF3EE LCD Digit Register E
|
|
DIGE.SEGF 7
|
|
DIGE.SEGA 6
|
|
DIGE.SEGG 5
|
|
DIGE.SEGB 4
|
|
DIGE.SEGE 3
|
|
DIGE.SEGC 2
|
|
DIGE.SEGH 1
|
|
DIGE.SEGD 0
|
|
DIGF 0xF3EF LCD Digit Register F
|
|
DIGF.SEGF 7
|
|
DIGF.SEGA 6
|
|
DIGF.SEGG 5
|
|
DIGF.SEGB 4
|
|
DIGF.SEGE 3
|
|
DIGF.SEGC 2
|
|
DIGF.SEGH 1
|
|
DIGF.SEGD 0
|
|
RTCON 0xF3F0 Real-Time Clock Control Register
|
|
RTCON.RTPD 3
|
|
RTCON.IRTC 2
|
|
RTCON.ERTC 1
|
|
RTCON.RTCS 0
|
|
RTCR0 0xF3F1 Real-Time Clock Initialization Register 0
|
|
RTCR0.RTCR07 7
|
|
RTCR0.RTCR06 6
|
|
RTCR0.RTCR05 5
|
|
RTCR0.RTCR04 4
|
|
RTCR0.RTCR03 3
|
|
RTCR0.RTCR02 2
|
|
RTCR0.RTCR01 1
|
|
RTCR0.RTCR00 0
|
|
RTCR1 0xF3F2 Real-Time Clock Initialization Register 1
|
|
RTCR1.RTCR17 7
|
|
RTCR1.RTCR16 6
|
|
RTCR1.RTCR15 5
|
|
RTCR1.RTCR14 4
|
|
RTCR1.RTCR13 3
|
|
RTCR1.RTCR12 2
|
|
RTCR1.RTCR11 1
|
|
RTCR1.RTCR10 0
|
|
RTCR2 0xF3F3 Real-Time Clock Initialization Register 2
|
|
RTCR2.RTCR27 7
|
|
RTCR2.RTCR26 6
|
|
RTCR2.RTCR25 5
|
|
RTCR2.RTCR24 4
|
|
RTCR2.RTCR23 3
|
|
RTCR2.RTCR22 2
|
|
RTCR2.RTCR21 1
|
|
RTCR2.RTCR20 0
|
|
RTCR3 0xF3F4 Real-Time Clock Initialization Register 3
|
|
RTCR3.RTCR37 7
|
|
RTCR3.RTCR36 6
|
|
RTCR3.RTCR35 5
|
|
RTCR3.RTCR34 4
|
|
RTCR3.RTCR33 3
|
|
RTCR3.RTCR32 2
|
|
RTCR3.RTCR31 1
|
|
RTCR3.RTCR30 0
|
|
RTCR4 0xF3F5 Real-Time Clock Initialization Register 4
|
|
RTCR4.RTCR47 7
|
|
RTCR4.RTCR46 6
|
|
RTCR4.RTCR45 5
|
|
RTCR4.RTCR44 4
|
|
RTCR4.RTCR43 3
|
|
RTCR4.RTCR42 2
|
|
RTCR4.RTCR41 1
|
|
RTCR4.RTCR40 0
|
|
CLREG0 0xF3F6 Clock Count Register 0
|
|
CLREG0.CLREG07 7
|
|
CLREG0.CLREG06 6
|
|
CLREG0.CLREG05 5
|
|
CLREG0.CLREG04 4
|
|
CLREG0.CLREG03 3
|
|
CLREG0.CLREG02 2
|
|
CLREG0.CLREG01 1
|
|
CLREG0.CLREG00 0
|
|
CLREG1 0xF3F7 Clock Count Register 1
|
|
CLREG1.CLREG17 7
|
|
CLREG1.CLREG16 6
|
|
CLREG1.CLREG15 5
|
|
CLREG1.CLREG14 4
|
|
CLREG1.CLREG13 3
|
|
CLREG1.CLREG12 2
|
|
CLREG1.CLREG11 1
|
|
CLREG1.CLREG10 0
|
|
CLREG2 0xF3F8 Clock Count Register 2
|
|
CLREG2.CLREG27 7
|
|
CLREG2.CLREG26 6
|
|
CLREG2.CLREG25 5
|
|
CLREG2.CLREG24 4
|
|
CLREG2.CLREG23 3
|
|
CLREG2.CLREG22 2
|
|
CLREG2.CLREG21 1
|
|
CLREG2.CLREG20 0
|
|
CLREG3 0xF3F9 Clock Count Register 3
|
|
CLREG3.CLREG37 7
|
|
CLREG3.CLREG36 6
|
|
CLREG3.CLREG35 5
|
|
CLREG3.CLREG34 4
|
|
CLREG3.CLREG33 3
|
|
CLREG3.CLREG32 2
|
|
CLREG3.CLREG31 1
|
|
CLREG3.CLREG30 0
|
|
CLREG4 0xF3FA Clock Count Register 4
|
|
CLREG4.CLREG47 7
|
|
CLREG4.CLREG46 6
|
|
CLREG4.CLREG45 5
|
|
CLREG4.CLREG44 4
|
|
CLREG4.CLREG43 3
|
|
CLREG4.CLREG42 2
|
|
CLREG4.CLREG41 1
|
|
CLREG4.CLREG40 0
|
|
RTINT0 0xF3FB Real-Time Clock Interrupt Register 0
|
|
RTINT0.RTINT07 7
|
|
RTINT0.RTINT06 6
|
|
RTINT0.RTINT05 5
|
|
RTINT0.RTINT04 4
|
|
RTINT0.RTINT03 3
|
|
RTINT0.RTINT02 2
|
|
RTINT0.RTINT01 1
|
|
RTINT0.RTINT00 0
|
|
RTINT1 0xF3FC Real-Time Clock Interrupt Register 1
|
|
RTINT1.RTINT17 7
|
|
RTINT1.RTINT16 6
|
|
RTINT1.RTINT15 5
|
|
RTINT1.RTINT14 4
|
|
RTINT1.RTINT13 3
|
|
RTINT1.RTINT12 2
|
|
RTINT1.RTINT11 1
|
|
RTINT1.RTINT10 0
|
|
RTINT2 0xF3FD Real-Time Clock Interrupt Register 2
|
|
RTINT2.RTINT27 7
|
|
RTINT2.RTINT26 6
|
|
RTINT2.RTINT25 5
|
|
RTINT2.RTINT24 4
|
|
RTINT2.RTINT23 3
|
|
RTINT2.RTINT22 2
|
|
RTINT2.RTINT21 1
|
|
RTINT2.RTINT20 0
|
|
RTINT3 0xF3FE Real-Time Clock Interrupt Register 3
|
|
RTINT3.RTINT37 7
|
|
RTINT3.RTINT36 6
|
|
RTINT3.RTINT35 5
|
|
RTINT3.RTINT34 4
|
|
RTINT3.RTINT33 3
|
|
RTINT3.RTINT32 2
|
|
RTINT3.RTINT31 1
|
|
RTINT3.RTINT30 0
|
|
RTINT4 0xF3FF Real-Time Clock Interrupt Register 4
|
|
RTINT4.RTINT47 7
|
|
RTINT4.RTINT46 6
|
|
RTINT4.RTINT45 5
|
|
RTINT4.RTINT44 4
|
|
RTINT4.RTINT43 3
|
|
RTINT4.RTINT42 2
|
|
RTINT4.RTINT41 1
|
|
RTINT4.RTINT40 0
|
|
|
|
|
|
.C508
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=19575&parent_oid=12110
|
|
; SAF-C508-4EM.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xFC00
|
|
area DATA RAM2 0xFC00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2 0x002B Timer 2 Overflow
|
|
entry IADC 0x0043 A/D Converter
|
|
entry IEX2 0x004B External Interrupt 2
|
|
entry IEX3 0x0053 External Interrupt 3
|
|
entry IEX4 0x005B External Interrupt 4
|
|
entry IEX5 0x0063 External Interrupt 5
|
|
entry IEX6 0x006B External Interrupt 6
|
|
entry TRF_BCERR 0x0093 CAPCOM Emergency Interrupt
|
|
entry CT2P 0x009B Compare Timer 2 Interrupt
|
|
entry CCxF_CCxF 0x00A3 Capture/Compare Match Interrupt
|
|
entry CT1FP_CT1FC 0x00AB Compare Timer 1 Interrupt
|
|
entry IEX7 0x00D3 External Interrupt 7
|
|
entry IEX8 0x00DB External Interrupt 8
|
|
entry IEX9 0x00E3 External Interrupt 9
|
|
entry WAKE_UP 0x00EB Wake-up from power-down
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
WDTL 0x0084 Watchdog Timer Register, low byte
|
|
WDTL.WDTL7 7
|
|
WDTL.WDTL6 6
|
|
WDTL.WDTL5 5
|
|
WDTL.WDTL4 4
|
|
WDTL.WDTL3 3
|
|
WDTL.WDTL2 2
|
|
WDTL.WDTL1 1
|
|
WDTL.WDTL0 0
|
|
WDTH 0x0085 Watchdog Timer Register, high byte
|
|
WDTH.WDTH7 7
|
|
WDTH.WDTH6 6
|
|
WDTH.WDTH5 5
|
|
WDTH.WDTH4 4
|
|
WDTH.WDTH3 3
|
|
WDTH.WDTH2 2
|
|
WDTH.WDTH1 1
|
|
WDTH.WDTH0 0
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.P17 7
|
|
P1.P16 6
|
|
P1.P15 5
|
|
P1.P14 4
|
|
P1.P13 3
|
|
P1.P12 2
|
|
P1.P11 1
|
|
P1.P10 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
IEN2.ECT1 5
|
|
IEN2.ECCM 4
|
|
IEN2.ECT2 3
|
|
IEN2.ECEM 2
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EA 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
IEN3 0x00BE Interrupt Enable Register 3
|
|
IEN3.EX9 4
|
|
IEN3.EX8 3
|
|
IEN3.EX7 2
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.IEX2 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Compare/Capture Enable Register
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
T2CCL1 0x00C2 Compare/Capture Register 1, Low Byte
|
|
T2CCL1.T2CCL17 7
|
|
T2CCL1.T2CCL16 6
|
|
T2CCL1.T2CCL15 5
|
|
T2CCL1.T2CCL14 4
|
|
T2CCL1.T2CCL13 3
|
|
T2CCL1.T2CCL12 2
|
|
T2CCL1.T2CCL11 1
|
|
T2CCL1.T2CCL10 0
|
|
T2CCH1 0x00C3 Compare/Capture Register 1, High Byte
|
|
T2CCH1.T2CCH17 7
|
|
T2CCH1.T2CCH16 6
|
|
T2CCH1.T2CCH15 5
|
|
T2CCH1.T2CCH14 4
|
|
T2CCH1.T2CCH13 3
|
|
T2CCH1.T2CCH12 2
|
|
T2CCH1.T2CCH11 1
|
|
T2CCH1.T2CCH10 0
|
|
T2CCL2 0x00C4 Compare/Capture Register 2, Low Byte
|
|
T2CCL2.T2CCL27 7
|
|
T2CCL2.T2CCL26 6
|
|
T2CCL2.T2CCL25 5
|
|
T2CCL2.T2CCL24 4
|
|
T2CCL2.T2CCL23 3
|
|
T2CCL2.T2CCL22 2
|
|
T2CCL2.T2CCL21 1
|
|
T2CCL2.T2CCL20 0
|
|
T2CCH2 0x00C5 Compare/Capture Register 2, High Byte
|
|
T2CCH2.T2CCH27 7
|
|
T2CCH2.T2CCH26 6
|
|
T2CCH2.T2CCH25 5
|
|
T2CCH2.T2CCH24 4
|
|
T2CCH2.T2CCH23 3
|
|
T2CCH2.T2CCH22 2
|
|
T2CCH2.T2CCH21 1
|
|
T2CCH2.T2CCH20 0
|
|
T2CCL3 0x00C6 Compare/Capture Register 3, Low Byte
|
|
T2CCL3.T2CCL37 7
|
|
T2CCL3.T2CCL36 6
|
|
T2CCL3.T2CCL35 5
|
|
T2CCL3.T2CCL34 4
|
|
T2CCL3.T2CCL33 3
|
|
T2CCL3.T2CCL32 2
|
|
T2CCL3.T2CCL31 1
|
|
T2CCL3.T2CCL30 0
|
|
T2CCH3 0x00C7 Compare/Capture Register 3, High Byte
|
|
T2CCH3.T2CCH37 7
|
|
T2CCH3.T2CCH36 6
|
|
T2CCH3.T2CCH35 5
|
|
T2CCH3.T2CCH34 4
|
|
T2CCH3.T2CCH33 3
|
|
T2CCH3.T2CCH32 2
|
|
T2CCH3.T2CCH31 1
|
|
T2CCH3.T2CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Comp./Rel./Capt. Register, Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Comp./Rel./Capt. Register, High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7 Carry Flag
|
|
PSW.AC 6 Auxiliary Carry Flag
|
|
PSW.F0 5 General Purpose Flag 0
|
|
PSW.RS1 4 Register Bank select control bit 1
|
|
PSW.RS0 3 Register Bank select control bit 0
|
|
PSW.OV 2 Overflow Flag
|
|
PSW.F1 1 General Purpose Flag 1
|
|
PSW.P 0 Parity Flag
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
CP2L 0x00D2 Compare timer 2 period register, low byte
|
|
CP2L.CP2L7 7
|
|
CP2L.CP2L6 6
|
|
CP2L.CP2L5 5
|
|
CP2L.CP2L4 4
|
|
CP2L.CP2L3 3
|
|
CP2L.CP2L2 2
|
|
CP2L.CP2L1 1
|
|
CP2L.CP2L0 0
|
|
CP2H 0x00D3 Compare timer 2 period register, high byte
|
|
CP2H.CP2H1 1
|
|
CP2H.CP2H0 0
|
|
CMP2L 0x00D4 Compare timer 2 compare register, low byte
|
|
CMP2L.CMP2L7 7
|
|
CMP2L.CMP2L6 6
|
|
CMP2L.CMP2L5 5
|
|
CMP2L.CMP2L4 4
|
|
CMP2L.CMP2L3 3
|
|
CMP2L.CMP2L2 2
|
|
CMP2L.CMP2L1 1
|
|
CMP2L.CMP2L0 0
|
|
CMP2H 0x00D5 Compare timer 2 compare register, high byte
|
|
CMP2H.CMP2H1 1
|
|
CMP2H.CMP2H0 0
|
|
CCIE 0x00D6 Capture/compare interrupt enable register
|
|
CCIE.ECTP 7
|
|
CCIE.ECTC 6
|
|
CCIE.CC2FEN 5
|
|
CCIE.CC2REN 4
|
|
CCIE.CC1FEN 3
|
|
CCIE.CC1REN 2
|
|
CCIE.CC0FEN 1
|
|
CCIE.CC0REN 0
|
|
BCON 0x00D7 Block commutation control register
|
|
BCON.BCMPBCEM 7
|
|
BCON.PWM1 6
|
|
BCON.PWM0 5
|
|
BCON.EBCE 4
|
|
BCON.BCERR 3
|
|
BCON.BCEN 2
|
|
BCON.BCM1 1
|
|
BCON.BCM0 0
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.BD 6
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Start Register Low Byte
|
|
ADDATL.1 7
|
|
ADDATL.0 6
|
|
P4 0x00DB Port 4, Analog/Digital Input
|
|
P4.P47 7
|
|
P4.P46 6
|
|
P4.P45 5
|
|
P4.P44 4
|
|
P4.P43 3
|
|
P4.P42 2
|
|
P4.P41 1
|
|
P4.P40 0
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
CCPL 0x00DE Compare timer 1 period register, low byte
|
|
CCPL.CCPL7 7
|
|
CCPL.CCPL6 6
|
|
CCPL.CCPL5 5
|
|
CCPL.CCPL4 4
|
|
CCPL.CCPL3 3
|
|
CCPL.CCPL2 2
|
|
CCPL.CCPL1 1
|
|
CCPL.CCPL0 0
|
|
CCPH 0x00DF Compare timer 1 period register, high byte
|
|
CCPH.CCPH7 7
|
|
CCPH.CCPH6 6
|
|
CCPH.CCPH5 5
|
|
CCPH.CCPH4 4
|
|
CCPH.CCPH3 3
|
|
CCPH.CCPH2 2
|
|
CCPH.CCPH1 1
|
|
CCPH.CCPH0 0
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
CT1CON 0x00E1 Compare timer 1 control register
|
|
CT1CON.CTM 7
|
|
CT1CON.ETRP 6
|
|
CT1CON.STE1 5
|
|
CT1CON.CT1RES 4
|
|
CT1CON.CT1R 3
|
|
CT1CON.CLK2 2
|
|
CT1CON.CLK1 1
|
|
CT1CON.CLK0 0
|
|
COINI 0x00E2 Compare output initialization register
|
|
COINI.COUT3I 7
|
|
COINI.COUTXI 6
|
|
COINI.COUT2I 5
|
|
COINI.CC2I 4
|
|
COINI.COUT1I 3
|
|
COINI.CC1I 2
|
|
COINI.COUT0I 1
|
|
COINI.CC0I 0
|
|
CMSEL0 0x00E3 Capture/compare mode select register 0
|
|
CMSEL0.CMSEL13 7
|
|
CMSEL0.CMSEL12 6
|
|
CMSEL0.CMSEL11 5
|
|
CMSEL0.CMSEL10 4
|
|
CMSEL0.CMSEL03 3
|
|
CMSEL0.CMSEL02 2
|
|
CMSEL0.CMSEL01 1
|
|
CMSEL0.CMSEL00 0
|
|
CMSEL1 0x00E4 Capture/compare mode select register 1
|
|
CMSEL1.ESMC 7
|
|
CMSEL1.NMCS 6
|
|
CMSEL1.CMSEL23 3
|
|
CMSEL1.CMSEL22 2
|
|
CMSEL1.CMSEL21 1
|
|
CMSEL1.CMSEL20 0
|
|
CCIR 0x00E5 Capture/compare interrupt request flag reg.
|
|
CCIR.CT1FP 7
|
|
CCIR.CT1FC 6
|
|
CCIR.CC2F 5
|
|
CCIR.CC2R 4
|
|
CCIR.CC1F 3
|
|
CCIR.CC1R 2
|
|
CCIR.CC0F 1
|
|
CCIR.CC0R 0
|
|
CT1OFL 0x00E6 Compare timer 1 offset register, low byte
|
|
CT1OFL.CT1OFL7 7
|
|
CT1OFL.CT1OFL6 6
|
|
CT1OFL.CT1OFL5 5
|
|
CT1OFL.CT1OFL4 4
|
|
CT1OFL.CT1OFL3 3
|
|
CT1OFL.CT1OFL2 2
|
|
CT1OFL.CT1OFL1 1
|
|
CT1OFL.CT1OFL0 0
|
|
CT1OFH 0x00E7 Compare timer 1 offset register, high byte
|
|
CT1OFH.CT1OFH7 7
|
|
CT1OFH.CT1OFH6 6
|
|
CT1OFH.CT1OFH5 5
|
|
CT1OFH.CT1OFH4 4
|
|
CT1OFH.CT1OFH3 3
|
|
CT1OFH.CT1OFH2 2
|
|
CT1OFH.CT1OFH1 1
|
|
CT1OFH.CT1OFH0 0
|
|
RESERVED00E8 0x00E8 RESERVED
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
CT2CON 0x00F1 Compare timer 2 control register
|
|
CT2CON.CT2P 7
|
|
CT2CON.ECT2O 6
|
|
CT2CON.STE2 5
|
|
CT2CON.CT2RES 4
|
|
CT2CON.CT2R 3
|
|
CT2CON.CLK2 2
|
|
CT2CON.CLK1 1
|
|
CT2CON.CLK0 0
|
|
CCL0 0x00F2 Capture/compare register 0, low byte
|
|
CCL0.CCL07 7
|
|
CCL0.CCL06 6
|
|
CCL0.CCL05 5
|
|
CCL0.CCL04 4
|
|
CCL0.CCL03 3
|
|
CCL0.CCL02 2
|
|
CCL0.CCL01 1
|
|
CCL0.CCL00 0
|
|
CCH0 0x00F3 Capture/compare register 0, high byte
|
|
CCH0.CCH07 7
|
|
CCH0.CCH06 6
|
|
CCH0.CCH05 5
|
|
CCH0.CCH04 4
|
|
CCH0.CCH03 3
|
|
CCH0.CCH02 2
|
|
CCH0.CCH01 1
|
|
CCH0.CCH00 0
|
|
CCL1 0x00F4 Capture/compare register 1, low byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00F5 Capture/compare register 1, high byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00F6 Capture/compare register 2, low byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00F7 Capture/compare register 2, high byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
P5 0x00F8 Port 5
|
|
P5.P57 7
|
|
P5.P56 6
|
|
P5.P55 5
|
|
P5.P54 4
|
|
P5.P53 3
|
|
P5.P52 2
|
|
P5.P51 1
|
|
P5.P50 0
|
|
COTRAP 0x00F9 Compare output in trap state register
|
|
COTRAP.BCTSEL 7
|
|
COTRAP.PDTEN 6
|
|
COTRAP.COUT2T 5
|
|
COTRAP.CC2T 4
|
|
COTRAP.COUT1T 3
|
|
COTRAP.CC1T 2
|
|
COTRAP.COUT0T 1
|
|
COTRAP.CC0T 0
|
|
RESERVED00EF 0x00FA RESERVED
|
|
EINT 0x00FB External Interrupt Control Register
|
|
EINT.IEX9 5
|
|
EINT.I9FR 4
|
|
EINT.IEX8 3
|
|
EINT.I8FR 2
|
|
EINT.IEX7 1
|
|
EINT.I7FR 0
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
TRCON 0x00FF Trap enable control register
|
|
TRCON.TRPEN 7
|
|
TRCON.TRF 6
|
|
TRCON.TREN5 5
|
|
TRCON.TREN4 4
|
|
TRCON.TREN3 3
|
|
TRCON.TREN2 2
|
|
TRCON.TREN1 1
|
|
TRCON.TREN0 0
|
|
|
|
|
|
.C509
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8022&parent_oid=8090
|
|
; C509-L.pdf
|
|
|
|
|
|
; up to 64 Kbyte of external program memory
|
|
; up to 64 Kbyte of external data memory
|
|
; 512 byte of internal Boot ROM (program memory)
|
|
; 256 bytes of internal data memory
|
|
; 3 Kbyte of external XRAM data memory
|
|
; a 128 byte special function register area
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF400
|
|
area DATA XRAM 0xF400:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI0_TI0 0x0023 Serial Channel 0
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry IEX2 0x004B External Interrupt 2
|
|
entry IEX3 0x0053 External Interrupt 3
|
|
entry IEX4 0x005B External Interrupt 4
|
|
entry IEX5 0x0063 External Interrupt 5
|
|
entry IEX6 0x006B External Interrupt 6
|
|
entry RI1_TI1 0x0083 Serial Channel 1
|
|
entry ICMP0_ICMP7 0x0093 Compare Match Interupt of Compare Registers assigned to Timer 2 CM0-CM7
|
|
entry CTF 0x009B Compare Timer Overflow
|
|
entry ICS 0x00A3 Compare Match Interupt of Compare Register COMSET
|
|
entry ICR 0x00AB Compare Match Interupt of Compare Register COMCLR
|
|
entry ICC10_ICC17 0x00D3 Compare / Capture Event interrupt
|
|
entry CT1F 0x00DB Compare Timer 1 Overflow
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0 (PDIR=0)
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
; DIR0 0x0080 Direction Register Port 0 (PDIR=1)
|
|
; DIR0.DIR07 7
|
|
; DIR0.DIR06 6
|
|
; DIR0.DIR05 5
|
|
; DIR0.DIR04 4
|
|
; DIR0.DIR03 3
|
|
; DIR0.DIR02 2
|
|
; DIR0.DIR01 1
|
|
; DIR0.DIR00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
WDTL 0x0084 Watchdog Timer Register, Low Byte
|
|
WDTL.WDTL7 7
|
|
WDTL.WDTL6 6
|
|
WDTL.WDTL5 5
|
|
WDTL.WDTL4 4
|
|
WDTL.WDTL3 3
|
|
WDTL.WDTL2 2
|
|
WDTL.WDTL1 1
|
|
WDTL.WDTL0 0
|
|
WDTH 0x0085 Watchdog Timer Register, High Byte
|
|
WDTH.WDTH7 7
|
|
WDTH.WDTH6 6
|
|
WDTH.WDTH5 5
|
|
WDTH.WDTH4 4
|
|
WDTH.WDTH3 3
|
|
WDTH.WDTH2 2
|
|
WDTH.WDTH1 1
|
|
WDTH.WDTH0 0
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1 (PDIR=0)
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.INT2 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
; DIR1 0x0090 Direction Register Port 1 (PDIR=1)
|
|
; DIR1.DIR17 7
|
|
; DIR1.DIR16 6
|
|
; DIR1.DIR15 5
|
|
; DIR1.DIR14 4
|
|
; DIR1.DIR13 3
|
|
; DIR1.DIR12 2
|
|
; DIR1.DIR11 1
|
|
; DIR1.DIR10 0
|
|
XPAGE 0x0091 Page Address Register for XRAM
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
S0CON 0x0098 Serial Channel 0 Control Register
|
|
S0CON.SM0 7
|
|
S0CON.SM1 6
|
|
S0CON.SM20 5
|
|
S0CON.REN0 4
|
|
S0CON.TB80 3
|
|
S0CON.RB80 2
|
|
S0CON.TI0 1
|
|
S0CON.RI0 0
|
|
S0BUF 0x0099 Serial Channel 0 Buffer Register
|
|
S0BUF.S0BUF7 7
|
|
S0BUF.S0BUF6 6
|
|
S0BUF.S0BUF5 5
|
|
S0BUF.S0BUF4 4
|
|
S0BUF.S0BUF3 3
|
|
S0BUF.S0BUF2 2
|
|
S0BUF.S0BUF1 1
|
|
S0BUF.S0BUF0 0
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
IEN2.ECR 5
|
|
IEN2.ECS 4
|
|
IEN2.ECT 3
|
|
IEN2.ECMP 2
|
|
IEN2.ES1 0
|
|
S1CON 0x009B Serial Channel 1 Control Register
|
|
S1CON.SM 7
|
|
S1CON.S1P 6
|
|
S1CON.SM21 5
|
|
S1CON.REN1 4
|
|
S1CON.TB81 3
|
|
S1CON.RB81 2
|
|
S1CON.TI1 1
|
|
S1CON.RI1 0
|
|
S1BUF 0x009C Serial Channel 1 Buffer Register
|
|
S1BUF.S1BUF7 7
|
|
S1BUF.S1BUF6 6
|
|
S1BUF.S1BUF5 5
|
|
S1BUF.S1BUF4 4
|
|
S1BUF.S1BUF3 3
|
|
S1BUF.S1BUF2 2
|
|
S1BUF.S1BUF1 1
|
|
S1BUF.S1BUF0 0
|
|
S1RELL 0x009D Serial Channel 1 Reload Reg., Low Byte
|
|
S1RELL.S1RELL7 7
|
|
S1RELL.S1RELL6 6
|
|
S1RELL.S1RELL5 5
|
|
S1RELL.S1RELL4 4
|
|
S1RELL.S1RELL3 3
|
|
S1RELL.S1RELL2 2
|
|
S1RELL.S1RELL1 1
|
|
S1RELL.S1RELL0 0
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2 (PDIR=0)
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
; DIR2 0x00A0 Direction Register Port 2 (PDIR=1)
|
|
; DIR2.DIR27 7
|
|
; DIR2.DIR26 6
|
|
; DIR2.DIR25 5
|
|
; DIR2.DIR24 4
|
|
; DIR2.DIR23 3
|
|
; DIR2.DIR22 2
|
|
; DIR2.DIR21 1
|
|
; DIR2.DIR20 0
|
|
COMSETL 0x00A1 Compare Set Register, Low Byte
|
|
COMSETL.COMSETL7 7
|
|
COMSETL.COMSETL6 6
|
|
COMSETL.COMSETL5 5
|
|
COMSETL.COMSETL4 4
|
|
COMSETL.COMSETL3 3
|
|
COMSETL.COMSETL2 2
|
|
COMSETL.COMSETL1 1
|
|
COMSETL.COMSETL0 0
|
|
COMSETH 0x00A2 Compare Set Register, High Byte
|
|
COMSETH.COMSETH7 7
|
|
COMSETH.COMSETH6 6
|
|
COMSETH.COMSETH5 5
|
|
COMSETH.COMSETH4 4
|
|
COMSETH.COMSETH3 3
|
|
COMSETH.COMSETH2 2
|
|
COMSETH.COMSETH1 1
|
|
COMSETH.COMSETH0 0
|
|
COMCLRL 0x00A3 Compare Clear Register, Low Byte
|
|
COMCLRL.COMCLRL7 7
|
|
COMCLRL.COMCLRL6 6
|
|
COMCLRL.COMCLRL5 5
|
|
COMCLRL.COMCLRL4 4
|
|
COMCLRL.COMCLRL3 3
|
|
COMCLRL.COMCLRL2 2
|
|
COMCLRL.COMCLRL1 1
|
|
COMCLRL.COMCLRL0 0
|
|
COMCLRH 0x00A4 Compare Clear Register, High Byte
|
|
COMCLRH.COMCLRH7 7
|
|
COMCLRH.COMCLRH6 6
|
|
COMCLRH.COMCLRH5 5
|
|
COMCLRH.COMCLRH4 4
|
|
COMCLRH.COMCLRH3 3
|
|
COMCLRH.COMCLRH2 2
|
|
COMCLRH.COMCLRH1 1
|
|
COMCLRH.COMCLRH0 0
|
|
SETMSK 0x00A5 Compare Set Mask Register
|
|
SETMSK.SETMSK7 7
|
|
SETMSK.SETMSK6 6
|
|
SETMSK.SETMSK5 5
|
|
SETMSK.SETMSK4 4
|
|
SETMSK.SETMSK3 3
|
|
SETMSK.SETMSK2 2
|
|
SETMSK.SETMSK1 1
|
|
SETMSK.SETMSK0 0
|
|
CLRMSK 0x00A6 Compare Clear Mask Register
|
|
CLRMSK.CLRMSK7 7
|
|
CLRMSK.CLRMSK6 6
|
|
CLRMSK.CLRMSK5 5
|
|
CLRMSK.CLRMSK4 4
|
|
CLRMSK.CLRMSK3 3
|
|
CLRMSK.CLRMSK2 2
|
|
CLRMSK.CLRMSK1 1
|
|
CLRMSK.CLRMSK0 0
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EAL 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES0 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
S0RELL 0x00AA Serial Channel 0 Reload Reg., Low Byte
|
|
S0RELL.S0RELL7 7
|
|
S0RELL.S0RELL6 6
|
|
S0RELL.S0RELL5 5
|
|
S0RELL.S0RELL4 4
|
|
S0RELL.S0RELL3 3
|
|
S0RELL.S0RELL2 2
|
|
S0RELL.S0RELL1 1
|
|
S0RELL.S0RELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3 (PDIR=0)
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T1 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD0 1
|
|
P3.RxD0 0
|
|
; DIR3 0x00B0 Direction Register Port 3 (PDIR=1)
|
|
; DIR3.DIR37 7
|
|
; DIR3.DIR36 6
|
|
; DIR3.DIR35 5
|
|
; DIR3.DIR34 4
|
|
; DIR3.DIR33 3
|
|
; DIR3.DIR32 2
|
|
; DIR3.DIR31 1
|
|
; DIR3.DIR30 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.CLKP 7
|
|
SYSCON.PMOD 6
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
SYSCON1 0x00B2 System Control Register 1
|
|
SYSCON1.ESWC 7
|
|
SYSCON1.SWC 6
|
|
SYSCON1.EA1 4
|
|
SYSCON1.EA0 3
|
|
SYSCON1.PRGEN1 2
|
|
SYSCON1.PRGEN0 1
|
|
SYSCON1.SWAP 0
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
PRSC 0x00B4 Prescaler Control Register
|
|
PRSC.WDTP 7
|
|
PRSC.S0P 6
|
|
PRSC.T2P1 5
|
|
PRSC.T2P0 4
|
|
PRSC.T1P1 3
|
|
PRSC.T1P0 2
|
|
PRSC.T0P1 1
|
|
PRSC.T0P0 0
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.PDIR 7
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
S0RELH 0x00BA Serial Channel 0 Reload Reg., High Byte
|
|
S0RELH.S0RELH1 1
|
|
S0RELH.S0RELH0 0
|
|
S1RELH 0x00BB Serial Channel 1 Reload Reg., High Byte
|
|
S1RELH.S1RELH1 1
|
|
S1RELH.S1RELH0 0
|
|
CT1CON 0x00BC Compare Timer 1 Control Register
|
|
CT1CON.CT1P 6
|
|
CT1CON.CT1F 3
|
|
CT1CON.CLK12 2
|
|
CT1CON.CLK11 1
|
|
CT1CON.CLK10 0
|
|
RESERVED00BD 0x00BD RESERVED
|
|
IEN3 0x00BE Interrupt Enable Register 3
|
|
IEN3.ECT1 3
|
|
IEN3.ECC1 2
|
|
IRCON2 0x00BF Interrupt Request Control Register 2 (PDIR=0)
|
|
IRCON2.ICC17 7
|
|
IRCON2.ICC16 6
|
|
IRCON2.ICC15 5
|
|
IRCON2.ICC14 4
|
|
IRCON2.ICC13 3
|
|
IRCON2.ICC12 2
|
|
IRCON2.ICC11 1
|
|
IRCON2.ICC10 0
|
|
; EICC1 0x00BF Interrupt Request Enable Register for CT1 (PDIR=1)
|
|
; EICC1.EICC17 7
|
|
; EICC1.EICC16 6
|
|
; EICC1.EICC15 5
|
|
; EICC1.EICC14 4
|
|
; EICC1.EICC13 3
|
|
; EICC1.EICC12 2
|
|
; EICC1.EICC11 1
|
|
; EICC1.EICC10 0
|
|
IRCON0 0x00C0 Interrupt Request Control Register 0
|
|
IRCON0.EXF2 7
|
|
IRCON0.TF2 6
|
|
IRCON0.IEX6 5
|
|
IRCON0.IEX5 4
|
|
IRCON0.IEX4 3
|
|
IRCON0.IEX3 2
|
|
IRCON0.IEX2 1
|
|
IRCON0.IADC 0
|
|
CCEN 0x00C1 Compare/Capture Enable Register
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Compare/Capture Register 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Compare/Capture Register 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Compare/Capture Register 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Compare/Capture Register 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Compare/Capture Register 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Compare/Capture Register 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
CC4EN 0x00C9 Compare/Capture 4 Enable Register
|
|
CC4EN.COCOEN1 7
|
|
CC4EN.COCON2 6
|
|
CC4EN.COCON1 5
|
|
CC4EN.COCON0 4
|
|
CC4EN.COCOEN0 3
|
|
CC4EN.COCAH4 2
|
|
CC4EN.COCAL4 1
|
|
CC4EN.COM0 0
|
|
CRCL 0x00CA Comp./Rel./Capt. Reg. Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Comp./Rel./Capt. Reg. High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
CCL4 0x00CE Compare/Capture Register 4, Low Byte
|
|
CCL4.CCL47 7
|
|
CCL4.CCL46 6
|
|
CCL4.CCL45 5
|
|
CCL4.CCL44 4
|
|
CCL4.CCL43 3
|
|
CCL4.CCL42 2
|
|
CCL4.CCL41 1
|
|
CCL4.CCL40 0
|
|
CCH4 0x00CF Compare/Capture Register 4, High Byte
|
|
CCH4.CCH47 7
|
|
CCH4.CCH46 6
|
|
CCH4.CCH45 5
|
|
CCH4.CCH44 4
|
|
CCH4.CCH43 3
|
|
CCH4.CCH42 2
|
|
CCH4.CCH41 1
|
|
CCH4.CCH40 0
|
|
PSW 0x00D0 Program Status Word
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
IRCON1 0x00D1 Interrupt Request Control Register 1
|
|
IRCON1.ICMP7 7
|
|
IRCON1.ICMP6 6
|
|
IRCON1.ICMP5 5
|
|
IRCON1.ICMP4 4
|
|
IRCON1.ICMP3 3
|
|
IRCON1.ICMP2 2
|
|
IRCON1.ICMP1 1
|
|
IRCON1.ICMP0 0
|
|
CML0 0x00D2 Compare Register 0, Low Byte (RMAP=0)
|
|
CML0.CML07 7
|
|
CML0.CML06 6
|
|
CML0.CML05 5
|
|
CML0.CML04 4
|
|
CML0.CML03 3
|
|
CML0.CML02 2
|
|
CML0.CML01 1
|
|
CML0.CML00 0
|
|
; CC1L0 0x00D2 Compare/Capture 1 Register 0, Low Byte (RMAP=1)
|
|
; CC1L0.CC1L07 7
|
|
; CC1L0.CC1L06 6
|
|
; CC1L0.CC1L05 5
|
|
; CC1L0.CC1L04 4
|
|
; CC1L0.CC1L03 3
|
|
; CC1L0.CC1L02 2
|
|
; CC1L0.CC1L01 1
|
|
; CC1L0.CC1L00 0
|
|
CMH0 0x00D3 Compare Register 0, High Byte (RMAP=0)
|
|
CMH0.CMH07 7
|
|
CMH0.CMH06 6
|
|
CMH0.CMH05 5
|
|
CMH0.CMH04 4
|
|
CMH0.CMH03 3
|
|
CMH0.CMH02 2
|
|
CMH0.CMH01 1
|
|
CMH0.CMH00 0
|
|
; CC1H0 0x00D3 Compare/Capture 1 Register 0, High Byte (RMAP=1)
|
|
; CC1H0.CC1H07 7
|
|
; CC1H0.CC1H06 6
|
|
; CC1H0.CC1H05 5
|
|
; CC1H0.CC1H04 4
|
|
; CC1H0.CC1H03 3
|
|
; CC1H0.CC1H02 2
|
|
; CC1H0.CC1H01 1
|
|
; CC1H0.CC1H00 0
|
|
CML1 0x00D4 Compare Register 1, Low Byte (RMAP=0)
|
|
CML1.CML17 7
|
|
CML1.CML16 6
|
|
CML1.CML15 5
|
|
CML1.CML14 4
|
|
CML1.CML13 3
|
|
CML1.CML12 2
|
|
CML1.CML11 1
|
|
CML1.CML10 0
|
|
; CC1L1 0x00D4 Compare/Capture 1 Register 1, Low Byte (RMAP=1)
|
|
; CC1L1.CC1L17 7
|
|
; CC1L1.CC1L16 6
|
|
; CC1L1.CC1L15 5
|
|
; CC1L1.CC1L14 4
|
|
; CC1L1.CC1L13 3
|
|
; CC1L1.CC1L12 2
|
|
; CC1L1.CC1L11 1
|
|
; CC1L1.CC1L10 0
|
|
CMH1 0x00D5 Compare Register 1, High Byte (RMAP=0)
|
|
CMH1.CMH17 7
|
|
CMH1.CMH16 6
|
|
CMH1.CMH15 5
|
|
CMH1.CMH14 4
|
|
CMH1.CMH13 3
|
|
CMH1.CMH12 2
|
|
CMH1.CMH11 1
|
|
CMH1.CMH10 0
|
|
; CC1H1 0x00D5 Compare/Capture 1 Register 1, High Byte (RMAP=1)
|
|
; CC1H1.CC1H17 7
|
|
; CC1H1.CC1H16 6
|
|
; CC1H1.CC1H15 5
|
|
; CC1H1.CC1H14 4
|
|
; CC1H1.CC1H13 3
|
|
; CC1H1.CC1H12 2
|
|
; CC1H1.CC1H11 1
|
|
; CC1H1.CC1H10 0
|
|
CML2 0x00D6 Compare Register 2, Low Byte (RMAP=0)
|
|
CML2.CML27 7
|
|
CML2.CML26 6
|
|
CML2.CML25 5
|
|
CML2.CML24 4
|
|
CML2.CML23 3
|
|
CML2.CML22 2
|
|
CML2.CML21 1
|
|
CML2.CML20 0
|
|
; CC1L2 0x00D6 Compare/Capture 1 Register 2, Low Byte (RMAP=1)
|
|
; CC1L2.CC1L27 7
|
|
; CC1L2.CC1L26 6
|
|
; CC1L2.CC1L25 5
|
|
; CC1L2.CC1L24 4
|
|
; CC1L2.CC1L23 3
|
|
; CC1L2.CC1L22 2
|
|
; CC1L2.CC1L21 1
|
|
; CC1L2.CC1L20 0
|
|
CMH2 0x00D7 Compare Register 2, High Byte (RMAP=0)
|
|
CMH2.CMH27 7
|
|
CMH2.CMH26 6
|
|
CMH2.CMH25 5
|
|
CMH2.CMH24 4
|
|
CMH2.CMH23 3
|
|
CMH2.CMH22 2
|
|
CMH2.CMH21 1
|
|
CMH2.CMH20 0
|
|
; CC1H2 0x00D7 Compare/Capture 1 Register 2, High Byte (RMAP=1)
|
|
; CC1H2.CC1H27 7
|
|
; CC1H2.CC1H26 6
|
|
; CC1H2.CC1H25 5
|
|
; CC1H2.CC1H24 4
|
|
; CC1H2.CC1H23 3
|
|
; CC1H2.CC1H22 2
|
|
; CC1H2.CC1H21 1
|
|
; CC1H2.CC1H20 0
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.ADEX 5
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register, High Byte
|
|
ADDATH.ADDATH7 7
|
|
ADDATH.ADDATH6 6
|
|
ADDATH.ADDATH5 5
|
|
ADDATH.ADDATH4 4
|
|
ADDATH.ADDATH3 3
|
|
ADDATH.ADDATH2 2
|
|
ADDATH.ADDATH1 1
|
|
ADDATH.ADDATH0 0
|
|
ADDATL 0x00DA A/D Converter Data Register, Low Byte
|
|
ADDATL.ADDATL7 7
|
|
ADDATL.ADDATL6 6
|
|
P7 0x00DB Port 7, Analog/Digital Input
|
|
P7.P77 7
|
|
P7.P76 6
|
|
P7.P75 5
|
|
P7.P74 4
|
|
P7.P73 3
|
|
P7.P72 2
|
|
P7.P71 1
|
|
P7.P70 0
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL1 7
|
|
ADCON1.ADCL0 6
|
|
ADCON1.ADST1 5
|
|
ADCON1.ADST0 4
|
|
ADCON1.MX3 3
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
P8 0x00DD Port 8, Analog/Digital Input
|
|
P8.P86 6
|
|
P8.P85 5
|
|
P8.P84 4
|
|
P8.P83 3
|
|
P8.P82 2
|
|
P8.P81 1
|
|
P8.P80 0
|
|
CTRELL 0x00DE Compare Timer Rel. Reg., Low Byte (RMAP=0)
|
|
CTRELL.CTRELL7 7
|
|
CTRELL.CTRELL6 6
|
|
CTRELL.CTRELL5 5
|
|
CTRELL.CTRELL4 4
|
|
CTRELL.CTRELL3 3
|
|
CTRELL.CTRELL2 2
|
|
CTRELL.CTRELL1 1
|
|
CTRELL.CTRELL0 0
|
|
; CT1RELL 0x00DE Compare Timer 1 Rel. Reg., Low Byte (RMAP=1)
|
|
; CT1RELL.CT1RELL7 7
|
|
; CT1RELL.CT1RELL6 6
|
|
; CT1RELL.CT1RELL5 5
|
|
; CT1RELL.CT1RELL4 4
|
|
; CT1RELL.CT1RELL3 3
|
|
; CT1RELL.CT1RELL2 2
|
|
; CT1RELL.CT1RELL1 1
|
|
; CT1RELL.CT1RELL0 0
|
|
CTRELH 0x00DF Compare Timer Rel. Reg., High Byte (RMAP=0)
|
|
CTRELH.CTRELH7 7
|
|
CTRELH.CTRELH6 6
|
|
CTRELH.CTRELH5 5
|
|
CTRELH.CTRELH4 4
|
|
CTRELH.CTRELH3 3
|
|
CTRELH.CTRELH2 2
|
|
CTRELH.CTRELH1 1
|
|
CTRELH.CTRELH0 0
|
|
; CT1RELH 0x00DF Compare Timer 1 Rel. Reg., High Byte (RMAP=1)
|
|
; CT1RELH.CT1RELH7 7
|
|
; CT1RELH.CT1RELH6 6
|
|
; CT1RELH.CT1RELH5 5
|
|
; CT1RELH.CT1RELH4 4
|
|
; CT1RELH.CT1RELH3 3
|
|
; CT1RELH.CT1RELH2 2
|
|
; CT1RELH.CT1RELH1 1
|
|
; CT1RELH.CT1RELH0 0
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
CTCON 0x00E1 Compare Timer Control Register
|
|
CTCON.T2PS1 7
|
|
CTCON.CTP 6
|
|
CTCON.ICR 5
|
|
CTCON.ICS 4
|
|
CTCON.CTF 3
|
|
CTCON.CLK2 2
|
|
CTCON.CLK1 1
|
|
CTCON.CLK0 0
|
|
CML3 0x00E2 Compare Register 3, Low Byte (RMAP=0)
|
|
CML3.CML37 7
|
|
CML3.CML36 6
|
|
CML3.CML35 5
|
|
CML3.CML34 4
|
|
CML3.CML33 3
|
|
CML3.CML32 2
|
|
CML3.CML31 1
|
|
CML3.CML30 0
|
|
; CC1L3 0x00E2 Compare/Capture 1 Register 3, Low Byte (RMAP=1)
|
|
; CC1L3.CC1L37 7
|
|
; CC1L3.CC1L36 6
|
|
; CC1L3.CC1L35 5
|
|
; CC1L3.CC1L34 4
|
|
; CC1L3.CC1L33 3
|
|
; CC1L3.CC1L32 2
|
|
; CC1L3.CC1L31 1
|
|
; CC1L3.CC1L30 0
|
|
CMH3 0x00E3 Compare Register 3, High Byte (RMAP=0)
|
|
CMH3.CMH37 7
|
|
CMH3.CMH36 6
|
|
CMH3.CMH35 5
|
|
CMH3.CMH34 4
|
|
CMH3.CMH33 3
|
|
CMH3.CMH32 2
|
|
CMH3.CMH31 1
|
|
CMH3.CMH30 0
|
|
; CC1H3 0x00E3 Compare/Capture 1 Register 3, High Byte (RMAP=1)
|
|
; CC1H3.CC1H37 7
|
|
; CC1H3.CC1H36 6
|
|
; CC1H3.CC1H35 5
|
|
; CC1H3.CC1H34 4
|
|
; CC1H3.CC1H33 3
|
|
; CC1H3.CC1H32 2
|
|
; CC1H3.CC1H31 1
|
|
; CC1H3.CC1H30 0
|
|
CML4 0x00E4 Compare Register 4, Low Byte (RMAP=0)
|
|
CML4.CML47 7
|
|
CML4.CML46 6
|
|
CML4.CML45 5
|
|
CML4.CML44 4
|
|
CML4.CML43 3
|
|
CML4.CML42 2
|
|
CML4.CML41 1
|
|
CML4.CML40 0
|
|
; CC1L4 0x00E4 Compare/Capture 1 Register 4, Low Byte (RMAP=1)
|
|
; CC1L4.CC1L47 7
|
|
; CC1L4.CC1L46 6
|
|
; CC1L4.CC1L45 5
|
|
; CC1L4.CC1L44 4
|
|
; CC1L4.CC1L43 3
|
|
; CC1L4.CC1L42 2
|
|
; CC1L4.CC1L41 1
|
|
; CC1L4.CC1L40 0
|
|
CMH4 0x00E5 Compare Register 4, High Byte (RMAP=0)
|
|
CMH4.CMH47 7
|
|
CMH4.CMH46 6
|
|
CMH4.CMH45 5
|
|
CMH4.CMH44 4
|
|
CMH4.CMH43 3
|
|
CMH4.CMH42 2
|
|
CMH4.CMH41 1
|
|
CMH4.CMH40 0
|
|
; CC1H4 0x00E5 Compare/Capture 1 Register 4, High Byte (RMAP=1)
|
|
; CC1H4.CC1H47 7
|
|
; CC1H4.CC1H46 6
|
|
; CC1H4.CC1H45 5
|
|
; CC1H4.CC1H44 4
|
|
; CC1H4.CC1H43 3
|
|
; CC1H4.CC1H42 2
|
|
; CC1H4.CC1H41 1
|
|
; CC1H4.CC1H40 0
|
|
CML5 0x00E6 Compare Register 5, Low Byte (RMAP=0)
|
|
CML5.CML57 7
|
|
CML5.CML56 6
|
|
CML5.CML55 5
|
|
CML5.CML54 4
|
|
CML5.CML53 3
|
|
CML5.CML52 2
|
|
CML5.CML51 1
|
|
CML5.CML50 0
|
|
; CC1L5 0x00E6 Compare/Capture 1 Register 5, Low Byte (RMAP=1)
|
|
; CC1L5.CC1L57 7
|
|
; CC1L5.CC1L56 6
|
|
; CC1L5.CC1L55 5
|
|
; CC1L5.CC1L54 4
|
|
; CC1L5.CC1L53 3
|
|
; CC1L5.CC1L52 2
|
|
; CC1L5.CC1L51 1
|
|
; CC1L5.CC1L50 0
|
|
CMH5 0x00E7 Compare Register 5, High Byte (RMAP=0)
|
|
CMH5.CMH57 7
|
|
CMH5.CMH56 6
|
|
CMH5.CMH55 5
|
|
CMH5.CMH54 4
|
|
CMH5.CMH53 3
|
|
CMH5.CMH52 2
|
|
CMH5.CMH51 1
|
|
CMH5.CMH50 0
|
|
; CC1H5 0x00E7 Compare/Capture 1 Register 5, High Byte (RMAP=1)
|
|
; CC1H5.CC1H57 7
|
|
; CC1H5.CC1H56 6
|
|
; CC1H5.CC1H55 5
|
|
; CC1H5.CC1H54 4
|
|
; CC1H5.CC1H53 3
|
|
; CC1H5.CC1H52 2
|
|
; CC1H5.CC1H51 1
|
|
; CC1H5.CC1H50 0
|
|
P4 0x00E8 Port 4 (PDIR=0)
|
|
P4.CM7 7
|
|
P4.CM6 6
|
|
P4.CM5 5
|
|
P4.CM4 4
|
|
P4.CM3 3
|
|
P4.CM2 2
|
|
P4.CM1 1
|
|
P4.CM0 0
|
|
; DIR4 0x00E8 Direction Register Port 4 (PDIR=1)
|
|
; DIR4.DIR47 7
|
|
; DIR4.DIR46 6
|
|
; DIR4.DIR45 5
|
|
; DIR4.DIR44 4
|
|
; DIR4.DIR43 3
|
|
; DIR4.DIR42 2
|
|
; DIR4.DIR41 1
|
|
; DIR4.DIR40 0
|
|
MD0 0x00E9 Multiplication/Division Register 0
|
|
MD0.MD07 7
|
|
MD0.MD06 6
|
|
MD0.MD05 5
|
|
MD0.MD04 4
|
|
MD0.MD03 3
|
|
MD0.MD02 2
|
|
MD0.MD01 1
|
|
MD0.MD00 0
|
|
MD1 0x00EA Multiplication/Division Register 1
|
|
MD1.MD17 7
|
|
MD1.MD16 6
|
|
MD1.MD15 5
|
|
MD1.MD14 4
|
|
MD1.MD13 3
|
|
MD1.MD12 2
|
|
MD1.MD11 1
|
|
MD1.MD10 0
|
|
MD2 0x00EB Multiplication/Division Register 2
|
|
MD2.MD27 7
|
|
MD2.MD26 6
|
|
MD2.MD25 5
|
|
MD2.MD24 4
|
|
MD2.MD23 3
|
|
MD2.MD22 2
|
|
MD2.MD21 1
|
|
MD2.MD20 0
|
|
MD3 0x00EC Multiplication/Division Register 3
|
|
MD3.MD37 7
|
|
MD3.MD36 6
|
|
MD3.MD35 5
|
|
MD3.MD34 4
|
|
MD3.MD33 3
|
|
MD3.MD32 2
|
|
MD3.MD31 1
|
|
MD3.MD30 0
|
|
MD4 0x00ED Multiplication/Division Register 4
|
|
MD4.MD47 7
|
|
MD4.MD46 6
|
|
MD4.MD45 5
|
|
MD4.MD44 4
|
|
MD4.MD43 3
|
|
MD4.MD42 2
|
|
MD4.MD41 1
|
|
MD4.MD40 0
|
|
MD5 0x00EE Multiplication/Division Register 5
|
|
MD5.MD57 7
|
|
MD5.MD56 6
|
|
MD5.MD55 5
|
|
MD5.MD54 4
|
|
MD5.MD53 3
|
|
MD5.MD52 2
|
|
MD5.MD51 1
|
|
MD5.MD50 0
|
|
ARCON 0x00EF Arithmetic Control Register
|
|
ARCON.MDEF 7
|
|
ARCON.MDOV 6
|
|
ARCON.SLR 5
|
|
ARCON.SC4 4
|
|
ARCON.SC3 3
|
|
ARCON.SC2 2
|
|
ARCON.SC1 1
|
|
ARCON.SC0 0
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
CML6 0x00F2 Compare Register 6, Low Byte (RMAP=0)
|
|
CML6.CML67 7
|
|
CML6.CML66 6
|
|
CML6.CML65 5
|
|
CML6.CML64 4
|
|
CML6.CML63 3
|
|
CML6.CML62 2
|
|
CML6.CML61 1
|
|
CML6.CML60 0
|
|
; CC1L6 0x00F2 Compare/Capture 1 Register 6, Low Byte (RMAP=1)
|
|
; CC1L6.CC1L67 7
|
|
; CC1L6.CC1L66 6
|
|
; CC1L6.CC1L65 5
|
|
; CC1L6.CC1L64 4
|
|
; CC1L6.CC1L63 3
|
|
; CC1L6.CC1L62 2
|
|
; CC1L6.CC1L61 1
|
|
; CC1L6.CC1L60 0
|
|
CMH6 0x00F3 Compare Register 6, High Byte (RMAP=0)
|
|
CMH6.CMH67 7
|
|
CMH6.CMH66 6
|
|
CMH6.CMH65 5
|
|
CMH6.CMH64 4
|
|
CMH6.CMH63 3
|
|
CMH6.CMH62 2
|
|
CMH6.CMH61 1
|
|
CMH6.CMH60 0
|
|
; CC1H6 0x00F3 Compare/Capture 1 Register 6, High Byte (RMAP=1)
|
|
; CC1H6.CC1H67 7
|
|
; CC1H6.CC1H66 6
|
|
; CC1H6.CC1H65 5
|
|
; CC1H6.CC1H64 4
|
|
; CC1H6.CC1H63 3
|
|
; CC1H6.CC1H62 2
|
|
; CC1H6.CC1H61 1
|
|
; CC1H6.CC1H60 0
|
|
CML7 0x00F4 Compare Register 7, Low Byte (RMAP=0)
|
|
CML7.CML77 7
|
|
CML7.CML76 6
|
|
CML7.CML75 5
|
|
CML7.CML74 4
|
|
CML7.CML73 3
|
|
CML7.CML72 2
|
|
CML7.CML71 1
|
|
CML7.CML70 0
|
|
; CC1L7 0x00F4 Compare/Capture 1 Register 7, Low Byte (RMAP=1)
|
|
; CC1L7.CC1L77 7
|
|
; CC1L7.CC1L76 6
|
|
; CC1L7.CC1L75 5
|
|
; CC1L7.CC1L74 4
|
|
; CC1L7.CC1L73 3
|
|
; CC1L7.CC1L72 2
|
|
; CC1L7.CC1L71 1
|
|
; CC1L7.CC1L70 0
|
|
CMH7 0x00F5 Compare Register 7, High Byte (RMAP=0)
|
|
CMH7.CMH77 7
|
|
CMH7.CMH76 6
|
|
CMH7.CMH75 5
|
|
CMH7.CMH74 4
|
|
CMH7.CMH73 3
|
|
CMH7.CMH72 2
|
|
CMH7.CMH71 1
|
|
CMH7.CMH70 0
|
|
; CC1H7 0x00F5 Compare/Capture 1 Register 7, High Byte (RMAP=1)
|
|
; CC1H7.CC1H77 7
|
|
; CC1H7.CC1H76 6
|
|
; CC1H7.CC1H75 5
|
|
; CC1H7.CC1H74 4
|
|
; CC1H7.CC1H73 3
|
|
; CC1H7.CC1H72 2
|
|
; CC1H7.CC1H71 1
|
|
; CC1H7.CC1H70 0
|
|
CMEN 0x00F6 Compare Enable Register (RMAP=0)
|
|
CMEN.CMEN7 7
|
|
CMEN.CMEN6 6
|
|
CMEN.CMEN5 5
|
|
CMEN.CMEN4 4
|
|
CMEN.CMEN3 3
|
|
CMEN.CMEN2 2
|
|
CMEN.CMEN1 1
|
|
CMEN.CMEN0 0
|
|
; CC1EN 0x00F6 Compare/Capture Enable Register (RMAP=1)
|
|
; CC1EN.CC1EN7 7
|
|
; CC1EN.CC1EN6 6
|
|
; CC1EN.CC1EN5 5
|
|
; CC1EN.CC1EN4 4
|
|
; CC1EN.CC1EN3 3
|
|
; CC1EN.CC1EN2 2
|
|
; CC1EN.CC1EN1 1
|
|
; CC1EN.CC1EN0 0
|
|
CMSEL 0x00F7 Compare Input Select (RMAP=0)
|
|
CMSEL.CMSEL7 7
|
|
CMSEL.CMSEL6 6
|
|
CMSEL.CMSEL5 5
|
|
CMSEL.CMSEL4 4
|
|
CMSEL.CMSEL3 3
|
|
CMSEL.CMSEL2 2
|
|
CMSEL.CMSEL1 1
|
|
CMSEL.CMSEL0 0
|
|
; CAFR 0x00F7 Capture 1, Falling/Rising Edge Register (RMAP=1)
|
|
; CAFR.CAFR7 7
|
|
; CAFR.CAFR6 6
|
|
; CAFR.CAFR5 5
|
|
; CAFR.CAFR4 4
|
|
; CAFR.CAFR3 3
|
|
; CAFR.CAFR2 2
|
|
; CAFR.CAFR1 1
|
|
; CAFR.CAFR0 0
|
|
P5 0x00F8 Port 5 (PDIR=0)
|
|
P5.CCM7 7
|
|
P5.CCM6 6
|
|
P5.CCM5 5
|
|
P5.CCM4 4
|
|
P5.CCM3 3
|
|
P5.CCM2 2
|
|
P5.CCM1 1
|
|
P5.CCM0 0
|
|
; DIR5 0x00F8 Direction Register Port 5 (PDIR=1)
|
|
; DIR5.DIR57 7
|
|
; DIR5.DIR56 6
|
|
; DIR5.DIR55 5
|
|
; DIR5.DIR54 4
|
|
; DIR5.DIR53 3
|
|
; DIR5.DIR52 2
|
|
; DIR5.DIR51 1
|
|
; DIR5.DIR50 0
|
|
P9 0x00F9 Port 9 (PDIR=0)
|
|
P9.CC17 7
|
|
P9.CC16 6
|
|
P9.CC15 5
|
|
P9.CC14 4
|
|
P9.CC13 3
|
|
P9.CC12 2
|
|
P9.CC11 1
|
|
P9.CC10 0
|
|
; DIR9 0x00F9 Direction Register Port 9 (PDIR=1)
|
|
; DIR9.DIR97 7
|
|
; DIR9.DIR96 6
|
|
; DIR9.DIR95 5
|
|
; DIR9.DIR94 4
|
|
; DIR9.DIR93 3
|
|
; DIR9.DIR92 2
|
|
; DIR9.DIR91 1
|
|
; DIR9.DIR90 0
|
|
P6 0x00FA Port 6 (PDIR=0)
|
|
P6.P67 7
|
|
P6.P66 6
|
|
P6.P65 5
|
|
P6.P64 4
|
|
P6.P63 3
|
|
P6.TxD1 2
|
|
P6.RxD1 1
|
|
P6.ADST 0
|
|
; DIR6 0x00FA Direction Register Port 6 (PDIR=1)
|
|
; DIR6.DIR67 7
|
|
; DIR6.DIR66 6
|
|
; DIR6.DIR65 5
|
|
; DIR6.DIR64 4
|
|
; DIR6.DIR63 3
|
|
; DIR6.DIR62 2
|
|
; DIR6.DIR61 1
|
|
; DIR6.DIR60 0
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C513AO
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8025&parent_oid=16713
|
|
; SAF-C513AO-LN.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xFF00
|
|
area DATA XRAM 0xFF00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 interrupt
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 interrupt
|
|
entry RI_TI 0x0023 USART serial port interrupt
|
|
entry TF2_EXF2 0x002B Timer 2 interrupt
|
|
entry WCOL_TC 0x0043 Synchronous Serial Channel interrupt (SSC)
|
|
entry WA_PDM 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.SLS 5
|
|
P1.STO 4
|
|
P1.SRI 3
|
|
P1.SCLK 2
|
|
P1.T2EX 1
|
|
P1.T2 0
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IE 0x00A8 Interrupt Enable Register
|
|
IE.EA 7
|
|
IE.ESSC 6
|
|
IE.ET2 5
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
RESERVED00A9 0x00A9 RESERVED
|
|
RESERVED00AA 0x00AA RESERVED
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IP 0x00B8 Interrupt Priority Register
|
|
IP.PSSC 6
|
|
IP.PT2 5
|
|
IP.PS 4
|
|
IP.PT1 3
|
|
IP.PX1 2
|
|
IP.PT0 1
|
|
IP.PX0 0
|
|
RESERVED00B9 0x00B9 RESERVED
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
WDCON 0x00C0 Watchdog Timer Control Register
|
|
WDCON.OWDS 3
|
|
WDCON.WDTS 2
|
|
WDCON.WDT 1
|
|
WDCON.SWDT 0
|
|
RESERVED00C1 0x00C1 RESERVED
|
|
RESERVED00C2 0x00C2 RESERVED
|
|
RESERVED00C3 0x00C3 RESERVED
|
|
RESERVED00C4 0x00C4 RESERVED
|
|
RESERVED00C5 0x00C5 RESERVED
|
|
RESERVED00C6 0x00C6 RESERVED
|
|
RESERVED00C7 0x00C7 RESERVED
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.TF2 7
|
|
T2CON.EXF2 6
|
|
T2CON.RCLK 5
|
|
T2CON.TCLK 4
|
|
T2CON.EXEN2 3
|
|
T2CON.TR2 2
|
|
T2CON.C_T2 1
|
|
T2CON.CP_RL2 0
|
|
T2MOD 0x00C9 Timer 2 Mode Register
|
|
T2MOD.DCEN 0
|
|
RC2L 0x00CA Timer 2 Reload/Capture Register, Low Byte
|
|
RC2L.RC2L7 7
|
|
RC2L.RC2L6 6
|
|
RC2L.RC2L5 5
|
|
RC2L.RC2L4 4
|
|
RC2L.RC2L3 3
|
|
RC2L.RC2L2 2
|
|
RC2L.RC2L1 1
|
|
RC2L.RC2L0 0
|
|
RC2H 0x00CB Timer 2 Reload/Capture Register, High Byte
|
|
RC2H.RC2H7 7
|
|
RC2H.RC2H6 6
|
|
RC2H.RC2H5 5
|
|
RC2H.RC2H4 4
|
|
RC2H.RC2H3 3
|
|
RC2H.RC2H2 2
|
|
RC2H.RC2H1 1
|
|
RC2H.RC2H0 0
|
|
TL2 0x00CC Timer 2 Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2 High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
RESERVED00D8 0x00D8 RESERVED
|
|
RESERVED00D9 0x00D9 RESERVED
|
|
RESERVED00DA 0x00DA RESERVED
|
|
RESERVED00DB 0x00DB RESERVED
|
|
RESERVED00DC 0x00DC RESERVED
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
SSCCON 0x00E8 SSC Control Register
|
|
SSCCON.SCEN 7
|
|
SSCCON.TEN 6
|
|
SSCCON.MSTR 5
|
|
SSCCON.CPOL 4
|
|
SSCCON.CPHA 3
|
|
SSCCON.BRS2 2
|
|
SSCCON.BRS1 1
|
|
SSCCON.BRS0 0
|
|
STB 0x00E9 SSC Transmit Register
|
|
STB.STB7 7
|
|
STB.STB6 6
|
|
STB.STB5 5
|
|
STB.STB4 4
|
|
STB.STB3 3
|
|
STB.STB2 2
|
|
STB.STB1 1
|
|
STB.STB0 0
|
|
SRB 0x00EA SSC Receive Register
|
|
SRB.SRB7 7
|
|
SRB.SRB6 6
|
|
SRB.SRB5 5
|
|
SRB.SRB4 4
|
|
SRB.SRB3 3
|
|
SRB.SRB2 2
|
|
SRB.SRB1 1
|
|
SRB.SRB0 0
|
|
SSCMOD 0x00EB SSC Mode Test Register
|
|
SSCMOD.LOOPB 7
|
|
SSCMOD.TRIO 6
|
|
SSCMOD.LSBSM 0
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
SCF 0x00F8 SSC Flag Register
|
|
SCF.WCOL 1
|
|
SCF.TC 0
|
|
SCIEN 0x00F9 SSC Interrupt Enable Register
|
|
SCIEN.WCEN 1
|
|
SCIEN.TCEN 0
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR0.VR07 7
|
|
VR0.VR06 6
|
|
VR0.VR05 5
|
|
VR0.VR04 4
|
|
VR0.VR03 3
|
|
VR0.VR02 2
|
|
VR0.VR01 1
|
|
VR0.VR00 0
|
|
VR1 0x00FD Version Register 1
|
|
VR1.VR17 7
|
|
VR1.VR16 6
|
|
VR1.VR15 5
|
|
VR1.VR14 4
|
|
VR1.VR13 3
|
|
VR1.VR12 2
|
|
VR1.VR11 1
|
|
VR1.VR10 0
|
|
VR2 0x00FE Version Register 2
|
|
VR2.VR27 7
|
|
VR2.VR26 6
|
|
VR2.VR25 5
|
|
VR2.VR24 4
|
|
VR2.VR23 3
|
|
VR2.VR22 2
|
|
VR2.VR21 1
|
|
VR2.VR20 0
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C515
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8032&parent_oid=16670
|
|
; SAF-C515-L24N.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI_TI 0x0023 Serial channel
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
RESERVED0086 0x0086 RESERVED
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_0 7
|
|
TMOD.C_T_0 6
|
|
TMOD.M1_0 5
|
|
TMOD.M0_0 4
|
|
TMOD.GATE_1 3
|
|
TMOD.C_T_1 2
|
|
TMOD.M1_1 1
|
|
TMOD.M0_1 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.INT2 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EAL 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
RESERVED00AA 0x00AA RESERVED
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.IEX2 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON 0x00D8 A/D Converter Control Register
|
|
ADCON.BD 7
|
|
ADCON.CLK 6
|
|
ADCON.BSY 4
|
|
ADCON.ADM 3
|
|
ADCON.MX2 2
|
|
ADCON.MX1 1
|
|
ADCON.MX0 0
|
|
ADDAT 0x00D9 A/D Converter Data Register
|
|
ADDAT.ADDAT7 7
|
|
ADDAT.ADDAT6 6
|
|
ADDAT.ADDAT5 5
|
|
ADDAT.ADDAT4 4
|
|
ADDAT.ADDAT3 3
|
|
ADDAT.ADDAT2 2
|
|
ADDAT.ADDAT1 1
|
|
ADDAT.ADDAT0 0
|
|
DAPR 0x00DA A/D Converter Program Register
|
|
DAPR.DAPR7 7
|
|
DAPR.DAPR6 6
|
|
DAPR.DAPR5 5
|
|
DAPR.DAPR4 4
|
|
DAPR.DAPR3 3
|
|
DAPR.DAPR2 2
|
|
DAPR.DAPR1 1
|
|
DAPR.DAPR0 0
|
|
P6 0x00DB Port 6, Analog/Digital Input
|
|
P6.P67 7
|
|
P6.P66 6
|
|
P6.P65 5
|
|
P6.P64 4
|
|
P6.P63 3
|
|
P6.P62 2
|
|
P6.P61 1
|
|
P6.P60 0
|
|
RESERVED00DC 0x00DC RESERVED
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8
|
|
P4.P47 7
|
|
P4.P46 6
|
|
P4.P45 5
|
|
P4.P44 4
|
|
P4.P43 3
|
|
P4.P42 2
|
|
P4.P41 1
|
|
P4.P40 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
P5 0x00F8
|
|
P5.P57 7
|
|
P5.P56 6
|
|
P5.P55 5
|
|
P5.P54 4
|
|
P5.P53 3
|
|
P5.P52 2
|
|
P5.P51 1
|
|
P5.P50 0
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C515A
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8033&parent_oid=12122
|
|
; SAF_C515A-4R24M.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xFC00
|
|
area DATA XRAM 0xFC00:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI_TI 0x0023 Serial channel
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry WAKE_UP 0x007B Wake-up from power-down mode
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.INT2 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
XPAGE 0x0091 Page Address Register for Extended On-Chip RAM
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EAL 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, Low Byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System/XRAM Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, High Byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.IEX2 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.ADEX 5
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register, High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Data Register, low Byte
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
P6 0x00DB Port 6, Analog/Digital Input
|
|
P6.P67 7
|
|
P6.P66 6
|
|
P6.P65 5
|
|
P6.P64 4
|
|
P6.P63 3
|
|
P6.P62 2
|
|
P6.P61 1
|
|
P6.P60 0
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL 7
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.P47 7
|
|
P4.P46 6
|
|
P4.P45 5
|
|
P4.P44 4
|
|
P4.P43 3
|
|
P4.P42 2
|
|
P4.P41 1
|
|
P4.P40 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
P5 0x00F8 Port 5
|
|
P5.P57 7
|
|
P5.P56 6
|
|
P5.P55 5
|
|
P5.P54 4
|
|
P5.P53 3
|
|
P5.P52 2
|
|
P5.P51 1
|
|
P5.P50 0
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C515C
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=31042&parent_oid=12126
|
|
; SAF_C515C-8EM.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0xF700
|
|
area DATA CAN 0xF700:0xF800
|
|
area DATA XRAM 0xF800:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial Channel
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow / Ext. Reload
|
|
entry IADC 0x0043 A/D Converter
|
|
entry IEX2 0x004B External Interrupt 2
|
|
entry IEX3 0x0053 External Interrupt 3
|
|
entry IEX4 0x005B External Interrupt 4
|
|
entry IEX5 0x0063 External Interrupt 5
|
|
entry IEX6 0x006B External Interrupt 6
|
|
entry WUPPDM 0x007B Wake-up from power-down mode
|
|
entry CANC 0x008B CAN controller
|
|
entry IEX7 0x00A3 External Interrupt 7
|
|
entry IEX8 0x00AB External Interrupt 8
|
|
entry SSCI 0x0093 SSC interface
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_0 7
|
|
TMOD.C_T_0 6
|
|
TMOD.M1_0 5
|
|
TMOD.M0_0 4
|
|
TMOD.GATE_1 3
|
|
TMOD.C_T_1 2
|
|
TMOD.M1_1 1
|
|
TMOD.M0_1 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.INT2 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
XPAGE 0x0091 Page Address Register for Extended on-chip XRAM and CAN Controller
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
SSCCON 0x0093 SSC Control Register
|
|
SSCCON.SCEN 7
|
|
SSCCON.TEN 6
|
|
SSCCON.MSTR 5
|
|
SSCCON.CPOL 4
|
|
SSCCON.CPHA 3
|
|
SSCCON.BRS2 2
|
|
SSCCON.BRS1 1
|
|
SSCCON.BRS0 0
|
|
STB 0x0094 SSC Transmit Buffer
|
|
STB.STB7 7
|
|
STB.STB6 6
|
|
STB.STB5 5
|
|
STB.STB4 4
|
|
STB.STB3 3
|
|
STB.STB2 2
|
|
STB.STB1 1
|
|
STB.STB0 0
|
|
SRB 0x0095 SSC Receive Register
|
|
SRB.SRB7 7
|
|
SRB.SRB6 6
|
|
SRB.SRB5 5
|
|
SRB.SRB4 4
|
|
SRB.SRB3 3
|
|
SRB.SRB2 2
|
|
SRB.SRB1 1
|
|
SRB.SRB0 0
|
|
SSCMOD 0x0096 SSC Mode Test Register
|
|
SSCMOD.LOOPB 7
|
|
SSCMOD.TRIO 6
|
|
SSCMOD.LSBSM 0
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
IEN2.EX8 5
|
|
IEN2.EX7 4
|
|
IEN2.ESSC 2
|
|
IEN2.ECAN 1
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EAL 7
|
|
IEN0.WDT 6
|
|
IEN0.ET2 5
|
|
IEN0.ES 4
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
SRELL 0x00AA Serial Channel Reload Register, low byte
|
|
SRELL.SRELL7 7
|
|
SRELL.SRELL6 6
|
|
SRELL.SRELL5 5
|
|
SRELL.SRELL4 4
|
|
SRELL.SRELL3 3
|
|
SRELL.SRELL2 2
|
|
SRELL.SRELL1 1
|
|
SRELL.SRELL0 0
|
|
SCF 0x00AB SSC Flag Register
|
|
SCF.WCOL 1
|
|
SCF.TC 0
|
|
SCIEN 0x00AC SSC Interrupt Enable Register
|
|
SCIEN.WCEN 1
|
|
SCIEN.TCEN 0
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD 1
|
|
P3.RxD 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.PMOD 6
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
; SYSCON 0x00B1 System Control Register (available in the C515C-8E)
|
|
; SYSCON.PMOD 6
|
|
; SYSCON.EALE 5
|
|
; SYSCON.RMAP 4
|
|
; SYSCON.CSWO 2
|
|
; SYSCON.XMAP1 1
|
|
; SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.PDIR 7
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
SRELH 0x00BA Serial Channel Reload Register, high byte
|
|
SRELH.SRELH1 1
|
|
SRELH.SRELH0 0
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
IRCON.EXF2 7
|
|
IRCON.TF2 6
|
|
IRCON.IEX6 5
|
|
IRCON.IEX5 4
|
|
IRCON.IEX4 3
|
|
IRCON.IEX3 2
|
|
IRCON.IEX2 1
|
|
IRCON.IADC 0
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.ADEX 5
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Data Register Low Byte
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
P6 0x00DB Port 6, Analog/Digital Input
|
|
P6.P67 7
|
|
P6.P66 6
|
|
P6.P65 5
|
|
P6.P64 4
|
|
P6.P63 3
|
|
P6.P62 2
|
|
P6.P61 1
|
|
P6.P60 0
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL 7
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
P4.RXDC 7
|
|
P4.TXDC 6
|
|
P4.INT8 5
|
|
P4.SLS 4
|
|
P4.STO 3
|
|
P4.SRI 2
|
|
P4.SCLK 1
|
|
P4.ADST 0
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
P5 0x00F8 Port 5
|
|
P5.P57 7
|
|
P5.P56 6
|
|
P5.P55 5
|
|
P5.P54 4
|
|
P5.P53 3
|
|
P5.P52 2
|
|
P5.P51 1
|
|
P5.P50 0
|
|
; DIR5 0x00F8 Port 5 Direction Register
|
|
; DIR5.DIR57 7
|
|
; DIR5.DIR56 6
|
|
; DIR5.DIR55 5
|
|
; DIR5.DIR54 4
|
|
; DIR5.DIR53 3
|
|
; DIR5.DIR52 2
|
|
; DIR5.DIR51 1
|
|
; DIR5.DIR50 0
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
P7 0x00FA Port 7
|
|
P7.INT7 0
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC (C515C-8E only)
|
|
VR1 0x00FD (C515C-8E only)
|
|
VR2 0x00FE (C515C-8E only)
|
|
RESERVED00FF 0x00FF RESERVED
|
|
CR 0xF700 Control Register
|
|
CR.TEST 7
|
|
CR.CCE 6
|
|
CR.EIE 3
|
|
CR.SIE 2
|
|
CR.IE 1
|
|
CR.INIT 0
|
|
SR 0xF701 Status Register
|
|
SR.BOFF 7
|
|
SR.EWRN 6
|
|
SR.RXOK 4
|
|
SR.TXOK 3
|
|
SR.LEC2 2
|
|
SR.LEC1 1
|
|
SR.LEC0 0
|
|
IR 0xF702 Interrupt Register
|
|
IR.INTID7 7
|
|
IR.INTID6 6
|
|
IR.INTID5 5
|
|
IR.INTID4 4
|
|
IR.INTID3 3
|
|
IR.INTID2 2
|
|
IR.INTID1 1
|
|
IR.INTID0 0
|
|
RESERVEDF703 0xF703 RESERVED
|
|
BTR0 0xF704 Bit Timing Register Low
|
|
BTR0.SJW7 7
|
|
BTR0.SJW6 6
|
|
BTR0.BRP5 5
|
|
BTR0.BRP4 4
|
|
BTR0.BRP3 3
|
|
BTR0.BRP2 2
|
|
BTR0.BRP1 1
|
|
BTR0.BRP0 0
|
|
BTR1 0xF705 Bit Timing Register High
|
|
BTR1.TSEG27 7
|
|
BTR1.TSEG26 6
|
|
BTR1.TSEG25 5
|
|
BTR1.TSEG24 4
|
|
BTR1.TSEG13 3
|
|
BTR1.TSEG12 2
|
|
BTR1.TSEG11 1
|
|
BTR1.TSEG10 0
|
|
GMS0 0xF706 Global Mask Short Register Low
|
|
GMS0.ID28 7
|
|
GMS0.ID27 6
|
|
GMS0.ID26 5
|
|
GMS0.ID25 4
|
|
GMS0.ID24 3
|
|
GMS0.ID23 2
|
|
GMS0.ID22 1
|
|
GMS0.ID21 0
|
|
GMS1 0xF707 Global Mask Short Register High
|
|
GMS1.ID20 7
|
|
GMS1.ID19 6
|
|
GMS1.ID18 5
|
|
UGML0 0xF708 Upper Global Mask Long Register Low
|
|
UGML0.ID28 7
|
|
UGML0.ID27 6
|
|
UGML0.ID26 5
|
|
UGML0.ID25 4
|
|
UGML0.ID24 3
|
|
UGML0.ID23 2
|
|
UGML0.ID22 1
|
|
UGML0.ID21 0
|
|
UGML1 0xF709 Upper Global Mask Long Register High
|
|
UGML1.ID20 7
|
|
UGML1.ID19 6
|
|
UGML1.ID18 5
|
|
UGML1.ID17 4
|
|
UGML1.ID16 3
|
|
UGML1.ID15 2
|
|
UGML1.ID14 1
|
|
UGML1.ID13 0
|
|
LGML0 0xF70A Lower Global Mask Long Register Low
|
|
LGML0.ID12 7
|
|
LGML0.ID11 6
|
|
LGML0.ID10 5
|
|
LGML0.ID9 4
|
|
LGML0.ID8 3
|
|
LGML0.ID7 2
|
|
LGML0.ID6 1
|
|
LGML0.ID5 0
|
|
LGML1 0xF70B Lower Global Mask Long Register High
|
|
LGML1.ID4 7
|
|
LGML1.ID3 6
|
|
LGML1.ID2 5
|
|
LGML1.ID1 4
|
|
LGML1.ID0 3
|
|
UMLM0 0xF70C Upper Mask of Last Message Register Low
|
|
UMLM0.ID28 7
|
|
UMLM0.ID27 6
|
|
UMLM0.ID26 5
|
|
UMLM0.ID25 4
|
|
UMLM0.ID24 3
|
|
UMLM0.ID23 2
|
|
UMLM0.ID22 1
|
|
UMLM0.ID21 0
|
|
UMLM1 0xF70D Upper Mask of Last Message Register High
|
|
UMLM1.ID20 7
|
|
UMLM1.ID19 6
|
|
UMLM1.ID18 5
|
|
UMLM1.ID17 4
|
|
UMLM1.ID16 3
|
|
UMLM1.ID15 2
|
|
UMLM1.ID14 1
|
|
UMLM1.ID13 0
|
|
LMLM0 0xF70E Lower Mask of Last Message Register Low
|
|
LMLM0.ID12 7
|
|
LMLM0.ID11 6
|
|
LMLM0.ID10 5
|
|
LMLM0.ID9 4
|
|
LMLM0.ID8 3
|
|
LMLM0.ID7 2
|
|
LMLM0.ID6 1
|
|
LMLM0.ID5 0
|
|
LMLM1 0xF70F Lower Mask of Last Message Register High
|
|
LMLM1.ID4 7
|
|
LMLM1.ID3 6
|
|
LMLM1.ID2 5
|
|
LMLM1.ID1 4
|
|
LMLM1.ID0 3
|
|
; -------------------------------------- CAN_1 --------------------------------
|
|
MCR0_1 0xF710 Message Control Register Low
|
|
MCR0_1.MSGVAL1 7
|
|
MCR0_1.MSGVAL0 6
|
|
MCR0_1.TXIE1 5
|
|
MCR0_1.TXIE0 4
|
|
MCR0_1.RXIE1 3
|
|
MCR0_1.RXIE0 2
|
|
MCR0_1.INTPND1 1
|
|
MCR0_1.INTPND0 0
|
|
MCR1_1 0xF711 Message Control Register High
|
|
MCR1_1.RMTPND1 7
|
|
MCR1_1.RMTPND0 6
|
|
MCR1_1.TXRQ1 5
|
|
MCR1_1.TXRQ0 4
|
|
MCR1_1.MSGLSTCPUUPD1 3
|
|
MCR1_1.MSGLSTCPUUPD0 2
|
|
MCR1_1.NEWDAT1 1
|
|
MCR1_1.NEWDAT0 0
|
|
UAR0_1 0xF712 Upper Arbitration Register Low
|
|
UAR0_1.ID28 7
|
|
UAR0_1.ID27 6
|
|
UAR0_1.ID26 5
|
|
UAR0_1.ID25 4
|
|
UAR0_1.ID24 3
|
|
UAR0_1.ID23 2
|
|
UAR0_1.ID22 1
|
|
UAR0_1.ID21 0
|
|
UAR1_1 0xF713 Upper Arbitration Register High
|
|
UAR1_1.ID20 7
|
|
UAR1_1.ID19 6
|
|
UAR1_1.ID18 5
|
|
UAR1_1.ID17 4
|
|
UAR1_1.ID16 3
|
|
UAR1_1.ID15 2
|
|
UAR1_1.ID14 1
|
|
UAR1_1.ID13 0
|
|
LAR0_1 0xF714 Lower Arbitration Register Low
|
|
LAR0_1.ID12 7
|
|
LAR0_1.ID11 6
|
|
LAR0_1.ID10 5
|
|
LAR0_1.ID9 4
|
|
LAR0_1.ID8 3
|
|
LAR0_1.ID7 2
|
|
LAR0_1.ID6 1
|
|
LAR0_1.ID5 0
|
|
LAR1_1 0xF715 Lower Arbitration Register High
|
|
LAR1_1.ID4 7
|
|
LAR1_1.ID3 6
|
|
LAR1_1.ID2 5
|
|
LAR1_1.ID1 4
|
|
LAR1_1.ID0 3
|
|
MCFG_1 0xF716 Message Configuration Register
|
|
MCFG_1.DLC7 7
|
|
MCFG_1.DLC6 6
|
|
MCFG_1.DLC5 5
|
|
MCFG_1.DLC4 4
|
|
MCFG_1.DIR 3
|
|
MCFG_1.XTD 2
|
|
DB0_1 0xF717 Message Data Byte 0
|
|
DB0_1.DB07 7
|
|
DB0_1.DB06 6
|
|
DB0_1.DB05 5
|
|
DB0_1.DB04 4
|
|
DB0_1.DB03 3
|
|
DB0_1.DB02 2
|
|
DB0_1.DB01 1
|
|
DB0_1.DB00 0
|
|
DB1_1 0xF718 Message Data Byte 1
|
|
DB1_1.DB17 7
|
|
DB1_1.DB16 6
|
|
DB1_1.DB15 5
|
|
DB1_1.DB14 4
|
|
DB1_1.DB13 3
|
|
DB1_1.DB12 2
|
|
DB1_1.DB11 1
|
|
DB1_1.DB10 0
|
|
DB2_1 0xF719 Message Data Byte 2
|
|
DB2_1.DB27 7
|
|
DB2_1.DB26 6
|
|
DB2_1.DB25 5
|
|
DB2_1.DB24 4
|
|
DB2_1.DB23 3
|
|
DB2_1.DB22 2
|
|
DB2_1.DB21 1
|
|
DB2_1.DB20 0
|
|
DB3_1 0xF71A Message Data Byte 3
|
|
DB3_1.DB37 7
|
|
DB3_1.DB36 6
|
|
DB3_1.DB35 5
|
|
DB3_1.DB34 4
|
|
DB3_1.DB33 3
|
|
DB3_1.DB32 2
|
|
DB3_1.DB31 1
|
|
DB3_1.DB30 0
|
|
DB4_1 0xF71B Message Data Byte 4
|
|
DB4_1.DB47 7
|
|
DB4_1.DB46 6
|
|
DB4_1.DB45 5
|
|
DB4_1.DB44 4
|
|
DB4_1.DB43 3
|
|
DB4_1.DB42 2
|
|
DB4_1.DB41 1
|
|
DB4_1.DB40 0
|
|
DB5_1 0xF71C Message Data Byte 5
|
|
DB5_1.DB57 7
|
|
DB5_1.DB56 6
|
|
DB5_1.DB55 5
|
|
DB5_1.DB54 4
|
|
DB5_1.DB53 3
|
|
DB5_1.DB52 2
|
|
DB5_1.DB51 1
|
|
DB5_1.DB50 0
|
|
DB6_1 0xF71D Message Data Byte 6
|
|
DB6_1.DB67 7
|
|
DB6_1.DB66 6
|
|
DB6_1.DB65 5
|
|
DB6_1.DB64 4
|
|
DB6_1.DB63 3
|
|
DB6_1.DB62 2
|
|
DB6_1.DB61 1
|
|
DB6_1.DB60 0
|
|
DB7_1 0xF71E Message Data Byte 7
|
|
DB7_1.DB77 7
|
|
DB7_1.DB76 6
|
|
DB7_1.DB75 5
|
|
DB7_1.DB74 4
|
|
DB7_1.DB73 3
|
|
DB7_1.DB72 2
|
|
DB7_1.DB71 1
|
|
DB7_1.DB70 0
|
|
RESERVEDF71F 0xF71F RESERVED
|
|
; -------------------------------------- CAN_2 --------------------------------
|
|
MCR0_2 0xF720 Message Control Register Low
|
|
MCR0_2.MSGVAL1 7
|
|
MCR0_2.MSGVAL0 6
|
|
MCR0_2.TXIE1 5
|
|
MCR0_2.TXIE0 4
|
|
MCR0_2.RXIE1 3
|
|
MCR0_2.RXIE0 2
|
|
MCR0_2.INTPND1 1
|
|
MCR0_2.INTPND0 0
|
|
MCR1_2 0xF721 Message Control Register High
|
|
MCR1_2.RMTPND1 7
|
|
MCR1_2.RMTPND0 6
|
|
MCR1_2.TXRQ1 5
|
|
MCR1_2.TXRQ0 4
|
|
MCR1_2.MSGLSTCPUUPD1 3
|
|
MCR1_2.MSGLSTCPUUPD0 2
|
|
MCR1_2.NEWDAT1 1
|
|
MCR1_2.NEWDAT0 0
|
|
UAR0_2 0xF722 Upper Arbitration Register Low
|
|
UAR0_2.ID28 7
|
|
UAR0_2.ID27 6
|
|
UAR0_2.ID26 5
|
|
UAR0_2.ID25 4
|
|
UAR0_2.ID24 3
|
|
UAR0_2.ID23 2
|
|
UAR0_2.ID22 1
|
|
UAR0_2.ID21 0
|
|
UAR1_2 0xF723 Upper Arbitration Register High
|
|
UAR1_2.ID20 7
|
|
UAR1_2.ID19 6
|
|
UAR1_2.ID18 5
|
|
UAR1_2.ID17 4
|
|
UAR1_2.ID16 3
|
|
UAR1_2.ID15 2
|
|
UAR1_2.ID14 1
|
|
UAR1_2.ID13 0
|
|
LAR0_2 0xF724 Lower Arbitration Register Low
|
|
LAR0_2.ID12 7
|
|
LAR0_2.ID11 6
|
|
LAR0_2.ID10 5
|
|
LAR0_2.ID9 4
|
|
LAR0_2.ID8 3
|
|
LAR0_2.ID7 2
|
|
LAR0_2.ID6 1
|
|
LAR0_2.ID5 0
|
|
LAR1_2 0xF725 Lower Arbitration Register High
|
|
LAR1_2.ID4 7
|
|
LAR1_2.ID3 6
|
|
LAR1_2.ID2 5
|
|
LAR1_2.ID1 4
|
|
LAR1_2.ID0 3
|
|
MCFG_2 0xF726 Message Configuration Register
|
|
MCFG_2.DLC7 7
|
|
MCFG_2.DLC6 6
|
|
MCFG_2.DLC5 5
|
|
MCFG_2.DLC4 4
|
|
MCFG_2.DIR 3
|
|
MCFG_2.XTD 2
|
|
DB0_2 0xF727 Message Data Byte 0
|
|
DB0_2.DB07 7
|
|
DB0_2.DB06 6
|
|
DB0_2.DB05 5
|
|
DB0_2.DB04 4
|
|
DB0_2.DB03 3
|
|
DB0_2.DB02 2
|
|
DB0_2.DB01 1
|
|
DB0_2.DB00 0
|
|
DB1_2 0xF728 Message Data Byte 1
|
|
DB1_2.DB17 7
|
|
DB1_2.DB16 6
|
|
DB1_2.DB15 5
|
|
DB1_2.DB14 4
|
|
DB1_2.DB13 3
|
|
DB1_2.DB12 2
|
|
DB1_2.DB11 1
|
|
DB1_2.DB10 0
|
|
DB2_2 0xF729 Message Data Byte 2
|
|
DB2_2.DB27 7
|
|
DB2_2.DB26 6
|
|
DB2_2.DB25 5
|
|
DB2_2.DB24 4
|
|
DB2_2.DB23 3
|
|
DB2_2.DB22 2
|
|
DB2_2.DB21 1
|
|
DB2_2.DB20 0
|
|
DB3_2 0xF72A Message Data Byte 3
|
|
DB3_2.DB37 7
|
|
DB3_2.DB36 6
|
|
DB3_2.DB35 5
|
|
DB3_2.DB34 4
|
|
DB3_2.DB33 3
|
|
DB3_2.DB32 2
|
|
DB3_2.DB31 1
|
|
DB3_2.DB30 0
|
|
DB4_2 0xF72B Message Data Byte 4
|
|
DB4_2.DB47 7
|
|
DB4_2.DB46 6
|
|
DB4_2.DB45 5
|
|
DB4_2.DB44 4
|
|
DB4_2.DB43 3
|
|
DB4_2.DB42 2
|
|
DB4_2.DB41 1
|
|
DB4_2.DB40 0
|
|
DB5_2 0xF72C Message Data Byte 5
|
|
DB5_2.DB57 7
|
|
DB5_2.DB56 6
|
|
DB5_2.DB55 5
|
|
DB5_2.DB54 4
|
|
DB5_2.DB53 3
|
|
DB5_2.DB52 2
|
|
DB5_2.DB51 1
|
|
DB5_2.DB50 0
|
|
DB6_2 0xF72D Message Data Byte 6
|
|
DB6_2.DB67 7
|
|
DB6_2.DB66 6
|
|
DB6_2.DB65 5
|
|
DB6_2.DB64 4
|
|
DB6_2.DB63 3
|
|
DB6_2.DB62 2
|
|
DB6_2.DB61 1
|
|
DB6_2.DB60 0
|
|
DB7_2 0xF72E Message Data Byte 7
|
|
DB7_2.DB77 7
|
|
DB7_2.DB76 6
|
|
DB7_2.DB75 5
|
|
DB7_2.DB74 4
|
|
DB7_2.DB73 3
|
|
DB7_2.DB72 2
|
|
DB7_2.DB71 1
|
|
DB7_2.DB70 0
|
|
RESERVEDF72F 0xF72F RESERVED
|
|
; -------------------------------------- CAN_3 --------------------------------
|
|
MCR0_3 0xF730 Message Control Register Low
|
|
MCR0_3.MSGVAL1 7
|
|
MCR0_3.MSGVAL0 6
|
|
MCR0_3.TXIE1 5
|
|
MCR0_3.TXIE0 4
|
|
MCR0_3.RXIE1 3
|
|
MCR0_3.RXIE0 2
|
|
MCR0_3.INTPND1 1
|
|
MCR0_3.INTPND0 0
|
|
MCR1_3 0xF731 Message Control Register High
|
|
MCR1_3.RMTPND1 7
|
|
MCR1_3.RMTPND0 6
|
|
MCR1_3.TXRQ1 5
|
|
MCR1_3.TXRQ0 4
|
|
MCR1_3.MSGLSTCPUUPD1 3
|
|
MCR1_3.MSGLSTCPUUPD0 2
|
|
MCR1_3.NEWDAT1 1
|
|
MCR1_3.NEWDAT0 0
|
|
UAR0_3 0xF732 Upper Arbitration Register Low
|
|
UAR0_3.ID28 7
|
|
UAR0_3.ID27 6
|
|
UAR0_3.ID26 5
|
|
UAR0_3.ID25 4
|
|
UAR0_3.ID24 3
|
|
UAR0_3.ID23 2
|
|
UAR0_3.ID22 1
|
|
UAR0_3.ID21 0
|
|
UAR1_3 0xF733 Upper Arbitration Register High
|
|
UAR1_3.ID20 7
|
|
UAR1_3.ID19 6
|
|
UAR1_3.ID18 5
|
|
UAR1_3.ID17 4
|
|
UAR1_3.ID16 3
|
|
UAR1_3.ID15 2
|
|
UAR1_3.ID14 1
|
|
UAR1_3.ID13 0
|
|
LAR0_3 0xF734 Lower Arbitration Register Low
|
|
LAR0_3.ID12 7
|
|
LAR0_3.ID11 6
|
|
LAR0_3.ID10 5
|
|
LAR0_3.ID9 4
|
|
LAR0_3.ID8 3
|
|
LAR0_3.ID7 2
|
|
LAR0_3.ID6 1
|
|
LAR0_3.ID5 0
|
|
LAR1_3 0xF735 Lower Arbitration Register High
|
|
LAR1_3.ID4 7
|
|
LAR1_3.ID3 6
|
|
LAR1_3.ID2 5
|
|
LAR1_3.ID1 4
|
|
LAR1_3.ID0 3
|
|
MCFG_3 0xF736 Message Configuration Register
|
|
MCFG_3.DLC7 7
|
|
MCFG_3.DLC6 6
|
|
MCFG_3.DLC5 5
|
|
MCFG_3.DLC4 4
|
|
MCFG_3.DIR 3
|
|
MCFG_3.XTD 2
|
|
DB0_3 0xF737 Message Data Byte 0
|
|
DB0_3.DB07 7
|
|
DB0_3.DB06 6
|
|
DB0_3.DB05 5
|
|
DB0_3.DB04 4
|
|
DB0_3.DB03 3
|
|
DB0_3.DB02 2
|
|
DB0_3.DB01 1
|
|
DB0_3.DB00 0
|
|
DB1_3 0xF738 Message Data Byte 1
|
|
DB1_3.DB17 7
|
|
DB1_3.DB16 6
|
|
DB1_3.DB15 5
|
|
DB1_3.DB14 4
|
|
DB1_3.DB13 3
|
|
DB1_3.DB12 2
|
|
DB1_3.DB11 1
|
|
DB1_3.DB10 0
|
|
DB2_3 0xF739 Message Data Byte 2
|
|
DB2_3.DB27 7
|
|
DB2_3.DB26 6
|
|
DB2_3.DB25 5
|
|
DB2_3.DB24 4
|
|
DB2_3.DB23 3
|
|
DB2_3.DB22 2
|
|
DB2_3.DB21 1
|
|
DB2_3.DB20 0
|
|
DB3_3 0xF73A Message Data Byte 3
|
|
DB3_3.DB37 7
|
|
DB3_3.DB36 6
|
|
DB3_3.DB35 5
|
|
DB3_3.DB34 4
|
|
DB3_3.DB33 3
|
|
DB3_3.DB32 2
|
|
DB3_3.DB31 1
|
|
DB3_3.DB30 0
|
|
DB4_3 0xF73B Message Data Byte 4
|
|
DB4_3.DB47 7
|
|
DB4_3.DB46 6
|
|
DB4_3.DB45 5
|
|
DB4_3.DB44 4
|
|
DB4_3.DB43 3
|
|
DB4_3.DB42 2
|
|
DB4_3.DB41 1
|
|
DB4_3.DB40 0
|
|
DB5_3 0xF73C Message Data Byte 5
|
|
DB5_3.DB57 7
|
|
DB5_3.DB56 6
|
|
DB5_3.DB55 5
|
|
DB5_3.DB54 4
|
|
DB5_3.DB53 3
|
|
DB5_3.DB52 2
|
|
DB5_3.DB51 1
|
|
DB5_3.DB50 0
|
|
DB6_3 0xF73D Message Data Byte 6
|
|
DB6_3.DB67 7
|
|
DB6_3.DB66 6
|
|
DB6_3.DB65 5
|
|
DB6_3.DB64 4
|
|
DB6_3.DB63 3
|
|
DB6_3.DB62 2
|
|
DB6_3.DB61 1
|
|
DB6_3.DB60 0
|
|
DB7_3 0xF73E Message Data Byte 7
|
|
DB7_3.DB77 7
|
|
DB7_3.DB76 6
|
|
DB7_3.DB75 5
|
|
DB7_3.DB74 4
|
|
DB7_3.DB73 3
|
|
DB7_3.DB72 2
|
|
DB7_3.DB71 1
|
|
DB7_3.DB70 0
|
|
RESERVEDF73F 0xF73F RESERVED
|
|
; -------------------------------------- CAN_4 --------------------------------
|
|
MCR0_4 0xF740 Message Control Register Low
|
|
MCR0_4.MSGVAL1 7
|
|
MCR0_4.MSGVAL0 6
|
|
MCR0_4.TXIE1 5
|
|
MCR0_4.TXIE0 4
|
|
MCR0_4.RXIE1 3
|
|
MCR0_4.RXIE0 2
|
|
MCR0_4.INTPND1 1
|
|
MCR0_4.INTPND0 0
|
|
MCR1_4 0xF741 Message Control Register High
|
|
MCR1_4.RMTPND1 7
|
|
MCR1_4.RMTPND0 6
|
|
MCR1_4.TXRQ1 5
|
|
MCR1_4.TXRQ0 4
|
|
MCR1_4.MSGLSTCPUUPD1 3
|
|
MCR1_4.MSGLSTCPUUPD0 2
|
|
MCR1_4.NEWDAT1 1
|
|
MCR1_4.NEWDAT0 0
|
|
UAR0_4 0xF742 Upper Arbitration Register Low
|
|
UAR0_4.ID28 7
|
|
UAR0_4.ID27 6
|
|
UAR0_4.ID26 5
|
|
UAR0_4.ID25 4
|
|
UAR0_4.ID24 3
|
|
UAR0_4.ID23 2
|
|
UAR0_4.ID22 1
|
|
UAR0_4.ID21 0
|
|
UAR1_4 0xF743 Upper Arbitration Register High
|
|
UAR1_4.ID20 7
|
|
UAR1_4.ID19 6
|
|
UAR1_4.ID18 5
|
|
UAR1_4.ID17 4
|
|
UAR1_4.ID16 3
|
|
UAR1_4.ID15 2
|
|
UAR1_4.ID14 1
|
|
UAR1_4.ID13 0
|
|
LAR0_4 0xF744 Lower Arbitration Register Low
|
|
LAR0_4.ID12 7
|
|
LAR0_4.ID11 6
|
|
LAR0_4.ID10 5
|
|
LAR0_4.ID9 4
|
|
LAR0_4.ID8 3
|
|
LAR0_4.ID7 2
|
|
LAR0_4.ID6 1
|
|
LAR0_4.ID5 0
|
|
LAR1_4 0xF745 Lower Arbitration Register High
|
|
LAR1_4.ID4 7
|
|
LAR1_4.ID3 6
|
|
LAR1_4.ID2 5
|
|
LAR1_4.ID1 4
|
|
LAR1_4.ID0 3
|
|
MCFG_4 0xF746 Message Configuration Register
|
|
MCFG_4.DLC7 7
|
|
MCFG_4.DLC6 6
|
|
MCFG_4.DLC5 5
|
|
MCFG_4.DLC4 4
|
|
MCFG_4.DIR 3
|
|
MCFG_4.XTD 2
|
|
DB0_4 0xF747 Message Data Byte 0
|
|
DB0_4.DB07 7
|
|
DB0_4.DB06 6
|
|
DB0_4.DB05 5
|
|
DB0_4.DB04 4
|
|
DB0_4.DB03 3
|
|
DB0_4.DB02 2
|
|
DB0_4.DB01 1
|
|
DB0_4.DB00 0
|
|
DB1_4 0xF748 Message Data Byte 1
|
|
DB1_4.DB17 7
|
|
DB1_4.DB16 6
|
|
DB1_4.DB15 5
|
|
DB1_4.DB14 4
|
|
DB1_4.DB13 3
|
|
DB1_4.DB12 2
|
|
DB1_4.DB11 1
|
|
DB1_4.DB10 0
|
|
DB2_4 0xF749 Message Data Byte 2
|
|
DB2_4.DB27 7
|
|
DB2_4.DB26 6
|
|
DB2_4.DB25 5
|
|
DB2_4.DB24 4
|
|
DB2_4.DB23 3
|
|
DB2_4.DB22 2
|
|
DB2_4.DB21 1
|
|
DB2_4.DB20 0
|
|
DB3_4 0xF74A Message Data Byte 3
|
|
DB3_4.DB37 7
|
|
DB3_4.DB36 6
|
|
DB3_4.DB35 5
|
|
DB3_4.DB34 4
|
|
DB3_4.DB33 3
|
|
DB3_4.DB32 2
|
|
DB3_4.DB31 1
|
|
DB3_4.DB30 0
|
|
DB4_4 0xF74B Message Data Byte 4
|
|
DB4_4.DB47 7
|
|
DB4_4.DB46 6
|
|
DB4_4.DB45 5
|
|
DB4_4.DB44 4
|
|
DB4_4.DB43 3
|
|
DB4_4.DB42 2
|
|
DB4_4.DB41 1
|
|
DB4_4.DB40 0
|
|
DB5_4 0xF74C Message Data Byte 5
|
|
DB5_4.DB57 7
|
|
DB5_4.DB56 6
|
|
DB5_4.DB55 5
|
|
DB5_4.DB54 4
|
|
DB5_4.DB53 3
|
|
DB5_4.DB52 2
|
|
DB5_4.DB51 1
|
|
DB5_4.DB50 0
|
|
DB6_4 0xF74D Message Data Byte 6
|
|
DB6_4.DB67 7
|
|
DB6_4.DB66 6
|
|
DB6_4.DB65 5
|
|
DB6_4.DB64 4
|
|
DB6_4.DB63 3
|
|
DB6_4.DB62 2
|
|
DB6_4.DB61 1
|
|
DB6_4.DB60 0
|
|
DB7_4 0xF74E Message Data Byte 7
|
|
DB7_4.DB77 7
|
|
DB7_4.DB76 6
|
|
DB7_4.DB75 5
|
|
DB7_4.DB74 4
|
|
DB7_4.DB73 3
|
|
DB7_4.DB72 2
|
|
DB7_4.DB71 1
|
|
DB7_4.DB70 0
|
|
RESERVEDF74F 0xF74F RESERVED
|
|
; -------------------------------------- CAN_5 --------------------------------
|
|
MCR0_5 0xF750 Message Control Register Low
|
|
MCR0_5.MSGVAL1 7
|
|
MCR0_5.MSGVAL0 6
|
|
MCR0_5.TXIE1 5
|
|
MCR0_5.TXIE0 4
|
|
MCR0_5.RXIE1 3
|
|
MCR0_5.RXIE0 2
|
|
MCR0_5.INTPND1 1
|
|
MCR0_5.INTPND0 0
|
|
MCR1_5 0xF751 Message Control Register High
|
|
MCR1_5.RMTPND1 7
|
|
MCR1_5.RMTPND0 6
|
|
MCR1_5.TXRQ1 5
|
|
MCR1_5.TXRQ0 4
|
|
MCR1_5.MSGLSTCPUUPD1 3
|
|
MCR1_5.MSGLSTCPUUPD0 2
|
|
MCR1_5.NEWDAT1 1
|
|
MCR1_5.NEWDAT0 0
|
|
UAR0_5 0xF752 Upper Arbitration Register Low
|
|
UAR0_5.ID28 7
|
|
UAR0_5.ID27 6
|
|
UAR0_5.ID26 5
|
|
UAR0_5.ID25 4
|
|
UAR0_5.ID24 3
|
|
UAR0_5.ID23 2
|
|
UAR0_5.ID22 1
|
|
UAR0_5.ID21 0
|
|
UAR1_5 0xF753 Upper Arbitration Register High
|
|
UAR1_5.ID20 7
|
|
UAR1_5.ID19 6
|
|
UAR1_5.ID18 5
|
|
UAR1_5.ID17 4
|
|
UAR1_5.ID16 3
|
|
UAR1_5.ID15 2
|
|
UAR1_5.ID14 1
|
|
UAR1_5.ID13 0
|
|
LAR0_5 0xF754 Lower Arbitration Register Low
|
|
LAR0_5.ID12 7
|
|
LAR0_5.ID11 6
|
|
LAR0_5.ID10 5
|
|
LAR0_5.ID9 4
|
|
LAR0_5.ID8 3
|
|
LAR0_5.ID7 2
|
|
LAR0_5.ID6 1
|
|
LAR0_5.ID5 0
|
|
LAR1_5 0xF755 Lower Arbitration Register High
|
|
LAR1_5.ID4 7
|
|
LAR1_5.ID3 6
|
|
LAR1_5.ID2 5
|
|
LAR1_5.ID1 4
|
|
LAR1_5.ID0 3
|
|
MCFG_5 0xF756 Message Configuration Register
|
|
MCFG_5.DLC7 7
|
|
MCFG_5.DLC6 6
|
|
MCFG_5.DLC5 5
|
|
MCFG_5.DLC4 4
|
|
MCFG_5.DIR 3
|
|
MCFG_5.XTD 2
|
|
DB0_5 0xF757 Message Data Byte 0
|
|
DB0_5.DB07 7
|
|
DB0_5.DB06 6
|
|
DB0_5.DB05 5
|
|
DB0_5.DB04 4
|
|
DB0_5.DB03 3
|
|
DB0_5.DB02 2
|
|
DB0_5.DB01 1
|
|
DB0_5.DB00 0
|
|
DB1_5 0xF758 Message Data Byte 1
|
|
DB1_5.DB17 7
|
|
DB1_5.DB16 6
|
|
DB1_5.DB15 5
|
|
DB1_5.DB14 4
|
|
DB1_5.DB13 3
|
|
DB1_5.DB12 2
|
|
DB1_5.DB11 1
|
|
DB1_5.DB10 0
|
|
DB2_5 0xF759 Message Data Byte 2
|
|
DB2_5.DB27 7
|
|
DB2_5.DB26 6
|
|
DB2_5.DB25 5
|
|
DB2_5.DB24 4
|
|
DB2_5.DB23 3
|
|
DB2_5.DB22 2
|
|
DB2_5.DB21 1
|
|
DB2_5.DB20 0
|
|
DB3_5 0xF75A Message Data Byte 3
|
|
DB3_5.DB37 7
|
|
DB3_5.DB36 6
|
|
DB3_5.DB35 5
|
|
DB3_5.DB34 4
|
|
DB3_5.DB33 3
|
|
DB3_5.DB32 2
|
|
DB3_5.DB31 1
|
|
DB3_5.DB30 0
|
|
DB4_5 0xF75B Message Data Byte 4
|
|
DB4_5.DB47 7
|
|
DB4_5.DB46 6
|
|
DB4_5.DB45 5
|
|
DB4_5.DB44 4
|
|
DB4_5.DB43 3
|
|
DB4_5.DB42 2
|
|
DB4_5.DB41 1
|
|
DB4_5.DB40 0
|
|
DB5_5 0xF75C Message Data Byte 5
|
|
DB5_5.DB57 7
|
|
DB5_5.DB56 6
|
|
DB5_5.DB55 5
|
|
DB5_5.DB54 4
|
|
DB5_5.DB53 3
|
|
DB5_5.DB52 2
|
|
DB5_5.DB51 1
|
|
DB5_5.DB50 0
|
|
DB6_5 0xF75D Message Data Byte 6
|
|
DB6_5.DB67 7
|
|
DB6_5.DB66 6
|
|
DB6_5.DB65 5
|
|
DB6_5.DB64 4
|
|
DB6_5.DB63 3
|
|
DB6_5.DB62 2
|
|
DB6_5.DB61 1
|
|
DB6_5.DB60 0
|
|
DB7_5 0xF75E Message Data Byte 7
|
|
DB7_5.DB77 7
|
|
DB7_5.DB76 6
|
|
DB7_5.DB75 5
|
|
DB7_5.DB74 4
|
|
DB7_5.DB73 3
|
|
DB7_5.DB72 2
|
|
DB7_5.DB71 1
|
|
DB7_5.DB70 0
|
|
RESERVEDF75F 0xF75F RESERVED
|
|
; -------------------------------------- CAN_6 --------------------------------
|
|
MCR0_6 0xF760 Message Control Register Low
|
|
MCR0_6.MSGVAL1 7
|
|
MCR0_6.MSGVAL0 6
|
|
MCR0_6.TXIE1 5
|
|
MCR0_6.TXIE0 4
|
|
MCR0_6.RXIE1 3
|
|
MCR0_6.RXIE0 2
|
|
MCR0_6.INTPND1 1
|
|
MCR0_6.INTPND0 0
|
|
MCR1_6 0xF761 Message Control Register High
|
|
MCR1_6.RMTPND1 7
|
|
MCR1_6.RMTPND0 6
|
|
MCR1_6.TXRQ1 5
|
|
MCR1_6.TXRQ0 4
|
|
MCR1_6.MSGLSTCPUUPD1 3
|
|
MCR1_6.MSGLSTCPUUPD0 2
|
|
MCR1_6.NEWDAT1 1
|
|
MCR1_6.NEWDAT0 0
|
|
UAR0_6 0xF762 Upper Arbitration Register Low
|
|
UAR0_6.ID28 7
|
|
UAR0_6.ID27 6
|
|
UAR0_6.ID26 5
|
|
UAR0_6.ID25 4
|
|
UAR0_6.ID24 3
|
|
UAR0_6.ID23 2
|
|
UAR0_6.ID22 1
|
|
UAR0_6.ID21 0
|
|
UAR1_6 0xF763 Upper Arbitration Register High
|
|
UAR1_6.ID20 7
|
|
UAR1_6.ID19 6
|
|
UAR1_6.ID18 5
|
|
UAR1_6.ID17 4
|
|
UAR1_6.ID16 3
|
|
UAR1_6.ID15 2
|
|
UAR1_6.ID14 1
|
|
UAR1_6.ID13 0
|
|
LAR0_6 0xF764 Lower Arbitration Register Low
|
|
LAR0_6.ID12 7
|
|
LAR0_6.ID11 6
|
|
LAR0_6.ID10 5
|
|
LAR0_6.ID9 4
|
|
LAR0_6.ID8 3
|
|
LAR0_6.ID7 2
|
|
LAR0_6.ID6 1
|
|
LAR0_6.ID5 0
|
|
LAR1_6 0xF765 Lower Arbitration Register High
|
|
LAR1_6.ID4 7
|
|
LAR1_6.ID3 6
|
|
LAR1_6.ID2 5
|
|
LAR1_6.ID1 4
|
|
LAR1_6.ID0 3
|
|
MCFG_6 0xF766 Message Configuration Register
|
|
MCFG_6.DLC7 7
|
|
MCFG_6.DLC6 6
|
|
MCFG_6.DLC5 5
|
|
MCFG_6.DLC4 4
|
|
MCFG_6.DIR 3
|
|
MCFG_6.XTD 2
|
|
DB0_6 0xF767 Message Data Byte 0
|
|
DB0_6.DB07 7
|
|
DB0_6.DB06 6
|
|
DB0_6.DB05 5
|
|
DB0_6.DB04 4
|
|
DB0_6.DB03 3
|
|
DB0_6.DB02 2
|
|
DB0_6.DB01 1
|
|
DB0_6.DB00 0
|
|
DB1_6 0xF768 Message Data Byte 1
|
|
DB1_6.DB17 7
|
|
DB1_6.DB16 6
|
|
DB1_6.DB15 5
|
|
DB1_6.DB14 4
|
|
DB1_6.DB13 3
|
|
DB1_6.DB12 2
|
|
DB1_6.DB11 1
|
|
DB1_6.DB10 0
|
|
DB2_6 0xF769 Message Data Byte 2
|
|
DB2_6.DB27 7
|
|
DB2_6.DB26 6
|
|
DB2_6.DB25 5
|
|
DB2_6.DB24 4
|
|
DB2_6.DB23 3
|
|
DB2_6.DB22 2
|
|
DB2_6.DB21 1
|
|
DB2_6.DB20 0
|
|
DB3_6 0xF76A Message Data Byte 3
|
|
DB3_6.DB37 7
|
|
DB3_6.DB36 6
|
|
DB3_6.DB35 5
|
|
DB3_6.DB34 4
|
|
DB3_6.DB33 3
|
|
DB3_6.DB32 2
|
|
DB3_6.DB31 1
|
|
DB3_6.DB30 0
|
|
DB4_6 0xF76B Message Data Byte 4
|
|
DB4_6.DB47 7
|
|
DB4_6.DB46 6
|
|
DB4_6.DB45 5
|
|
DB4_6.DB44 4
|
|
DB4_6.DB43 3
|
|
DB4_6.DB42 2
|
|
DB4_6.DB41 1
|
|
DB4_6.DB40 0
|
|
DB5_6 0xF76C Message Data Byte 5
|
|
DB5_6.DB57 7
|
|
DB5_6.DB56 6
|
|
DB5_6.DB55 5
|
|
DB5_6.DB54 4
|
|
DB5_6.DB53 3
|
|
DB5_6.DB52 2
|
|
DB5_6.DB51 1
|
|
DB5_6.DB50 0
|
|
DB6_6 0xF76D Message Data Byte 6
|
|
DB6_6.DB67 7
|
|
DB6_6.DB66 6
|
|
DB6_6.DB65 5
|
|
DB6_6.DB64 4
|
|
DB6_6.DB63 3
|
|
DB6_6.DB62 2
|
|
DB6_6.DB61 1
|
|
DB6_6.DB60 0
|
|
DB7_6 0xF76E Message Data Byte 7
|
|
DB7_6.DB77 7
|
|
DB7_6.DB76 6
|
|
DB7_6.DB75 5
|
|
DB7_6.DB74 4
|
|
DB7_6.DB73 3
|
|
DB7_6.DB72 2
|
|
DB7_6.DB71 1
|
|
DB7_6.DB70 0
|
|
RESERVEDF76F 0xF76F RESERVED
|
|
; -------------------------------------- CAN_7 --------------------------------
|
|
MCR0_7 0xF770 Message Control Register Low
|
|
MCR0_7.MSGVAL1 7
|
|
MCR0_7.MSGVAL0 6
|
|
MCR0_7.TXIE1 5
|
|
MCR0_7.TXIE0 4
|
|
MCR0_7.RXIE1 3
|
|
MCR0_7.RXIE0 2
|
|
MCR0_7.INTPND1 1
|
|
MCR0_7.INTPND0 0
|
|
MCR1_7 0xF771 Message Control Register High
|
|
MCR1_7.RMTPND1 7
|
|
MCR1_7.RMTPND0 6
|
|
MCR1_7.TXRQ1 5
|
|
MCR1_7.TXRQ0 4
|
|
MCR1_7.MSGLSTCPUUPD1 3
|
|
MCR1_7.MSGLSTCPUUPD0 2
|
|
MCR1_7.NEWDAT1 1
|
|
MCR1_7.NEWDAT0 0
|
|
UAR0_7 0xF772 Upper Arbitration Register Low
|
|
UAR0_7.ID28 7
|
|
UAR0_7.ID27 6
|
|
UAR0_7.ID26 5
|
|
UAR0_7.ID25 4
|
|
UAR0_7.ID24 3
|
|
UAR0_7.ID23 2
|
|
UAR0_7.ID22 1
|
|
UAR0_7.ID21 0
|
|
UAR1_7 0xF773 Upper Arbitration Register High
|
|
UAR1_7.ID20 7
|
|
UAR1_7.ID19 6
|
|
UAR1_7.ID18 5
|
|
UAR1_7.ID17 4
|
|
UAR1_7.ID16 3
|
|
UAR1_7.ID15 2
|
|
UAR1_7.ID14 1
|
|
UAR1_7.ID13 0
|
|
LAR0_7 0xF774 Lower Arbitration Register Low
|
|
LAR0_7.ID12 7
|
|
LAR0_7.ID11 6
|
|
LAR0_7.ID10 5
|
|
LAR0_7.ID9 4
|
|
LAR0_7.ID8 3
|
|
LAR0_7.ID7 2
|
|
LAR0_7.ID6 1
|
|
LAR0_7.ID5 0
|
|
LAR1_7 0xF775 Lower Arbitration Register High
|
|
LAR1_7.ID4 7
|
|
LAR1_7.ID3 6
|
|
LAR1_7.ID2 5
|
|
LAR1_7.ID1 4
|
|
LAR1_7.ID0 3
|
|
MCFG_7 0xF776 Message Configuration Register
|
|
MCFG_7.DLC7 7
|
|
MCFG_7.DLC6 6
|
|
MCFG_7.DLC5 5
|
|
MCFG_7.DLC4 4
|
|
MCFG_7.DIR 3
|
|
MCFG_7.XTD 2
|
|
DB0_7 0xF777 Message Data Byte 0
|
|
DB0_7.DB07 7
|
|
DB0_7.DB06 6
|
|
DB0_7.DB05 5
|
|
DB0_7.DB04 4
|
|
DB0_7.DB03 3
|
|
DB0_7.DB02 2
|
|
DB0_7.DB01 1
|
|
DB0_7.DB00 0
|
|
DB1_7 0xF778 Message Data Byte 1
|
|
DB1_7.DB17 7
|
|
DB1_7.DB16 6
|
|
DB1_7.DB15 5
|
|
DB1_7.DB14 4
|
|
DB1_7.DB13 3
|
|
DB1_7.DB12 2
|
|
DB1_7.DB11 1
|
|
DB1_7.DB10 0
|
|
DB2_7 0xF779 Message Data Byte 2
|
|
DB2_7.DB27 7
|
|
DB2_7.DB26 6
|
|
DB2_7.DB25 5
|
|
DB2_7.DB24 4
|
|
DB2_7.DB23 3
|
|
DB2_7.DB22 2
|
|
DB2_7.DB21 1
|
|
DB2_7.DB20 0
|
|
DB3_7 0xF77A Message Data Byte 3
|
|
DB3_7.DB37 7
|
|
DB3_7.DB36 6
|
|
DB3_7.DB35 5
|
|
DB3_7.DB34 4
|
|
DB3_7.DB33 3
|
|
DB3_7.DB32 2
|
|
DB3_7.DB31 1
|
|
DB3_7.DB30 0
|
|
DB4_7 0xF77B Message Data Byte 4
|
|
DB4_7.DB47 7
|
|
DB4_7.DB46 6
|
|
DB4_7.DB45 5
|
|
DB4_7.DB44 4
|
|
DB4_7.DB43 3
|
|
DB4_7.DB42 2
|
|
DB4_7.DB41 1
|
|
DB4_7.DB40 0
|
|
DB5_7 0xF77C Message Data Byte 5
|
|
DB5_7.DB57 7
|
|
DB5_7.DB56 6
|
|
DB5_7.DB55 5
|
|
DB5_7.DB54 4
|
|
DB5_7.DB53 3
|
|
DB5_7.DB52 2
|
|
DB5_7.DB51 1
|
|
DB5_7.DB50 0
|
|
DB6_7 0xF77D Message Data Byte 6
|
|
DB6_7.DB67 7
|
|
DB6_7.DB66 6
|
|
DB6_7.DB65 5
|
|
DB6_7.DB64 4
|
|
DB6_7.DB63 3
|
|
DB6_7.DB62 2
|
|
DB6_7.DB61 1
|
|
DB6_7.DB60 0
|
|
DB7_7 0xF77E Message Data Byte 7
|
|
DB7_7.DB77 7
|
|
DB7_7.DB76 6
|
|
DB7_7.DB75 5
|
|
DB7_7.DB74 4
|
|
DB7_7.DB73 3
|
|
DB7_7.DB72 2
|
|
DB7_7.DB71 1
|
|
DB7_7.DB70 0
|
|
RESERVEDF77F 0xF77F RESERVED
|
|
; -------------------------------------- CAN_8 --------------------------------
|
|
MCR0_8 0xF780 Message Control Register Low
|
|
MCR0_8.MSGVAL1 7
|
|
MCR0_8.MSGVAL0 6
|
|
MCR0_8.TXIE1 5
|
|
MCR0_8.TXIE0 4
|
|
MCR0_8.RXIE1 3
|
|
MCR0_8.RXIE0 2
|
|
MCR0_8.INTPND1 1
|
|
MCR0_8.INTPND0 0
|
|
MCR1_8 0xF781 Message Control Register High
|
|
MCR1_8.RMTPND1 7
|
|
MCR1_8.RMTPND0 6
|
|
MCR1_8.TXRQ1 5
|
|
MCR1_8.TXRQ0 4
|
|
MCR1_8.MSGLSTCPUUPD1 3
|
|
MCR1_8.MSGLSTCPUUPD0 2
|
|
MCR1_8.NEWDAT1 1
|
|
MCR1_8.NEWDAT0 0
|
|
UAR0_8 0xF782 Upper Arbitration Register Low
|
|
UAR0_8.ID28 7
|
|
UAR0_8.ID27 6
|
|
UAR0_8.ID26 5
|
|
UAR0_8.ID25 4
|
|
UAR0_8.ID24 3
|
|
UAR0_8.ID23 2
|
|
UAR0_8.ID22 1
|
|
UAR0_8.ID21 0
|
|
UAR1_8 0xF783 Upper Arbitration Register High
|
|
UAR1_8.ID20 7
|
|
UAR1_8.ID19 6
|
|
UAR1_8.ID18 5
|
|
UAR1_8.ID17 4
|
|
UAR1_8.ID16 3
|
|
UAR1_8.ID15 2
|
|
UAR1_8.ID14 1
|
|
UAR1_8.ID13 0
|
|
LAR0_8 0xF784 Lower Arbitration Register Low
|
|
LAR0_8.ID12 7
|
|
LAR0_8.ID11 6
|
|
LAR0_8.ID10 5
|
|
LAR0_8.ID9 4
|
|
LAR0_8.ID8 3
|
|
LAR0_8.ID7 2
|
|
LAR0_8.ID6 1
|
|
LAR0_8.ID5 0
|
|
LAR1_8 0xF785 Lower Arbitration Register High
|
|
LAR1_8.ID4 7
|
|
LAR1_8.ID3 6
|
|
LAR1_8.ID2 5
|
|
LAR1_8.ID1 4
|
|
LAR1_8.ID0 3
|
|
MCFG_8 0xF786 Message Configuration Register
|
|
MCFG_8.DLC7 7
|
|
MCFG_8.DLC6 6
|
|
MCFG_8.DLC5 5
|
|
MCFG_8.DLC4 4
|
|
MCFG_8.DIR 3
|
|
MCFG_8.XTD 2
|
|
DB0_8 0xF787 Message Data Byte 0
|
|
DB0_8.DB07 7
|
|
DB0_8.DB06 6
|
|
DB0_8.DB05 5
|
|
DB0_8.DB04 4
|
|
DB0_8.DB03 3
|
|
DB0_8.DB02 2
|
|
DB0_8.DB01 1
|
|
DB0_8.DB00 0
|
|
DB1_8 0xF788 Message Data Byte 1
|
|
DB1_8.DB17 7
|
|
DB1_8.DB16 6
|
|
DB1_8.DB15 5
|
|
DB1_8.DB14 4
|
|
DB1_8.DB13 3
|
|
DB1_8.DB12 2
|
|
DB1_8.DB11 1
|
|
DB1_8.DB10 0
|
|
DB2_8 0xF789 Message Data Byte 2
|
|
DB2_8.DB27 7
|
|
DB2_8.DB26 6
|
|
DB2_8.DB25 5
|
|
DB2_8.DB24 4
|
|
DB2_8.DB23 3
|
|
DB2_8.DB22 2
|
|
DB2_8.DB21 1
|
|
DB2_8.DB20 0
|
|
DB3_8 0xF78A Message Data Byte 3
|
|
DB3_8.DB37 7
|
|
DB3_8.DB36 6
|
|
DB3_8.DB35 5
|
|
DB3_8.DB34 4
|
|
DB3_8.DB33 3
|
|
DB3_8.DB32 2
|
|
DB3_8.DB31 1
|
|
DB3_8.DB30 0
|
|
DB4_8 0xF78B Message Data Byte 4
|
|
DB4_8.DB47 7
|
|
DB4_8.DB46 6
|
|
DB4_8.DB45 5
|
|
DB4_8.DB44 4
|
|
DB4_8.DB43 3
|
|
DB4_8.DB42 2
|
|
DB4_8.DB41 1
|
|
DB4_8.DB40 0
|
|
DB5_8 0xF78C Message Data Byte 5
|
|
DB5_8.DB57 7
|
|
DB5_8.DB56 6
|
|
DB5_8.DB55 5
|
|
DB5_8.DB54 4
|
|
DB5_8.DB53 3
|
|
DB5_8.DB52 2
|
|
DB5_8.DB51 1
|
|
DB5_8.DB50 0
|
|
DB6_8 0xF78D Message Data Byte 6
|
|
DB6_8.DB67 7
|
|
DB6_8.DB66 6
|
|
DB6_8.DB65 5
|
|
DB6_8.DB64 4
|
|
DB6_8.DB63 3
|
|
DB6_8.DB62 2
|
|
DB6_8.DB61 1
|
|
DB6_8.DB60 0
|
|
DB7_8 0xF78E Message Data Byte 7
|
|
DB7_8.DB77 7
|
|
DB7_8.DB76 6
|
|
DB7_8.DB75 5
|
|
DB7_8.DB74 4
|
|
DB7_8.DB73 3
|
|
DB7_8.DB72 2
|
|
DB7_8.DB71 1
|
|
DB7_8.DB70 0
|
|
RESERVEDF78F 0xF78F RESERVED
|
|
; -------------------------------------- CAN_9 --------------------------------
|
|
MCR0_9 0xF790 Message Control Register Low
|
|
MCR0_9.MSGVAL1 7
|
|
MCR0_9.MSGVAL0 6
|
|
MCR0_9.TXIE1 5
|
|
MCR0_9.TXIE0 4
|
|
MCR0_9.RXIE1 3
|
|
MCR0_9.RXIE0 2
|
|
MCR0_9.INTPND1 1
|
|
MCR0_9.INTPND0 0
|
|
MCR1_9 0xF791 Message Control Register High
|
|
MCR1_9.RMTPND1 7
|
|
MCR1_9.RMTPND0 6
|
|
MCR1_9.TXRQ1 5
|
|
MCR1_9.TXRQ0 4
|
|
MCR1_9.MSGLSTCPUUPD1 3
|
|
MCR1_9.MSGLSTCPUUPD0 2
|
|
MCR1_9.NEWDAT1 1
|
|
MCR1_9.NEWDAT0 0
|
|
UAR0_9 0xF792 Upper Arbitration Register Low
|
|
UAR0_9.ID28 7
|
|
UAR0_9.ID27 6
|
|
UAR0_9.ID26 5
|
|
UAR0_9.ID25 4
|
|
UAR0_9.ID24 3
|
|
UAR0_9.ID23 2
|
|
UAR0_9.ID22 1
|
|
UAR0_9.ID21 0
|
|
UAR1_9 0xF793 Upper Arbitration Register High
|
|
UAR1_9.ID20 7
|
|
UAR1_9.ID19 6
|
|
UAR1_9.ID18 5
|
|
UAR1_9.ID17 4
|
|
UAR1_9.ID16 3
|
|
UAR1_9.ID15 2
|
|
UAR1_9.ID14 1
|
|
UAR1_9.ID13 0
|
|
LAR0_9 0xF794 Lower Arbitration Register Low
|
|
LAR0_9.ID12 7
|
|
LAR0_9.ID11 6
|
|
LAR0_9.ID10 5
|
|
LAR0_9.ID9 4
|
|
LAR0_9.ID8 3
|
|
LAR0_9.ID7 2
|
|
LAR0_9.ID6 1
|
|
LAR0_9.ID5 0
|
|
LAR1_9 0xF795 Lower Arbitration Register High
|
|
LAR1_9.ID4 7
|
|
LAR1_9.ID3 6
|
|
LAR1_9.ID2 5
|
|
LAR1_9.ID1 4
|
|
LAR1_9.ID0 3
|
|
MCFG_9 0xF796 Message Configuration Register
|
|
MCFG_9.DLC7 7
|
|
MCFG_9.DLC6 6
|
|
MCFG_9.DLC5 5
|
|
MCFG_9.DLC4 4
|
|
MCFG_9.DIR 3
|
|
MCFG_9.XTD 2
|
|
DB0_9 0xF797 Message Data Byte 0
|
|
DB0_9.DB07 7
|
|
DB0_9.DB06 6
|
|
DB0_9.DB05 5
|
|
DB0_9.DB04 4
|
|
DB0_9.DB03 3
|
|
DB0_9.DB02 2
|
|
DB0_9.DB01 1
|
|
DB0_9.DB00 0
|
|
DB1_9 0xF798 Message Data Byte 1
|
|
DB1_9.DB17 7
|
|
DB1_9.DB16 6
|
|
DB1_9.DB15 5
|
|
DB1_9.DB14 4
|
|
DB1_9.DB13 3
|
|
DB1_9.DB12 2
|
|
DB1_9.DB11 1
|
|
DB1_9.DB10 0
|
|
DB2_9 0xF799 Message Data Byte 2
|
|
DB2_9.DB27 7
|
|
DB2_9.DB26 6
|
|
DB2_9.DB25 5
|
|
DB2_9.DB24 4
|
|
DB2_9.DB23 3
|
|
DB2_9.DB22 2
|
|
DB2_9.DB21 1
|
|
DB2_9.DB20 0
|
|
DB3_9 0xF79A Message Data Byte 3
|
|
DB3_9.DB37 7
|
|
DB3_9.DB36 6
|
|
DB3_9.DB35 5
|
|
DB3_9.DB34 4
|
|
DB3_9.DB33 3
|
|
DB3_9.DB32 2
|
|
DB3_9.DB31 1
|
|
DB3_9.DB30 0
|
|
DB4_9 0xF79B Message Data Byte 4
|
|
DB4_9.DB47 7
|
|
DB4_9.DB46 6
|
|
DB4_9.DB45 5
|
|
DB4_9.DB44 4
|
|
DB4_9.DB43 3
|
|
DB4_9.DB42 2
|
|
DB4_9.DB41 1
|
|
DB4_9.DB40 0
|
|
DB5_9 0xF79C Message Data Byte 5
|
|
DB5_9.DB57 7
|
|
DB5_9.DB56 6
|
|
DB5_9.DB55 5
|
|
DB5_9.DB54 4
|
|
DB5_9.DB53 3
|
|
DB5_9.DB52 2
|
|
DB5_9.DB51 1
|
|
DB5_9.DB50 0
|
|
DB6_9 0xF79D Message Data Byte 6
|
|
DB6_9.DB67 7
|
|
DB6_9.DB66 6
|
|
DB6_9.DB65 5
|
|
DB6_9.DB64 4
|
|
DB6_9.DB63 3
|
|
DB6_9.DB62 2
|
|
DB6_9.DB61 1
|
|
DB6_9.DB60 0
|
|
DB7_9 0xF79E Message Data Byte 7
|
|
DB7_9.DB77 7
|
|
DB7_9.DB76 6
|
|
DB7_9.DB75 5
|
|
DB7_9.DB74 4
|
|
DB7_9.DB73 3
|
|
DB7_9.DB72 2
|
|
DB7_9.DB71 1
|
|
DB7_9.DB70 0
|
|
RESERVEDF79F 0xF79F RESERVED
|
|
; -------------------------------------- CAN_A --------------------------------
|
|
MCR0_A 0xF7A0 Message Control Register Low
|
|
MCR0_A.MSGVAL1 7
|
|
MCR0_A.MSGVAL0 6
|
|
MCR0_A.TXIE1 5
|
|
MCR0_A.TXIE0 4
|
|
MCR0_A.RXIE1 3
|
|
MCR0_A.RXIE0 2
|
|
MCR0_A.INTPND1 1
|
|
MCR0_A.INTPND0 0
|
|
MCR1_A 0xF7A1 Message Control Register High
|
|
MCR1_A.RMTPND1 7
|
|
MCR1_A.RMTPND0 6
|
|
MCR1_A.TXRQ1 5
|
|
MCR1_A.TXRQ0 4
|
|
MCR1_A.MSGLSTCPUUPD1 3
|
|
MCR1_A.MSGLSTCPUUPD0 2
|
|
MCR1_A.NEWDAT1 1
|
|
MCR1_A.NEWDAT0 0
|
|
UAR0_A 0xF7A2 Upper Arbitration Register Low
|
|
UAR0_A.ID28 7
|
|
UAR0_A.ID27 6
|
|
UAR0_A.ID26 5
|
|
UAR0_A.ID25 4
|
|
UAR0_A.ID24 3
|
|
UAR0_A.ID23 2
|
|
UAR0_A.ID22 1
|
|
UAR0_A.ID21 0
|
|
UAR1_A 0xF7A3 Upper Arbitration Register High
|
|
UAR1_A.ID20 7
|
|
UAR1_A.ID19 6
|
|
UAR1_A.ID18 5
|
|
UAR1_A.ID17 4
|
|
UAR1_A.ID16 3
|
|
UAR1_A.ID15 2
|
|
UAR1_A.ID14 1
|
|
UAR1_A.ID13 0
|
|
LAR0_A 0xF7A4 Lower Arbitration Register Low
|
|
LAR0_A.ID12 7
|
|
LAR0_A.ID11 6
|
|
LAR0_A.ID10 5
|
|
LAR0_A.ID9 4
|
|
LAR0_A.ID8 3
|
|
LAR0_A.ID7 2
|
|
LAR0_A.ID6 1
|
|
LAR0_A.ID5 0
|
|
LAR1_A 0xF7A5 Lower Arbitration Register High
|
|
LAR1_A.ID4 7
|
|
LAR1_A.ID3 6
|
|
LAR1_A.ID2 5
|
|
LAR1_A.ID1 4
|
|
LAR1_A.ID0 3
|
|
MCFG_A 0xF7A6 Message Configuration Register
|
|
MCFG_A.DLC7 7
|
|
MCFG_A.DLC6 6
|
|
MCFG_A.DLC5 5
|
|
MCFG_A.DLC4 4
|
|
MCFG_A.DIR 3
|
|
MCFG_A.XTD 2
|
|
DB0_A 0xF7A7 Message Data Byte 0
|
|
DB0_A.DB07 7
|
|
DB0_A.DB06 6
|
|
DB0_A.DB05 5
|
|
DB0_A.DB04 4
|
|
DB0_A.DB03 3
|
|
DB0_A.DB02 2
|
|
DB0_A.DB01 1
|
|
DB0_A.DB00 0
|
|
DB1_A 0xF7A8 Message Data Byte 1
|
|
DB1_A.DB17 7
|
|
DB1_A.DB16 6
|
|
DB1_A.DB15 5
|
|
DB1_A.DB14 4
|
|
DB1_A.DB13 3
|
|
DB1_A.DB12 2
|
|
DB1_A.DB11 1
|
|
DB1_A.DB10 0
|
|
DB2_A 0xF7A9 Message Data Byte 2
|
|
DB2_A.DB27 7
|
|
DB2_A.DB26 6
|
|
DB2_A.DB25 5
|
|
DB2_A.DB24 4
|
|
DB2_A.DB23 3
|
|
DB2_A.DB22 2
|
|
DB2_A.DB21 1
|
|
DB2_A.DB20 0
|
|
DB3_A 0xF7AA Message Data Byte 3
|
|
DB3_A.DB37 7
|
|
DB3_A.DB36 6
|
|
DB3_A.DB35 5
|
|
DB3_A.DB34 4
|
|
DB3_A.DB33 3
|
|
DB3_A.DB32 2
|
|
DB3_A.DB31 1
|
|
DB3_A.DB30 0
|
|
DB4_A 0xF7AB Message Data Byte 4
|
|
DB4_A.DB47 7
|
|
DB4_A.DB46 6
|
|
DB4_A.DB45 5
|
|
DB4_A.DB44 4
|
|
DB4_A.DB43 3
|
|
DB4_A.DB42 2
|
|
DB4_A.DB41 1
|
|
DB4_A.DB40 0
|
|
DB5_A 0xF7AC Message Data Byte 5
|
|
DB5_A.DB57 7
|
|
DB5_A.DB56 6
|
|
DB5_A.DB55 5
|
|
DB5_A.DB54 4
|
|
DB5_A.DB53 3
|
|
DB5_A.DB52 2
|
|
DB5_A.DB51 1
|
|
DB5_A.DB50 0
|
|
DB6_A 0xF7AD Message Data Byte 6
|
|
DB6_A.DB67 7
|
|
DB6_A.DB66 6
|
|
DB6_A.DB65 5
|
|
DB6_A.DB64 4
|
|
DB6_A.DB63 3
|
|
DB6_A.DB62 2
|
|
DB6_A.DB61 1
|
|
DB6_A.DB60 0
|
|
DB7_A 0xF7AE Message Data Byte 7
|
|
DB7_A.DB77 7
|
|
DB7_A.DB76 6
|
|
DB7_A.DB75 5
|
|
DB7_A.DB74 4
|
|
DB7_A.DB73 3
|
|
DB7_A.DB72 2
|
|
DB7_A.DB71 1
|
|
DB7_A.DB70 0
|
|
RESERVEDF7AF 0xF7AF RESERVED
|
|
; -------------------------------------- CAN_B --------------------------------
|
|
MCR0_B 0xF7B0 Message Control Register Low
|
|
MCR0_B.MSGVAL1 7
|
|
MCR0_B.MSGVAL0 6
|
|
MCR0_B.TXIE1 5
|
|
MCR0_B.TXIE0 4
|
|
MCR0_B.RXIE1 3
|
|
MCR0_B.RXIE0 2
|
|
MCR0_B.INTPND1 1
|
|
MCR0_B.INTPND0 0
|
|
MCR1_B 0xF7B1 Message Control Register High
|
|
MCR1_B.RMTPND1 7
|
|
MCR1_B.RMTPND0 6
|
|
MCR1_B.TXRQ1 5
|
|
MCR1_B.TXRQ0 4
|
|
MCR1_B.MSGLSTCPUUPD1 3
|
|
MCR1_B.MSGLSTCPUUPD0 2
|
|
MCR1_B.NEWDAT1 1
|
|
MCR1_B.NEWDAT0 0
|
|
UAR0_B 0xF7B2 Upper Arbitration Register Low
|
|
UAR0_B.ID28 7
|
|
UAR0_B.ID27 6
|
|
UAR0_B.ID26 5
|
|
UAR0_B.ID25 4
|
|
UAR0_B.ID24 3
|
|
UAR0_B.ID23 2
|
|
UAR0_B.ID22 1
|
|
UAR0_B.ID21 0
|
|
UAR1_B 0xF7B3 Upper Arbitration Register High
|
|
UAR1_B.ID20 7
|
|
UAR1_B.ID19 6
|
|
UAR1_B.ID18 5
|
|
UAR1_B.ID17 4
|
|
UAR1_B.ID16 3
|
|
UAR1_B.ID15 2
|
|
UAR1_B.ID14 1
|
|
UAR1_B.ID13 0
|
|
LAR0_B 0xF7B4 Lower Arbitration Register Low
|
|
LAR0_B.ID12 7
|
|
LAR0_B.ID11 6
|
|
LAR0_B.ID10 5
|
|
LAR0_B.ID9 4
|
|
LAR0_B.ID8 3
|
|
LAR0_B.ID7 2
|
|
LAR0_B.ID6 1
|
|
LAR0_B.ID5 0
|
|
LAR1_B 0xF7B5 Lower Arbitration Register High
|
|
LAR1_B.ID4 7
|
|
LAR1_B.ID3 6
|
|
LAR1_B.ID2 5
|
|
LAR1_B.ID1 4
|
|
LAR1_B.ID0 3
|
|
MCFG_B 0xF7B6 Message Configuration Register
|
|
MCFG_B.DLC7 7
|
|
MCFG_B.DLC6 6
|
|
MCFG_B.DLC5 5
|
|
MCFG_B.DLC4 4
|
|
MCFG_B.DIR 3
|
|
MCFG_B.XTD 2
|
|
DB0_B 0xF7B7 Message Data Byte 0
|
|
DB0_B.DB07 7
|
|
DB0_B.DB06 6
|
|
DB0_B.DB05 5
|
|
DB0_B.DB04 4
|
|
DB0_B.DB03 3
|
|
DB0_B.DB02 2
|
|
DB0_B.DB01 1
|
|
DB0_B.DB00 0
|
|
DB1_B 0xF7B8 Message Data Byte 1
|
|
DB1_B.DB17 7
|
|
DB1_B.DB16 6
|
|
DB1_B.DB15 5
|
|
DB1_B.DB14 4
|
|
DB1_B.DB13 3
|
|
DB1_B.DB12 2
|
|
DB1_B.DB11 1
|
|
DB1_B.DB10 0
|
|
DB2_B 0xF7B9 Message Data Byte 2
|
|
DB2_B.DB27 7
|
|
DB2_B.DB26 6
|
|
DB2_B.DB25 5
|
|
DB2_B.DB24 4
|
|
DB2_B.DB23 3
|
|
DB2_B.DB22 2
|
|
DB2_B.DB21 1
|
|
DB2_B.DB20 0
|
|
DB3_B 0xF7BA Message Data Byte 3
|
|
DB3_B.DB37 7
|
|
DB3_B.DB36 6
|
|
DB3_B.DB35 5
|
|
DB3_B.DB34 4
|
|
DB3_B.DB33 3
|
|
DB3_B.DB32 2
|
|
DB3_B.DB31 1
|
|
DB3_B.DB30 0
|
|
DB4_B 0xF7BB Message Data Byte 4
|
|
DB4_B.DB47 7
|
|
DB4_B.DB46 6
|
|
DB4_B.DB45 5
|
|
DB4_B.DB44 4
|
|
DB4_B.DB43 3
|
|
DB4_B.DB42 2
|
|
DB4_B.DB41 1
|
|
DB4_B.DB40 0
|
|
DB5_B 0xF7BC Message Data Byte 5
|
|
DB5_B.DB57 7
|
|
DB5_B.DB56 6
|
|
DB5_B.DB55 5
|
|
DB5_B.DB54 4
|
|
DB5_B.DB53 3
|
|
DB5_B.DB52 2
|
|
DB5_B.DB51 1
|
|
DB5_B.DB50 0
|
|
DB6_B 0xF7BD Message Data Byte 6
|
|
DB6_B.DB67 7
|
|
DB6_B.DB66 6
|
|
DB6_B.DB65 5
|
|
DB6_B.DB64 4
|
|
DB6_B.DB63 3
|
|
DB6_B.DB62 2
|
|
DB6_B.DB61 1
|
|
DB6_B.DB60 0
|
|
DB7_B 0xF7BE Message Data Byte 7
|
|
DB7_B.DB77 7
|
|
DB7_B.DB76 6
|
|
DB7_B.DB75 5
|
|
DB7_B.DB74 4
|
|
DB7_B.DB73 3
|
|
DB7_B.DB72 2
|
|
DB7_B.DB71 1
|
|
DB7_B.DB70 0
|
|
RESERVEDF7BF 0xF7BF RESERVED
|
|
; -------------------------------------- CAN_C --------------------------------
|
|
MCR0_C 0xF7C0 Message Control Register Low
|
|
MCR0_C.MSGVAL1 7
|
|
MCR0_C.MSGVAL0 6
|
|
MCR0_C.TXIE1 5
|
|
MCR0_C.TXIE0 4
|
|
MCR0_C.RXIE1 3
|
|
MCR0_C.RXIE0 2
|
|
MCR0_C.INTPND1 1
|
|
MCR0_C.INTPND0 0
|
|
MCR1_C 0xF7C1 Message Control Register High
|
|
MCR1_C.RMTPND1 7
|
|
MCR1_C.RMTPND0 6
|
|
MCR1_C.TXRQ1 5
|
|
MCR1_C.TXRQ0 4
|
|
MCR1_C.MSGLSTCPUUPD1 3
|
|
MCR1_C.MSGLSTCPUUPD0 2
|
|
MCR1_C.NEWDAT1 1
|
|
MCR1_C.NEWDAT0 0
|
|
UAR0_C 0xF7C2 Upper Arbitration Register Low
|
|
UAR0_C.ID28 7
|
|
UAR0_C.ID27 6
|
|
UAR0_C.ID26 5
|
|
UAR0_C.ID25 4
|
|
UAR0_C.ID24 3
|
|
UAR0_C.ID23 2
|
|
UAR0_C.ID22 1
|
|
UAR0_C.ID21 0
|
|
UAR1_C 0xF7C3 Upper Arbitration Register High
|
|
UAR1_C.ID20 7
|
|
UAR1_C.ID19 6
|
|
UAR1_C.ID18 5
|
|
UAR1_C.ID17 4
|
|
UAR1_C.ID16 3
|
|
UAR1_C.ID15 2
|
|
UAR1_C.ID14 1
|
|
UAR1_C.ID13 0
|
|
LAR0_C 0xF7C4 Lower Arbitration Register Low
|
|
LAR0_C.ID12 7
|
|
LAR0_C.ID11 6
|
|
LAR0_C.ID10 5
|
|
LAR0_C.ID9 4
|
|
LAR0_C.ID8 3
|
|
LAR0_C.ID7 2
|
|
LAR0_C.ID6 1
|
|
LAR0_C.ID5 0
|
|
LAR1_C 0xF7C5 Lower Arbitration Register High
|
|
LAR1_C.ID4 7
|
|
LAR1_C.ID3 6
|
|
LAR1_C.ID2 5
|
|
LAR1_C.ID1 4
|
|
LAR1_C.ID0 3
|
|
MCFG_C 0xF7C6 Message Configuration Register
|
|
MCFG_C.DLC7 7
|
|
MCFG_C.DLC6 6
|
|
MCFG_C.DLC5 5
|
|
MCFG_C.DLC4 4
|
|
MCFG_C.DIR 3
|
|
MCFG_C.XTD 2
|
|
DB0_C 0xF7C7 Message Data Byte 0
|
|
DB0_C.DB07 7
|
|
DB0_C.DB06 6
|
|
DB0_C.DB05 5
|
|
DB0_C.DB04 4
|
|
DB0_C.DB03 3
|
|
DB0_C.DB02 2
|
|
DB0_C.DB01 1
|
|
DB0_C.DB00 0
|
|
DB1_C 0xF7C8 Message Data Byte 1
|
|
DB1_C.DB17 7
|
|
DB1_C.DB16 6
|
|
DB1_C.DB15 5
|
|
DB1_C.DB14 4
|
|
DB1_C.DB13 3
|
|
DB1_C.DB12 2
|
|
DB1_C.DB11 1
|
|
DB1_C.DB10 0
|
|
DB2_C 0xF7C9 Message Data Byte 2
|
|
DB2_C.DB27 7
|
|
DB2_C.DB26 6
|
|
DB2_C.DB25 5
|
|
DB2_C.DB24 4
|
|
DB2_C.DB23 3
|
|
DB2_C.DB22 2
|
|
DB2_C.DB21 1
|
|
DB2_C.DB20 0
|
|
DB3_C 0xF7CA Message Data Byte 3
|
|
DB3_C.DB37 7
|
|
DB3_C.DB36 6
|
|
DB3_C.DB35 5
|
|
DB3_C.DB34 4
|
|
DB3_C.DB33 3
|
|
DB3_C.DB32 2
|
|
DB3_C.DB31 1
|
|
DB3_C.DB30 0
|
|
DB4_C 0xF7CB Message Data Byte 4
|
|
DB4_C.DB47 7
|
|
DB4_C.DB46 6
|
|
DB4_C.DB45 5
|
|
DB4_C.DB44 4
|
|
DB4_C.DB43 3
|
|
DB4_C.DB42 2
|
|
DB4_C.DB41 1
|
|
DB4_C.DB40 0
|
|
DB5_C 0xF7CC Message Data Byte 5
|
|
DB5_C.DB57 7
|
|
DB5_C.DB56 6
|
|
DB5_C.DB55 5
|
|
DB5_C.DB54 4
|
|
DB5_C.DB53 3
|
|
DB5_C.DB52 2
|
|
DB5_C.DB51 1
|
|
DB5_C.DB50 0
|
|
DB6_C 0xF7CD Message Data Byte 6
|
|
DB6_C.DB67 7
|
|
DB6_C.DB66 6
|
|
DB6_C.DB65 5
|
|
DB6_C.DB64 4
|
|
DB6_C.DB63 3
|
|
DB6_C.DB62 2
|
|
DB6_C.DB61 1
|
|
DB6_C.DB60 0
|
|
DB7_C 0xF7CE Message Data Byte 7
|
|
DB7_C.DB77 7
|
|
DB7_C.DB76 6
|
|
DB7_C.DB75 5
|
|
DB7_C.DB74 4
|
|
DB7_C.DB73 3
|
|
DB7_C.DB72 2
|
|
DB7_C.DB71 1
|
|
DB7_C.DB70 0
|
|
RESERVEDF7CF 0xF7CF RESERVED
|
|
; -------------------------------------- CAN_D --------------------------------
|
|
MCR0_D 0xF7D0 Message Control Register Low
|
|
MCR0_D.MSGVAL1 7
|
|
MCR0_D.MSGVAL0 6
|
|
MCR0_D.TXIE1 5
|
|
MCR0_D.TXIE0 4
|
|
MCR0_D.RXIE1 3
|
|
MCR0_D.RXIE0 2
|
|
MCR0_D.INTPND1 1
|
|
MCR0_D.INTPND0 0
|
|
MCR1_D 0xF7D1 Message Control Register High
|
|
MCR1_D.RMTPND1 7
|
|
MCR1_D.RMTPND0 6
|
|
MCR1_D.TXRQ1 5
|
|
MCR1_D.TXRQ0 4
|
|
MCR1_D.MSGLSTCPUUPD1 3
|
|
MCR1_D.MSGLSTCPUUPD0 2
|
|
MCR1_D.NEWDAT1 1
|
|
MCR1_D.NEWDAT0 0
|
|
UAR0_D 0xF7D2 Upper Arbitration Register Low
|
|
UAR0_D.ID28 7
|
|
UAR0_D.ID27 6
|
|
UAR0_D.ID26 5
|
|
UAR0_D.ID25 4
|
|
UAR0_D.ID24 3
|
|
UAR0_D.ID23 2
|
|
UAR0_D.ID22 1
|
|
UAR0_D.ID21 0
|
|
UAR1_D 0xF7D3 Upper Arbitration Register High
|
|
UAR1_D.ID20 7
|
|
UAR1_D.ID19 6
|
|
UAR1_D.ID18 5
|
|
UAR1_D.ID17 4
|
|
UAR1_D.ID16 3
|
|
UAR1_D.ID15 2
|
|
UAR1_D.ID14 1
|
|
UAR1_D.ID13 0
|
|
LAR0_D 0xF7D4 Lower Arbitration Register Low
|
|
LAR0_D.ID12 7
|
|
LAR0_D.ID11 6
|
|
LAR0_D.ID10 5
|
|
LAR0_D.ID9 4
|
|
LAR0_D.ID8 3
|
|
LAR0_D.ID7 2
|
|
LAR0_D.ID6 1
|
|
LAR0_D.ID5 0
|
|
LAR1_D 0xF7D5 Lower Arbitration Register High
|
|
LAR1_D.ID4 7
|
|
LAR1_D.ID3 6
|
|
LAR1_D.ID2 5
|
|
LAR1_D.ID1 4
|
|
LAR1_D.ID0 3
|
|
MCFG_D 0xF7D6 Message Configuration Register
|
|
MCFG_D.DLC7 7
|
|
MCFG_D.DLC6 6
|
|
MCFG_D.DLC5 5
|
|
MCFG_D.DLC4 4
|
|
MCFG_D.DIR 3
|
|
MCFG_D.XTD 2
|
|
DB0_D 0xF7D7 Message Data Byte 0
|
|
DB0_D.DB07 7
|
|
DB0_D.DB06 6
|
|
DB0_D.DB05 5
|
|
DB0_D.DB04 4
|
|
DB0_D.DB03 3
|
|
DB0_D.DB02 2
|
|
DB0_D.DB01 1
|
|
DB0_D.DB00 0
|
|
DB1_D 0xF7D8 Message Data Byte 1
|
|
DB1_D.DB17 7
|
|
DB1_D.DB16 6
|
|
DB1_D.DB15 5
|
|
DB1_D.DB14 4
|
|
DB1_D.DB13 3
|
|
DB1_D.DB12 2
|
|
DB1_D.DB11 1
|
|
DB1_D.DB10 0
|
|
DB2_D 0xF7D9 Message Data Byte 2
|
|
DB2_D.DB27 7
|
|
DB2_D.DB26 6
|
|
DB2_D.DB25 5
|
|
DB2_D.DB24 4
|
|
DB2_D.DB23 3
|
|
DB2_D.DB22 2
|
|
DB2_D.DB21 1
|
|
DB2_D.DB20 0
|
|
DB3_D 0xF7DA Message Data Byte 3
|
|
DB3_D.DB37 7
|
|
DB3_D.DB36 6
|
|
DB3_D.DB35 5
|
|
DB3_D.DB34 4
|
|
DB3_D.DB33 3
|
|
DB3_D.DB32 2
|
|
DB3_D.DB31 1
|
|
DB3_D.DB30 0
|
|
DB4_D 0xF7DB Message Data Byte 4
|
|
DB4_D.DB47 7
|
|
DB4_D.DB46 6
|
|
DB4_D.DB45 5
|
|
DB4_D.DB44 4
|
|
DB4_D.DB43 3
|
|
DB4_D.DB42 2
|
|
DB4_D.DB41 1
|
|
DB4_D.DB40 0
|
|
DB5_D 0xF7DC Message Data Byte 5
|
|
DB5_D.DB57 7
|
|
DB5_D.DB56 6
|
|
DB5_D.DB55 5
|
|
DB5_D.DB54 4
|
|
DB5_D.DB53 3
|
|
DB5_D.DB52 2
|
|
DB5_D.DB51 1
|
|
DB5_D.DB50 0
|
|
DB6_D 0xF7DD Message Data Byte 6
|
|
DB6_D.DB67 7
|
|
DB6_D.DB66 6
|
|
DB6_D.DB65 5
|
|
DB6_D.DB64 4
|
|
DB6_D.DB63 3
|
|
DB6_D.DB62 2
|
|
DB6_D.DB61 1
|
|
DB6_D.DB60 0
|
|
DB7_D 0xF7DE Message Data Byte 7
|
|
DB7_D.DB77 7
|
|
DB7_D.DB76 6
|
|
DB7_D.DB75 5
|
|
DB7_D.DB74 4
|
|
DB7_D.DB73 3
|
|
DB7_D.DB72 2
|
|
DB7_D.DB71 1
|
|
DB7_D.DB70 0
|
|
RESERVEDF7DF 0xF7DF RESERVED
|
|
; -------------------------------------- CAN_E --------------------------------
|
|
MCR0_E 0xF7E0 Message Control Register Low
|
|
MCR0_E.MSGVAL1 7
|
|
MCR0_E.MSGVAL0 6
|
|
MCR0_E.TXIE1 5
|
|
MCR0_E.TXIE0 4
|
|
MCR0_E.RXIE1 3
|
|
MCR0_E.RXIE0 2
|
|
MCR0_E.INTPND1 1
|
|
MCR0_E.INTPND0 0
|
|
MCR1_E 0xF7E1 Message Control Register High
|
|
MCR1_E.RMTPND1 7
|
|
MCR1_E.RMTPND0 6
|
|
MCR1_E.TXRQ1 5
|
|
MCR1_E.TXRQ0 4
|
|
MCR1_E.MSGLSTCPUUPD1 3
|
|
MCR1_E.MSGLSTCPUUPD0 2
|
|
MCR1_E.NEWDAT1 1
|
|
MCR1_E.NEWDAT0 0
|
|
UAR0_E 0xF7E2 Upper Arbitration Register Low
|
|
UAR0_E.ID28 7
|
|
UAR0_E.ID27 6
|
|
UAR0_E.ID26 5
|
|
UAR0_E.ID25 4
|
|
UAR0_E.ID24 3
|
|
UAR0_E.ID23 2
|
|
UAR0_E.ID22 1
|
|
UAR0_E.ID21 0
|
|
UAR1_E 0xF7E3 Upper Arbitration Register High
|
|
UAR1_E.ID20 7
|
|
UAR1_E.ID19 6
|
|
UAR1_E.ID18 5
|
|
UAR1_E.ID17 4
|
|
UAR1_E.ID16 3
|
|
UAR1_E.ID15 2
|
|
UAR1_E.ID14 1
|
|
UAR1_E.ID13 0
|
|
LAR0_E 0xF7E4 Lower Arbitration Register Low
|
|
LAR0_E.ID12 7
|
|
LAR0_E.ID11 6
|
|
LAR0_E.ID10 5
|
|
LAR0_E.ID9 4
|
|
LAR0_E.ID8 3
|
|
LAR0_E.ID7 2
|
|
LAR0_E.ID6 1
|
|
LAR0_E.ID5 0
|
|
LAR1_E 0xF7E5 Lower Arbitration Register High
|
|
LAR1_E.ID4 7
|
|
LAR1_E.ID3 6
|
|
LAR1_E.ID2 5
|
|
LAR1_E.ID1 4
|
|
LAR1_E.ID0 3
|
|
MCFG_E 0xF7E6 Message Configuration Register
|
|
MCFG_E.DLC7 7
|
|
MCFG_E.DLC6 6
|
|
MCFG_E.DLC5 5
|
|
MCFG_E.DLC4 4
|
|
MCFG_E.DIR 3
|
|
MCFG_E.XTD 2
|
|
DB0_E 0xF7E7 Message Data Byte 0
|
|
DB0_E.DB07 7
|
|
DB0_E.DB06 6
|
|
DB0_E.DB05 5
|
|
DB0_E.DB04 4
|
|
DB0_E.DB03 3
|
|
DB0_E.DB02 2
|
|
DB0_E.DB01 1
|
|
DB0_E.DB00 0
|
|
DB1_E 0xF7E8 Message Data Byte 1
|
|
DB1_E.DB17 7
|
|
DB1_E.DB16 6
|
|
DB1_E.DB15 5
|
|
DB1_E.DB14 4
|
|
DB1_E.DB13 3
|
|
DB1_E.DB12 2
|
|
DB1_E.DB11 1
|
|
DB1_E.DB10 0
|
|
DB2_E 0xF7E9 Message Data Byte 2
|
|
DB2_E.DB27 7
|
|
DB2_E.DB26 6
|
|
DB2_E.DB25 5
|
|
DB2_E.DB24 4
|
|
DB2_E.DB23 3
|
|
DB2_E.DB22 2
|
|
DB2_E.DB21 1
|
|
DB2_E.DB20 0
|
|
DB3_E 0xF7EA Message Data Byte 3
|
|
DB3_E.DB37 7
|
|
DB3_E.DB36 6
|
|
DB3_E.DB35 5
|
|
DB3_E.DB34 4
|
|
DB3_E.DB33 3
|
|
DB3_E.DB32 2
|
|
DB3_E.DB31 1
|
|
DB3_E.DB30 0
|
|
DB4_E 0xF7EB Message Data Byte 4
|
|
DB4_E.DB47 7
|
|
DB4_E.DB46 6
|
|
DB4_E.DB45 5
|
|
DB4_E.DB44 4
|
|
DB4_E.DB43 3
|
|
DB4_E.DB42 2
|
|
DB4_E.DB41 1
|
|
DB4_E.DB40 0
|
|
DB5_E 0xF7EC Message Data Byte 5
|
|
DB5_E.DB57 7
|
|
DB5_E.DB56 6
|
|
DB5_E.DB55 5
|
|
DB5_E.DB54 4
|
|
DB5_E.DB53 3
|
|
DB5_E.DB52 2
|
|
DB5_E.DB51 1
|
|
DB5_E.DB50 0
|
|
DB6_E 0xF7ED Message Data Byte 6
|
|
DB6_E.DB67 7
|
|
DB6_E.DB66 6
|
|
DB6_E.DB65 5
|
|
DB6_E.DB64 4
|
|
DB6_E.DB63 3
|
|
DB6_E.DB62 2
|
|
DB6_E.DB61 1
|
|
DB6_E.DB60 0
|
|
DB7_E 0xF7DE Message Data Byte 7
|
|
DB7_E.DB77 7
|
|
DB7_E.DB76 6
|
|
DB7_E.DB75 5
|
|
DB7_E.DB74 4
|
|
DB7_E.DB73 3
|
|
DB7_E.DB72 2
|
|
DB7_E.DB71 1
|
|
DB7_E.DB70 0
|
|
RESERVEDF7EF 0xF7EF RESERVED
|
|
; -------------------------------------- CAN_F --------------------------------
|
|
MCR0_F 0xF7F0 Message Control Register Low
|
|
MCR0_F.MSGVAL1 7
|
|
MCR0_F.MSGVAL0 6
|
|
MCR0_F.TXIE1 5
|
|
MCR0_F.TXIE0 4
|
|
MCR0_F.RXIE1 3
|
|
MCR0_F.RXIE0 2
|
|
MCR0_F.INTPND1 1
|
|
MCR0_F.INTPND0 0
|
|
MCR1_F 0xF7F1 Message Control Register High
|
|
MCR1_F.RMTPND1 7
|
|
MCR1_F.RMTPND0 6
|
|
MCR1_F.TXRQ1 5
|
|
MCR1_F.TXRQ0 4
|
|
MCR1_F.MSGLSTCPUUPD1 3
|
|
MCR1_F.MSGLSTCPUUPD0 2
|
|
MCR1_F.NEWDAT1 1
|
|
MCR1_F.NEWDAT0 0
|
|
UAR0_F 0xF7F2 Upper Arbitration Register Low
|
|
UAR0_F.ID28 7
|
|
UAR0_F.ID27 6
|
|
UAR0_F.ID26 5
|
|
UAR0_F.ID25 4
|
|
UAR0_F.ID24 3
|
|
UAR0_F.ID23 2
|
|
UAR0_F.ID22 1
|
|
UAR0_F.ID21 0
|
|
UAR1_F 0xF7F3 Upper Arbitration Register High
|
|
UAR1_F.ID20 7
|
|
UAR1_F.ID19 6
|
|
UAR1_F.ID18 5
|
|
UAR1_F.ID17 4
|
|
UAR1_F.ID16 3
|
|
UAR1_F.ID15 2
|
|
UAR1_F.ID14 1
|
|
UAR1_F.ID13 0
|
|
LAR0_F 0xF7F4 Lower Arbitration Register Low
|
|
LAR0_F.ID12 7
|
|
LAR0_F.ID11 6
|
|
LAR0_F.ID10 5
|
|
LAR0_F.ID9 4
|
|
LAR0_F.ID8 3
|
|
LAR0_F.ID7 2
|
|
LAR0_F.ID6 1
|
|
LAR0_F.ID5 0
|
|
LAR1_F 0xF7F5 Lower Arbitration Register High
|
|
LAR1_F.ID4 7
|
|
LAR1_F.ID3 6
|
|
LAR1_F.ID2 5
|
|
LAR1_F.ID1 4
|
|
LAR1_F.ID0 3
|
|
MCFG_F 0xF7F6 Message Configuration Register
|
|
MCFG_F.DLC7 7
|
|
MCFG_F.DLC6 6
|
|
MCFG_F.DLC5 5
|
|
MCFG_F.DLC4 4
|
|
MCFG_F.DIR 3
|
|
MCFG_F.XTD 2
|
|
DB0_F 0xF7F7 Message Data Byte 0
|
|
DB0_F.DB07 7
|
|
DB0_F.DB06 6
|
|
DB0_F.DB05 5
|
|
DB0_F.DB04 4
|
|
DB0_F.DB03 3
|
|
DB0_F.DB02 2
|
|
DB0_F.DB01 1
|
|
DB0_F.DB00 0
|
|
DB1_F 0xF7F8 Message Data Byte 1
|
|
DB1_F.DB17 7
|
|
DB1_F.DB16 6
|
|
DB1_F.DB15 5
|
|
DB1_F.DB14 4
|
|
DB1_F.DB13 3
|
|
DB1_F.DB12 2
|
|
DB1_F.DB11 1
|
|
DB1_F.DB10 0
|
|
DB2_F 0xF7F9 Message Data Byte 2
|
|
DB2_F.DB27 7
|
|
DB2_F.DB26 6
|
|
DB2_F.DB25 5
|
|
DB2_F.DB24 4
|
|
DB2_F.DB23 3
|
|
DB2_F.DB22 2
|
|
DB2_F.DB21 1
|
|
DB2_F.DB20 0
|
|
DB3_F 0xF7FA Message Data Byte 3
|
|
DB3_F.DB37 7
|
|
DB3_F.DB36 6
|
|
DB3_F.DB35 5
|
|
DB3_F.DB34 4
|
|
DB3_F.DB33 3
|
|
DB3_F.DB32 2
|
|
DB3_F.DB31 1
|
|
DB3_F.DB30 0
|
|
DB4_F 0xF7FB Message Data Byte 4
|
|
DB4_F.DB47 7
|
|
DB4_F.DB46 6
|
|
DB4_F.DB45 5
|
|
DB4_F.DB44 4
|
|
DB4_F.DB43 3
|
|
DB4_F.DB42 2
|
|
DB4_F.DB41 1
|
|
DB4_F.DB40 0
|
|
DB5_F 0xF7FC Message Data Byte 5
|
|
DB5_F.DB57 7
|
|
DB5_F.DB56 6
|
|
DB5_F.DB55 5
|
|
DB5_F.DB54 4
|
|
DB5_F.DB53 3
|
|
DB5_F.DB52 2
|
|
DB5_F.DB51 1
|
|
DB5_F.DB50 0
|
|
DB6_F 0xF7FD Message Data Byte 6
|
|
DB6_F.DB67 7
|
|
DB6_F.DB66 6
|
|
DB6_F.DB65 5
|
|
DB6_F.DB64 4
|
|
DB6_F.DB63 3
|
|
DB6_F.DB62 2
|
|
DB6_F.DB61 1
|
|
DB6_F.DB60 0
|
|
DB7_F 0xF7FE Message Data Byte 7
|
|
DB7_F.DB77 7
|
|
DB7_F.DB76 6
|
|
DB7_F.DB75 5
|
|
DB7_F.DB74 4
|
|
DB7_F.DB73 3
|
|
DB7_F.DB72 2
|
|
DB7_F.DB71 1
|
|
DB7_F.DB70 0
|
|
RESERVEDF7FF 0xF7FF RESERVED
|
|
|
|
|
|
.C517
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=10484&parent_oid=13739
|
|
; SAB_80C537.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI0_TI0 0x0023 Serial channel 0
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry RI1_TI1 0x0083 Serial channel 1
|
|
entry CTF 0x009B Compare timer overflow
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
SP 0x0081 Stack Pointer
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Reg.
|
|
PCON 0x0087 Power Control Register
|
|
TCON 0x0088 Timer Control Register
|
|
TMOD 0x0089 Timer Mode Register
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH1 0x008D Timer 1, High Byte
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
RESERVED0091 0x0091 RESERVED
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
S0CON 0x0098 Serial Channel 0 Control Reg.
|
|
S0BUF 0x0099 Serial Channel 0 Buffer Reg.
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
S1CON 0x009B Serial Channel 1 Control Reg.
|
|
S1BUF 0x009C Serial Channel 1 Buffer Reg.,
|
|
S1REL 0x009D Serial Channel 1 Reload Reg., low byte
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
S0RELL 0x00AA Serial Channel 0, Reload Reg., low byte
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
RESERVED00B1 0x00B1 RESERVED
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
S0RELH 0x00BA Serial Channel 0, Reload Reg., high byte
|
|
S1RELH 0x00BB Serial Channel 1, Reload Reg.,high byte
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
CC4EN 0x00C9 Comp./Capture Enable 4 Reg.
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TH2 0x00CD Timer 2, High Byte
|
|
CCL4 0x00CE Comp./Capture Reg. 4, Low Byte
|
|
CCH4 0x00CF Comp./Capture Reg. 4, High Byte
|
|
PSW 0x00D0 Program Status Word Register
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
CML0 0x00D2 Compare Register 0, Low Byte
|
|
CMH0 0x00D3 Compare Register 0, High Byte
|
|
CML1 0x00D4 Compare Register 1, Low Byte
|
|
CMH1 0x00D5 Compare Register 1, High Byte
|
|
CML2 0x00D6 Compare Register 2, Low Byte
|
|
CMH2 0x00D7 Compare Register 2, High Byte
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADDAT 0x00D9 A/D Converter Data Register
|
|
DAPR 0x00DA D/AConverter Program Register
|
|
P7 0x00DB Port 7, Analog/Digital Input
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
P8 0x00DD Port 8, Analog/Digital Input, 4-bit 0DD
|
|
CTRELL 0x00DE Com. Timer Rel. Reg., Low Byte
|
|
CTRELH 0x00DF Com. Timer Rel. Reg., High Byte
|
|
ACC 0x00E0 Accumulator
|
|
CTCON 0x00E1 Com. Timer Control Register
|
|
CML3 0x00E2 Compare Register 3, Low Byte
|
|
CMH3 0x00E3 Compare Register 3, High Byte
|
|
CML4 0x00E4 Compare Register 4, Low Byte
|
|
CMH4 0x00E5 Compare Register 4, High Byte
|
|
CML5 0x00E6 Compare Register 5, Low Byte
|
|
CMH5 0x00E7 Compare Register 5, High Byte
|
|
P4 0x00E8 Port 4
|
|
MD0 0x00E9 Multiplication/Division Register 0
|
|
MD1 0x00EA Multiplication/Division Register 1
|
|
MD2 0x00EB Multiplication/Division Register 2
|
|
MD3 0x00EC Multiplication/Division Register 3
|
|
MD4 0x00ED Multiplication/Division Register 4
|
|
MD5 0x00EE Multiplication/Division Register 5
|
|
ARCON 0x00EF Arithmetic Control Register
|
|
B 0x00F0 B-Register
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
CML6 0x00F2 Compare Register 6, Low Byte
|
|
CMH6 0x00F3 Compare Register 6, High Byte
|
|
CML7 0x00F4 Compare Register 7, Low Byte
|
|
CMH7 0x00F5 Compare Register 7, High Byte
|
|
CMEN 0x00F6 Compare Enable Register
|
|
CMSEL 0x00F7 Compare Input Select
|
|
P5 0x00F8 Port 5
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
P6 0x00FA Port 6
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C517A
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=8041&parent_oid=14402
|
|
; SAF-C517A-LN.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI0_TI0 0x0023 Serial channel 0
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry RI1_TI1 0x0083 Serial channel 1
|
|
entry ICMP0_ICMP7 0x0093 Compare Match Interupt of Compare Registers CM0-CM7 assigned to Timer 2
|
|
entry CTF 0x009B Compare timer overflow
|
|
entry ICS 0x00A3 Compare Match Interupt of Compare Register COMSET
|
|
entry ICR 0x00AB Compare Match Interupt of Compare Register COMCLR
|
|
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
; WDTREL 0x0083 Watchdog Timer Reload Register
|
|
; WDTREL.WDTPSEL 7
|
|
; WDTREL.WDTREL6 6
|
|
; WDTREL.WDTREL5 5
|
|
; WDTREL.WDTREL4 4
|
|
; WDTREL.WDTREL3 3
|
|
; WDTREL.WDTREL2 2
|
|
; WDTREL.WDTREL1 1
|
|
; WDTREL.WDTREL0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
RESERVED0086 0x0086 RESERVED
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_0 7
|
|
TMOD.C_T_0 6
|
|
TMOD.M1_0 5
|
|
TMOD.M0_0 4
|
|
TMOD.GATE_1 3
|
|
TMOD.C_T_1 2
|
|
TMOD.M1_1 1
|
|
TMOD.M0_1 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.T2 7
|
|
P1.CLKOUT 6
|
|
P1.T2EX 5
|
|
P1.INT2 4
|
|
P1.INT6 3
|
|
P1.INT5 2
|
|
P1.INT4 1
|
|
P1.INT3 0
|
|
XPAGE 0x0091 Page Address Register for Extended On-Chip RAM
|
|
XPAGE.XPAGE7 7
|
|
XPAGE.XPAGE6 6
|
|
XPAGE.XPAGE5 5
|
|
XPAGE.XPAGE4 4
|
|
XPAGE.XPAGE3 3
|
|
XPAGE.XPAGE2 2
|
|
XPAGE.XPAGE1 1
|
|
XPAGE.XPAGE0 0
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
DPSEL.DPSEL2 2
|
|
DPSEL.DPSEL1 1
|
|
DPSEL.DPSEL0 0
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
S0CON 0x0098 Serial Channel 0 Control Register
|
|
S0CON.SM0 7
|
|
S0CON.SM1 6
|
|
S0CON.SM20 5
|
|
S0CON.REN0 4
|
|
S0CON.TB80 3
|
|
S0CON.RB80 2
|
|
S0CON.TI0 1
|
|
S0CON.RI0 0
|
|
S0BUF 0x0099 Serial Channel 0 Buffer Register
|
|
S0BUF.S0BUF7 7
|
|
S0BUF.S0BUF6 6
|
|
S0BUF.S0BUF5 5
|
|
S0BUF.S0BUF4 4
|
|
S0BUF.S0BUF3 3
|
|
S0BUF.S0BUF2 2
|
|
S0BUF.S0BUF1 1
|
|
S0BUF.S0BUF0 0
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
IEN2.ECR 5
|
|
IEN2.ECS 4
|
|
IEN2.ECT 3
|
|
IEN2.ECMP 2
|
|
IEN2.ES1 0
|
|
S1CON 0x009B Serial Channel 1 Control Register
|
|
S1CON.SM 7
|
|
S1CON.SM21 5
|
|
S1CON.REN1 4
|
|
S1CON.TB81 3
|
|
S1CON.RB81 2
|
|
S1CON.TI1 1
|
|
S1CON.RI1 0
|
|
S1BUF 0x009C Serial Channel 1 Buffer Register
|
|
S1BUF.S1BUF7 7
|
|
S1BUF.S1BUF6 6
|
|
S1BUF.S1BUF5 5
|
|
S1BUF.S1BUF4 4
|
|
S1BUF.S1BUF3 3
|
|
S1BUF.S1BUF2 2
|
|
S1BUF.S1BUF1 1
|
|
S1BUF.S1BUF0 0
|
|
S1RELL 0x009D Serial Channel 1 Reload Reg., Low Byte
|
|
S1RELL.S1RELL7 7
|
|
S1RELL.S1RELL6 6
|
|
S1RELL.S1RELL5 5
|
|
S1RELL.S1RELL4 4
|
|
S1RELL.S1RELL3 3
|
|
S1RELL.S1RELL2 2
|
|
S1RELL.S1RELL1 1
|
|
S1RELL.S1RELL0 0
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
COMSETL 0x00A1 Compare Set Register Low Byte
|
|
COMSETL.COMSETL7 7
|
|
COMSETL.COMSETL6 6
|
|
COMSETL.COMSETL5 5
|
|
COMSETL.COMSETL4 4
|
|
COMSETL.COMSETL3 3
|
|
COMSETL.COMSETL2 2
|
|
COMSETL.COMSETL1 1
|
|
COMSETL.COMSETL0 0
|
|
COMSETH 0x00A2 Compare Set Register, High Byte
|
|
COMSETH.COMSETH7 7
|
|
COMSETH.COMSETH6 6
|
|
COMSETH.COMSETH5 5
|
|
COMSETH.COMSETH4 4
|
|
COMSETH.COMSETH3 3
|
|
COMSETH.COMSETH2 2
|
|
COMSETH.COMSETH1 1
|
|
COMSETH.COMSETH0 0
|
|
COMCLRL 0x00A3 Compare Clear Register, Low Byte
|
|
COMCLRL.COMCLRL7 7
|
|
COMCLRL.COMCLRL6 6
|
|
COMCLRL.COMCLRL5 5
|
|
COMCLRL.COMCLRL4 4
|
|
COMCLRL.COMCLRL3 3
|
|
COMCLRL.COMCLRL2 2
|
|
COMCLRL.COMCLRL1 1
|
|
COMCLRL.COMCLRL0 0
|
|
COMCLRH 0x00A4 Compare Clear Register, High Byte
|
|
COMCLRH.COMCLRH7 7
|
|
COMCLRH.COMCLRH6 6
|
|
COMCLRH.COMCLRH5 5
|
|
COMCLRH.COMCLRH4 4
|
|
COMCLRH.COMCLRH3 3
|
|
COMCLRH.COMCLRH2 2
|
|
COMCLRH.COMCLRH1 1
|
|
COMCLRH.COMCLRH0 0
|
|
SETMSK 0x00A5 Compare Set Mask Register
|
|
SETMSK.SETMSK7 7
|
|
SETMSK.SETMSK6 6
|
|
SETMSK.SETMSK5 5
|
|
SETMSK.SETMSK4 4
|
|
SETMSK.SETMSK3 3
|
|
SETMSK.SETMSK2 2
|
|
SETMSK.SETMSK1 1
|
|
SETMSK.SETMSK0 0
|
|
CLRMSK 0x00A6 Compare Clear Mask Register
|
|
CLRMSK.CLRMSK7 7
|
|
CLRMSK.CLRMSK6 6
|
|
CLRMSK.CLRMSK5 5
|
|
CLRMSK.CLRMSK4 4
|
|
CLRMSK.CLRMSK3 3
|
|
CLRMSK.CLRMSK2 2
|
|
CLRMSK.CLRMSK1 1
|
|
CLRMSK.CLRMSK0 0
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.EAL7 7
|
|
IEN0.WDT6 6
|
|
IEN0.ET25 5
|
|
IEN0.ES04 4
|
|
IEN0.ET13 3
|
|
IEN0.EX12 2
|
|
IEN0.ET01 1
|
|
IEN0.EX00 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
IP0.OWDS 7
|
|
IP0.WDTS 6
|
|
IP0.IP05 5
|
|
IP0.IP04 4
|
|
IP0.IP03 3
|
|
IP0.IP02 2
|
|
IP0.IP01 1
|
|
IP0.IP00 0
|
|
S0RELL 0x00AA Serial Channel 0 Reload Reg., Low Byte
|
|
S0RELL.S0RELL7 7
|
|
S0RELL.S0RELL6 6
|
|
S0RELL.S0RELL5 5
|
|
S0RELL.S0RELL4 4
|
|
S0RELL.S0RELL3 3
|
|
S0RELL.S0RELL2 2
|
|
S0RELL.S0RELL1 1
|
|
S0RELL.S0RELL0 0
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD0 1
|
|
P3.RxD0 0
|
|
SYSCON 0x00B1 System/XRAM Control Register
|
|
SYSCON.XMAP1 1
|
|
SYSCON.XMAP0 0
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IEN1.EXEN2 7
|
|
IEN1.SWDT 6
|
|
IEN1.EX6 5
|
|
IEN1.EX5 4
|
|
IEN1.EX4 3
|
|
IEN1.EX3 2
|
|
IEN1.EX2 1
|
|
IEN1.EADC 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.IP15 5
|
|
IP1.IP14 4
|
|
IP1.IP13 3
|
|
IP1.IP12 2
|
|
IP1.IP11 1
|
|
IP1.IP10 0
|
|
S0RELH 0x00BA Serial Channel 0 Reload Reg., High Byte
|
|
S0RELH.S0RELH1 1
|
|
S0RELH.S0RELH0 0
|
|
S1RELH 0x00BB Serial Channel 1 Reload Reg., High Byte
|
|
S1RELH.S1RELH1 1
|
|
S1RELH.S1RELH0 0
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON0 0x00C0 Interrupt Request Control Register 0
|
|
IRCON0.EXF2 7
|
|
IRCON0.TF2 6
|
|
IRCON0.IEX6 5
|
|
IRCON0.IEX5 4
|
|
IRCON0.IEX4 3
|
|
IRCON0.IEX3 2
|
|
IRCON0.IEX2 1
|
|
IRCON0.IADC 0
|
|
CCEN 0x00C1 Compare/Capture Enable Register
|
|
CCEN.COCAH3 7
|
|
CCEN.COCAL3 6
|
|
CCEN.COCAH2 5
|
|
CCEN.COCAL2 4
|
|
CCEN.COCAH1 3
|
|
CCEN.COCAL1 2
|
|
CCEN.COCAH0 1
|
|
CCEN.COCAL0 0
|
|
CCL1 0x00C2 Compare/Capture Register 1, Low Byte
|
|
CCL1.CCL17 7
|
|
CCL1.CCL16 6
|
|
CCL1.CCL15 5
|
|
CCL1.CCL14 4
|
|
CCL1.CCL13 3
|
|
CCL1.CCL12 2
|
|
CCL1.CCL11 1
|
|
CCL1.CCL10 0
|
|
CCH1 0x00C3 Compare/Capture Register 1, High Byte
|
|
CCH1.CCH17 7
|
|
CCH1.CCH16 6
|
|
CCH1.CCH15 5
|
|
CCH1.CCH14 4
|
|
CCH1.CCH13 3
|
|
CCH1.CCH12 2
|
|
CCH1.CCH11 1
|
|
CCH1.CCH10 0
|
|
CCL2 0x00C4 Compare/Capture Register 2, Low Byte
|
|
CCL2.CCL27 7
|
|
CCL2.CCL26 6
|
|
CCL2.CCL25 5
|
|
CCL2.CCL24 4
|
|
CCL2.CCL23 3
|
|
CCL2.CCL22 2
|
|
CCL2.CCL21 1
|
|
CCL2.CCL20 0
|
|
CCH2 0x00C5 Compare/Capture Register 2, High Byte
|
|
CCH2.CCH27 7
|
|
CCH2.CCH26 6
|
|
CCH2.CCH25 5
|
|
CCH2.CCH24 4
|
|
CCH2.CCH23 3
|
|
CCH2.CCH22 2
|
|
CCH2.CCH21 1
|
|
CCH2.CCH20 0
|
|
CCL3 0x00C6 Compare/Capture Register 1, Low Byte
|
|
CCL3.CCL37 7
|
|
CCL3.CCL36 6
|
|
CCL3.CCL35 5
|
|
CCL3.CCL34 4
|
|
CCL3.CCL33 3
|
|
CCL3.CCL32 2
|
|
CCL3.CCL31 1
|
|
CCL3.CCL30 0
|
|
CCH3 0x00C7 Compare/Capture Register 3, High Byte
|
|
CCH3.CCH37 7
|
|
CCH3.CCH36 6
|
|
CCH3.CCH35 5
|
|
CCH3.CCH34 4
|
|
CCH3.CCH33 3
|
|
CCH3.CCH32 2
|
|
CCH3.CCH31 1
|
|
CCH3.CCH30 0
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.T2PS 7
|
|
T2CON.I3FR 6
|
|
T2CON.I2FR 5
|
|
T2CON.T2R1 4
|
|
T2CON.T2R0 3
|
|
T2CON.T2CM 2
|
|
T2CON.T2I1 1
|
|
T2CON.T2I0 0
|
|
CC4EN 0x00C9 Compare/Capture 4 Enable Register
|
|
CC4EN.COCOEN1 7
|
|
CC4EN.COCON2 6
|
|
CC4EN.COCON1 5
|
|
CC4EN.COCON0 4
|
|
CC4EN.COCOEN0 3
|
|
CC4EN.COCAH4 2
|
|
CC4EN.COCAL4 1
|
|
CC4EN.COMO 0
|
|
CRCL 0x00CA Comp./Rel./Capt. Register Low Byte
|
|
CRCL.CRCL7 7
|
|
CRCL.CRCL6 6
|
|
CRCL.CRCL5 5
|
|
CRCL.CRCL4 4
|
|
CRCL.CRCL3 3
|
|
CRCL.CRCL2 2
|
|
CRCL.CRCL1 1
|
|
CRCL.CRCL0 0
|
|
CRCH 0x00CB Comp./Rel./Capt. Register High Byte
|
|
CRCH.CRCH7 7
|
|
CRCH.CRCH6 6
|
|
CRCH.CRCH5 5
|
|
CRCH.CRCH4 4
|
|
CRCH.CRCH3 3
|
|
CRCH.CRCH2 2
|
|
CRCH.CRCH1 1
|
|
CRCH.CRCH0 0
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2, High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
CCL4 0x00CE Compare/Capture Register 4, Low Byte
|
|
CCL4.CCL47 7
|
|
CCL4.CCL46 6
|
|
CCL4.CCL45 5
|
|
CCL4.CCL44 4
|
|
CCL4.CCL43 3
|
|
CCL4.CCL42 2
|
|
CCL4.CCL41 1
|
|
CCL4.CCL40 0
|
|
CCH4 0x00CF Compare/Capture Register 4, High Byte
|
|
CCH4.CCH47 7
|
|
CCH4.CCH46 6
|
|
CCH4.CCH45 5
|
|
CCH4.CCH44 4
|
|
CCH4.CCH43 3
|
|
CCH4.CCH42 2
|
|
CCH4.CCH41 1
|
|
CCH4.CCH40 0
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
IRCON1 0x00D1 Interrupt Request Control Register 1
|
|
IRCON1.ICMP7 7
|
|
IRCON1.ICMP6 6
|
|
IRCON1.ICMP5 5
|
|
IRCON1.ICMP4 4
|
|
IRCON1.ICMP3 3
|
|
IRCON1.ICMP2 2
|
|
IRCON1.ICMP1 1
|
|
IRCON1.ICMP0 0
|
|
CML0 0x00D2 Compare Register 0, Low Byte
|
|
CML0.CML07 7
|
|
CML0.CML06 6
|
|
CML0.CML05 5
|
|
CML0.CML04 4
|
|
CML0.CML03 3
|
|
CML0.CML02 2
|
|
CML0.CML01 1
|
|
CML0.CML00 0
|
|
CMH0 0x00D3 Compare Register 0, High Byte
|
|
CMH0.CMH07 7
|
|
CMH0.CMH06 6
|
|
CMH0.CMH05 5
|
|
CMH0.CMH04 4
|
|
CMH0.CMH03 3
|
|
CMH0.CMH02 2
|
|
CMH0.CMH01 1
|
|
CMH0.CMH00 0
|
|
CML1 0x00D4 Compare Register 1, Low Byte
|
|
CML1.CML17 7
|
|
CML1.CML16 6
|
|
CML1.CML15 5
|
|
CML1.CML14 4
|
|
CML1.CML13 3
|
|
CML1.CML12 2
|
|
CML1.CML11 1
|
|
CML1.CML10 0
|
|
CMH1 0x00D5 Compare Register 1, High Byte
|
|
CMH1.CMH17 7
|
|
CMH1.CMH16 6
|
|
CMH1.CMH15 5
|
|
CMH1.CMH14 4
|
|
CMH1.CMH13 3
|
|
CMH1.CMH12 2
|
|
CMH1.CMH11 1
|
|
CMH1.CMH10 0
|
|
CML2 0x00D6 Compare Register 2, Low Byte
|
|
CML2.CML27 7
|
|
CML2.CML26 6
|
|
CML2.CML25 5
|
|
CML2.CML24 4
|
|
CML2.CML23 3
|
|
CML2.CML22 2
|
|
CML2.CML21 1
|
|
CML2.CML20 0
|
|
CMH2 0x00D7 Compare Register 2, High Byte
|
|
CMH2.CMH27 7
|
|
CMH2.CMH26 6
|
|
CMH2.CMH25 5
|
|
CMH2.CMH24 4
|
|
CMH2.CMH23 3
|
|
CMH2.CMH22 2
|
|
CMH2.CMH21 1
|
|
CMH2.CMH20 0
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADCON0.BD 7
|
|
ADCON0.CLK 6
|
|
ADCON0.ADEX 5
|
|
ADCON0.BSY 4
|
|
ADCON0.ADM 3
|
|
ADCON0.MX2 2
|
|
ADCON0.MX1 1
|
|
ADCON0.MX0 0
|
|
ADDATH 0x00D9 A/D Converter Data Register, High Byte
|
|
ADDATH.ADDATH9 7
|
|
ADDATH.ADDATH8 6
|
|
ADDATH.ADDATH7 5
|
|
ADDATH.ADDATH6 4
|
|
ADDATH.ADDATH5 3
|
|
ADDATH.ADDATH4 2
|
|
ADDATH.ADDATH3 1
|
|
ADDATH.ADDATH2 0
|
|
ADDATL 0x00DA A/D Converter Data Register, Low Byte
|
|
ADDATL.ADDATL1 7
|
|
ADDATL.ADDATL0 6
|
|
P7 0x00DB Port 7, Analog/Digital Input
|
|
P7.P77 7
|
|
P7.P76 6
|
|
P7.P75 5
|
|
P7.P74 4
|
|
P7.P73 3
|
|
P7.P72 2
|
|
P7.P71 1
|
|
P7.P70 0
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
ADCON1.ADCL 7
|
|
ADCON1.MX3 3
|
|
ADCON1.MX2 2
|
|
ADCON1.MX1 1
|
|
ADCON1.MX0 0
|
|
P8 0x00DD Port 8, Analog/Digital Input
|
|
P8.P83 3
|
|
P8.P82 2
|
|
P8.P81 1
|
|
P8.P80 0
|
|
CTRELL 0x00DE Compare Timer Rel. Register, Low Byte
|
|
CTRELL.CTRELL7 7
|
|
CTRELL.CTRELL6 6
|
|
CTRELL.CTRELL5 5
|
|
CTRELL.CTRELL4 4
|
|
CTRELL.CTRELL3 3
|
|
CTRELL.CTRELL2 2
|
|
CTRELL.CTRELL1 1
|
|
CTRELL.CTRELL0 0
|
|
CTRELH 0x00DF Compare Timer Rel. Register, High Byte
|
|
CTRELH.CTRELH7 7
|
|
CTRELH.CTRELH6 6
|
|
CTRELH.CTRELH5 5
|
|
CTRELH.CTRELH4 4
|
|
CTRELH.CTRELH3 3
|
|
CTRELH.CTRELH2 2
|
|
CTRELH.CTRELH1 1
|
|
CTRELH.CTRELH0 0
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
CTCON 0x00E1 Compare Timer Control Register
|
|
CTCON.T2PS1 7
|
|
CTCON.ICR 5
|
|
CTCON.ICS 4
|
|
CTCON.CTF 3
|
|
CTCON.CLK2 2
|
|
CTCON.CLK1 1
|
|
CTCON.CLK0 0
|
|
CML3 0x00E2 Compare Register 3, Low Byte
|
|
CML3.CML37 7
|
|
CML3.CML36 6
|
|
CML3.CML35 5
|
|
CML3.CML34 4
|
|
CML3.CML33 3
|
|
CML3.CML32 2
|
|
CML3.CML31 1
|
|
CML3.CML30 0
|
|
CMH3 0x00E3 Compare Register 3, High Byte
|
|
CMH3.CMH37 7
|
|
CMH3.CMH36 6
|
|
CMH3.CMH35 5
|
|
CMH3.CMH34 4
|
|
CMH3.CMH33 3
|
|
CMH3.CMH32 2
|
|
CMH3.CMH31 1
|
|
CMH3.CMH30 0
|
|
CML4 0x00E4 Compare Register 4, Low Byte
|
|
CML4.CML47 7
|
|
CML4.CML46 6
|
|
CML4.CML45 5
|
|
CML4.CML44 4
|
|
CML4.CML43 3
|
|
CML4.CML42 2
|
|
CML4.CML41 1
|
|
CML4.CML40 0
|
|
CMH4 0x00E5 Compare Register 4, High Byte
|
|
CMH4.CMH47 7
|
|
CMH4.CMH46 6
|
|
CMH4.CMH45 5
|
|
CMH4.CMH44 4
|
|
CMH4.CMH43 3
|
|
CMH4.CMH42 2
|
|
CMH4.CMH41 1
|
|
CMH4.CMH40 0
|
|
CML5 0x00E6 Compare Register 5, Low Byte
|
|
CML5.CML57 7
|
|
CML5.CML56 6
|
|
CML5.CML55 5
|
|
CML5.CML54 4
|
|
CML5.CML53 3
|
|
CML5.CML52 2
|
|
CML5.CML51 1
|
|
CML5.CML50 0
|
|
CMH5 0x00E7 Compare Register 5, High Byte
|
|
CMH5.CMH57 7
|
|
CMH5.CMH56 6
|
|
CMH5.CMH55 5
|
|
CMH5.CMH54 4
|
|
CMH5.CMH53 3
|
|
CMH5.CMH52 2
|
|
CMH5.CMH51 1
|
|
CMH5.CMH50 0
|
|
P4 0x00E8 Port 4
|
|
P4.CM7 7
|
|
P4.CM6 6
|
|
P4.CM5 5
|
|
P4.CM4 4
|
|
P4.CM3 3
|
|
P4.CM2 2
|
|
P4.CM1 1
|
|
P4.CM0 0
|
|
MD0 0x00E9 Multiplication/Division Register 0
|
|
MD0.MD07 7
|
|
MD0.MD06 6
|
|
MD0.MD05 5
|
|
MD0.MD04 4
|
|
MD0.MD03 3
|
|
MD0.MD02 2
|
|
MD0.MD01 1
|
|
MD0.MD00 0
|
|
MD1 0x00EA Multiplication/Division Register 1
|
|
MD1.MD17 7
|
|
MD1.MD16 6
|
|
MD1.MD15 5
|
|
MD1.MD14 4
|
|
MD1.MD13 3
|
|
MD1.MD12 2
|
|
MD1.MD11 1
|
|
MD1.MD10 0
|
|
MD2 0x00EB Multiplication/Division Register 2
|
|
MD2.MD27 7
|
|
MD2.MD26 6
|
|
MD2.MD25 5
|
|
MD2.MD24 4
|
|
MD2.MD23 3
|
|
MD2.MD22 2
|
|
MD2.MD21 1
|
|
MD2.MD20 0
|
|
MD3 0x00EC Multiplication/Division Register 3
|
|
MD3.MD37 7
|
|
MD3.MD36 6
|
|
MD3.MD35 5
|
|
MD3.MD34 4
|
|
MD3.MD33 3
|
|
MD3.MD32 2
|
|
MD3.MD31 1
|
|
MD3.MD30 0
|
|
MD4 0x00ED Multiplication/Division Register 4
|
|
MD4.MD47 7
|
|
MD4.MD46 6
|
|
MD4.MD45 5
|
|
MD4.MD44 4
|
|
MD4.MD43 3
|
|
MD4.MD42 2
|
|
MD4.MD41 1
|
|
MD4.MD40 0
|
|
MD5 0x00EE Multiplication/Division Register 5
|
|
MD5.MD57 7
|
|
MD5.MD56 6
|
|
MD5.MD55 5
|
|
MD5.MD54 4
|
|
MD5.MD53 3
|
|
MD5.MD52 2
|
|
MD5.MD51 1
|
|
MD5.MD50 0
|
|
ARCON 0x00EF Arithmetic Control Register
|
|
ARCON.MDEF 7
|
|
ARCON.MDOV 6
|
|
ARCON.SLR 5
|
|
ARCON.SC4 4
|
|
ARCON.SC3 3
|
|
ARCON.SC2 2
|
|
ARCON.SC1 1
|
|
ARCON.SC0 0
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
CML6 0x00F2 Compare Register 6, Low Byte
|
|
CML6.CML67 7
|
|
CML6.CML66 6
|
|
CML6.CML65 5
|
|
CML6.CML64 4
|
|
CML6.CML63 3
|
|
CML6.CML62 2
|
|
CML6.CML61 1
|
|
CML6.CML60 0
|
|
CMH6 0x00F3 Compare Register 6, High Byte
|
|
CMH6.CMH67 7
|
|
CMH6.CMH66 6
|
|
CMH6.CMH65 5
|
|
CMH6.CMH64 4
|
|
CMH6.CMH63 3
|
|
CMH6.CMH62 2
|
|
CMH6.CMH61 1
|
|
CMH6.CMH60 0
|
|
CML7 0x00F4 Compare Register 7, Low Byte
|
|
CML7.CML77 7
|
|
CML7.CML76 6
|
|
CML7.CML75 5
|
|
CML7.CML74 4
|
|
CML7.CML73 3
|
|
CML7.CML72 2
|
|
CML7.CML71 1
|
|
CML7.CML70 0
|
|
CMH7 0x00F5 Compare Register 7, High Byte
|
|
CMH7.CMH77 7
|
|
CMH7.CMH76 6
|
|
CMH7.CMH75 5
|
|
CMH7.CMH74 4
|
|
CMH7.CMH73 3
|
|
CMH7.CMH72 2
|
|
CMH7.CMH71 1
|
|
CMH7.CMH70 0
|
|
CMEN 0x00F6 Compare Enable Register
|
|
CMEN.CMEN7 7
|
|
CMEN.CMEN6 6
|
|
CMEN.CMEN5 5
|
|
CMEN.CMEN4 4
|
|
CMEN.CMEN3 3
|
|
CMEN.CMEN2 2
|
|
CMEN.CMEN1 1
|
|
CMEN.CMEN0 0
|
|
CMSEL 0x00F7 Compare Input Select
|
|
CMSEL.CMSEL7 7
|
|
CMSEL.CMSEL6 6
|
|
CMSEL.CMSEL5 5
|
|
CMSEL.CMSEL4 4
|
|
CMSEL.CMSEL3 3
|
|
CMSEL.CMSEL2 2
|
|
CMSEL.CMSEL1 1
|
|
CMSEL.CMSEL0 0
|
|
P5 0x00F8 Port 5
|
|
P5.CCM7 7
|
|
P5.CCM6 6
|
|
P5.CCM5 5
|
|
P5.CCM4 4
|
|
P5.CCM3 3
|
|
P5.CCM2 2
|
|
P5.CCM1 1
|
|
P5.CCM0 0
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
P6 0x00FA Port 6
|
|
P6.P67 7
|
|
P6.P66 6
|
|
P6.P65 5
|
|
P6.P64 4
|
|
P6.P63 3
|
|
P6.TxD1 2
|
|
P6.RxD1 1
|
|
P6.ADST 0
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C535
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=10483&parent_oid=13738
|
|
; SAB_80C535.pdf
|
|
; SAB 80C535: ROM-less version, identical to the SAB 80C515
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI_TI 0x0023 Serial channel
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
SP 0x0081 Stack Pointer
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
RESERVED0086 0x0086 RESERVED
|
|
PCON 0x0087 Power Control Register
|
|
TCON 0x0088 Timer Control Register
|
|
TMOD 0x0089 Timer Mode Register
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH1 0x008D Timer 1, High Byte
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Reg.
|
|
SBUF 0x0099 Serial Channel Buffer Reg.
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
RESERVED00AA 0x00AA RESERVED
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
RESERVED00B1 0x00B1 RESERVED
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TH2 0x00CD Timer 2, High Byte
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
ADCON1 0x00D8 A/D Converter Control Register 1
|
|
ADDAT 0x00D9 A/D Converter Data Register
|
|
DAPR 0x00DA D/A Converter Program Register
|
|
P6 0x00DB Port 6, Analog/Digital Input
|
|
RESERVED00DC 0x00DC RESERVED
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
P4 0x00E8 Port 4
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B-Register
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
P5 0x00F8 Port 5
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C537
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=10484&parent_oid=13739
|
|
; SAB_80C537.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI0_TI0 0x0023 Serial channel 0
|
|
entry TF2_EXF2 0x002B Timer 2 overflow/ext. reload
|
|
entry IADC 0x0043 A/D converter
|
|
entry IEX2 0x004B External interrupt 2
|
|
entry IEX3 0x0053 External interrupt 3
|
|
entry IEX4 0x005B External interrupt 4
|
|
entry IEX5 0x0063 External interrupt 5
|
|
entry IEX6 0x006B External interrupt 6
|
|
entry RI1_TI1 0x0083 Serial channel 1
|
|
entry CTF 0x009B Compare timer overflow
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
SP 0x0081 Stack Pointer
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Reg.
|
|
PCON 0x0087 Power Control Register
|
|
TCON 0x0088 Timer Control Register
|
|
TMOD 0x0089 Timer Mode Register
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH1 0x008D Timer 1, High Byte
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
RESERVED0091 0x0091 RESERVED
|
|
DPSEL 0x0092 Data Pointer Select Register
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
S0CON 0x0098 Serial Channel 0 Control Reg.
|
|
S0BUF 0x0099 Serial Channel 0 Buffer Reg.
|
|
IEN2 0x009A Interrupt Enable Register 2
|
|
S1CON 0x009B Serial Channel 1 Control Reg.
|
|
S1BUF 0x009C Serial Channel 1 Buffer Reg.,
|
|
S1REL 0x009D Serial Channel 1 Reload Reg., low byte
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IP0 0x00A9 Interrupt Priority Register 0
|
|
S0RELL 0x00AA Serial Channel 0, Reload Reg., low byte
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
RESERVED00B1 0x00B1 RESERVED
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IEN1 0x00B8 Interrupt Enable Register 1
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
S0RELH 0x00BA Serial Channel 0, Reload Reg., high byte
|
|
S1RELH 0x00BB Serial Channel 1, Reload Reg.,high byte
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
IRCON 0x00C0 Interrupt Request Control Register
|
|
CCEN 0x00C1 Comp./Capture Enable Reg.
|
|
CCL1 0x00C2 Comp./Capture Reg. 1, Low Byte
|
|
CCH1 0x00C3 Comp./Capture Reg. 1, High Byte
|
|
CCL2 0x00C4 Comp./Capture Reg. 2, Low Byte
|
|
CCH2 0x00C5 Comp./Capture Reg. 2, High Byte
|
|
CCL3 0x00C6 Comp./Capture Reg. 3, Low Byte
|
|
CCH3 0x00C7 Comp./Capture Reg. 3, High Byte
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
CC4EN 0x00C9 Comp./Capture Enable 4 Reg.
|
|
CRCL 0x00CA Com./Rel./Capt. Reg. Low Byte
|
|
CRCH 0x00CB Com./Rel./Capt. Reg. High Byte
|
|
TL2 0x00CC Timer 2, Low Byte
|
|
TH2 0x00CD Timer 2, High Byte
|
|
CCL4 0x00CE Comp./Capture Reg. 4, Low Byte
|
|
CCH4 0x00CF Comp./Capture Reg. 4, High Byte
|
|
PSW 0x00D0 Program Status Word Register
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
CML0 0x00D2 Compare Register 0, Low Byte
|
|
CMH0 0x00D3 Compare Register 0, High Byte
|
|
CML1 0x00D4 Compare Register 1, Low Byte
|
|
CMH1 0x00D5 Compare Register 1, High Byte
|
|
CML2 0x00D6 Compare Register 2, Low Byte
|
|
CMH2 0x00D7 Compare Register 2, High Byte
|
|
ADCON0 0x00D8 A/D Converter Control Register 0
|
|
ADDAT 0x00D9 A/D Converter Data Register
|
|
DAPR 0x00DA D/AConverter Program Register
|
|
P7 0x00DB Port 7, Analog/Digital Input
|
|
ADCON1 0x00DC A/D Converter Control Register 1
|
|
P8 0x00DD Port 8, Analog/Digital Input, 4-bit 0DD
|
|
CTRELL 0x00DE Com. Timer Rel. Reg., Low Byte
|
|
CTRELH 0x00DF Com. Timer Rel. Reg., High Byte
|
|
ACC 0x00E0 Accumulator
|
|
CTCON 0x00E1 Com. Timer Control Register
|
|
CML3 0x00E2 Compare Register 3, Low Byte
|
|
CMH3 0x00E3 Compare Register 3, High Byte
|
|
CML4 0x00E4 Compare Register 4, Low Byte
|
|
CMH4 0x00E5 Compare Register 4, High Byte
|
|
CML5 0x00E6 Compare Register 5, Low Byte
|
|
CMH5 0x00E7 Compare Register 5, High Byte
|
|
P4 0x00E8 Port 4
|
|
MD0 0x00E9 Multiplication/Division Register 0
|
|
MD1 0x00EA Multiplication/Division Register 1
|
|
MD2 0x00EB Multiplication/Division Register 2
|
|
MD3 0x00EC Multiplication/Division Register 3
|
|
MD4 0x00ED Multiplication/Division Register 4
|
|
MD5 0x00EE Multiplication/Division Register 5
|
|
ARCON 0x00EF Arithmetic Control Register
|
|
B 0x00F0 B-Register
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
CML6 0x00F2 Compare Register 6, Low Byte
|
|
CMH6 0x00F3 Compare Register 6, High Byte
|
|
CML7 0x00F4 Compare Register 7, Low Byte
|
|
CMH7 0x00F5 Compare Register 7, High Byte
|
|
CMEN 0x00F6 Compare Enable Register
|
|
CMSEL 0x00F7 Compare Input Select
|
|
P5 0x00F8 Port 5
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
P6 0x00FA Port 6
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FE 0x00FE RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
|
|
.C541U
|
|
; http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=28987&parent_oid=12071
|
|
; SAB-C541U-1EN.pdf
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry TC_WCOL 0x0043 SSC Interrupt
|
|
entry EPIR0_4 0x004B USB Endpoint Interrupt
|
|
entry DIRR 0x0053 USB Device Interrupt
|
|
entry WAKE_UP 0x007B Wake-up from power down
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
WDTREL 0x0086 Watchdog Timer Reload Register
|
|
WDTREL.WDTPSEL 7
|
|
WDTREL.WDTREL6 6
|
|
WDTREL.WDTREL5 5
|
|
WDTREL.WDTREL4 4
|
|
WDTREL.WDTREL3 3
|
|
WDTREL.WDTREL2 2
|
|
WDTREL.WDTREL1 1
|
|
WDTREL.WDTREL0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
; PCON1 0x0088 Power Control Register 1
|
|
; PCON1.EWPD 7
|
|
; PCON1.WS 4
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.P17 7
|
|
P1.P16 6
|
|
P1.SLS 5
|
|
P1.STO 4
|
|
P1.SRI 3
|
|
P1.SCLK 2
|
|
P1.LED1 1
|
|
P1.LED0 0
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
SSCCON 0x0093 SSC Control Register
|
|
SSCCON.SCEN 7
|
|
SSCCON.TEN 6
|
|
SSCCON.MSTR 5
|
|
SSCCON.CPOL 4
|
|
SSCCON.CPHA 3
|
|
SSCCON.BRS2 2
|
|
SSCCON.BRS1 1
|
|
SSCCON.BRS0 0
|
|
STB 0x0094 SSC Transmit Buffer
|
|
STB.STB7 7
|
|
STB.STB6 6
|
|
STB.STB5 5
|
|
STB.STB4 4
|
|
STB.STB3 3
|
|
STB.STB2 2
|
|
STB.STB1 1
|
|
STB.STB0 0
|
|
SRB 0x0095 SSC Receive Register
|
|
SRB.SRB7 7
|
|
SRB.SRB6 6
|
|
SRB.SRB5 5
|
|
SRB.SRB4 4
|
|
SRB.SRB3 3
|
|
SRB.SRB2 2
|
|
SRB.SRB1 1
|
|
SRB.SRB0 0
|
|
SSCMOD 0x0096 SSC Mode Test Register
|
|
SSCMOD.LOOPB 7
|
|
SSCMOD.TRIO 6
|
|
SSCMOD.LSBSM 0
|
|
RESERVED0097 0x0097 RESERVED
|
|
RESERVED0098 0x0098 RESERVED
|
|
RESERVED0099 0x0099 RESERVED
|
|
ITCON 0x009A External Interrupt Trigger Condition Register
|
|
ITCON.I1ETF 3
|
|
ITCON.I1ETR 2
|
|
ITCON.I0ETF 1
|
|
ITCON.I0ETR 0
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IEN0 0x00A8 Interrupt Enable Register 0
|
|
IEN0.ET1 3
|
|
IEN0.EX1 2
|
|
IEN0.ET0 1
|
|
IEN0.EX0 0
|
|
IEN1 0x00A9 Interrupt Enable Register 1
|
|
IEN1.EUDI 2
|
|
IEN1.EUEI 1
|
|
IEN1.ESSC 0
|
|
RESERVED00AA 0x00AA RESERVED
|
|
SCF 0x00AB SSC Flag Register
|
|
SCF.WCOL 1
|
|
SCF.TC 0
|
|
SCIEN 0x00AC SSC Interrupt Enable Register
|
|
SCIEN.WCEN 1
|
|
SCIEN.TCEN 0
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.DADD 1
|
|
P3.LED2 0
|
|
SYSCON 0x00B1 System Control Register
|
|
SYSCON.EALE 5
|
|
SYSCON.RMAP 4 Special function register map bit
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IP0 0x00B8 Interrupt Priority Register 0
|
|
IP0.PT1 3
|
|
IP0.PX1 2
|
|
IP0.PT0 1
|
|
IP0.PX0 0
|
|
IP1 0x00B9 Interrupt Priority Register 1
|
|
IP1.PUDI 2
|
|
IP1.PUEI 1
|
|
IP1.PSSC 0
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
WDCON 0x00C0 Watchdog Timer Control Register
|
|
WDCON.OWDS 3
|
|
WDCON.WDTS 2
|
|
WDCON.WDT 1
|
|
WDCON.SWDT 0
|
|
; FOR EPSEL = 1XXX.XXXX B Device Registers
|
|
DCR 0x00C1 USB Device Control Register
|
|
DCR.SPEED 7
|
|
DCR.DA 6
|
|
DCR.SWR 5
|
|
DCR.SUSP 4
|
|
DCR.DINIT 3
|
|
DCR.RSM 2
|
|
DCR.UCLK 1
|
|
DCR.PCLK 0
|
|
DPWDR 0x00C2 USB Device Power Down Register
|
|
DPWDR.DRVIE 7
|
|
DPWDR.XVREG 6
|
|
DPWDR.TPWD 1
|
|
DPWDR.RPWD 0
|
|
DIER 0x00C3 USB Device Interrupt Control Register
|
|
DIER.SE0IE 7
|
|
DIER.DAIE 6
|
|
DIER.DDIE 5
|
|
DIER.SBIE 4
|
|
DIER.SEIE 3
|
|
DIER.STIE 2
|
|
DIER.SUIE 1
|
|
DIER.SOFIE 0
|
|
DIRR 0x00C4 USB Device Interrupt Request Register
|
|
DIRR.SE0I 7
|
|
DIRR.DAI 6
|
|
DIRR.DDI 5
|
|
DIRR.SBI 4
|
|
DIRR.SEI 3
|
|
DIRR.STI 2
|
|
DIRR.SUI 1
|
|
DIRR.SOFI 0
|
|
RESERVED00C5 0x00C5 RESERVED
|
|
FNRL 0x00C6 USB Frame Number Register, Low Byte
|
|
FNRL.FNR7 7
|
|
FNRL.FNR6 6
|
|
FNRL.FNR5 5
|
|
FNRL.FNR4 4
|
|
FNRL.FNR3 3
|
|
FNRL.FNR2 2
|
|
FNRL.FNR1 1
|
|
FNRL.FNR0 0
|
|
FNRH 0x00C7 USB Frame Number Register, High Byte
|
|
FNRH.FNR10 2
|
|
FNRH.FNR9 1
|
|
FNRH.FNR8 0
|
|
; FOR EPSEL = 0XXX.X000 B Endpoint 0 Registers
|
|
; EPBC0 0x00C1 USB Endpoint 0 Buffer Control Register
|
|
; EPBC0.STALL0 7
|
|
; EPBC0.GEPIE0 4
|
|
; EPBC0.SOFDE0 3
|
|
; EPBC0.INCE0 2
|
|
; EPBC0.DBM0 0
|
|
; EPBS0 0x00C2 USB Endpoint 0 Buffer Status Register
|
|
; EPBS0.UBF0 7
|
|
; EPBS0.CBF0 6
|
|
; EPBS0.DIR0 5
|
|
; EPBS0.ESP0 4
|
|
; EPBS0.SETRD0 3
|
|
; EPBS0.SETWR0 2
|
|
; EPBS0.CLREP0 1
|
|
; EPBS0.DONE0 0
|
|
; EPIE0 0x00C3 USB Endpoint 0 Interrupt Enable Register
|
|
; EPIE0.AIE0 7
|
|
; EPIE0.NAIE0 6
|
|
; EPIE0.RLEIE0 5
|
|
; EPIE0.DNRIE0 3
|
|
; EPIE0.NODIE0 2
|
|
; EPIE0.EODIE0 1
|
|
; EPIE0.SODIE0 0
|
|
; EPIR0 0x00C4 USB Endpoint 0 Interrupt Request Register
|
|
; EPIR0.ACK0 7
|
|
; EPIR0.NACK0 6
|
|
; EPIR0.RLE0 5
|
|
; EPIR0.DNR0 3
|
|
; EPIR0.NOD0 2
|
|
; EPIR0.EOD0 1
|
|
; EPIR0.SOD0 0
|
|
; EPBA0 0x00C5 USB Endpoint 0 Base Address Register
|
|
; EPBA0.PAGE0 7
|
|
; EPBA0.A06 3
|
|
; EPBA0.A05 2
|
|
; EPBA0.A04 1
|
|
; EPBA0.A03 0
|
|
; EPLEN0 0x00C6 USB Endpoint 0 Buffer Length Register
|
|
; EPLEN0.L06 6
|
|
; EPLEN0.L05 5
|
|
; EPLEN0.L04 4
|
|
; EPLEN0.L03 3
|
|
; EPLEN0.L02 2
|
|
; EPLEN0.L01 1
|
|
; EPLEN0.L00 0
|
|
; RESERVED00C7 0x00C7 RESERVED
|
|
; FOR EPSEL = 0XXX.X001 B Endpoint 1 Registers
|
|
; EPBC1 0x00C1 USB Endpoint 1 Buffer Control Register
|
|
; EPBC1.STALL1 7
|
|
; EPBC1.GEPIE1 4
|
|
; EPBC1.SOFDE1 3
|
|
; EPBC1.INCE1 2
|
|
; EPBC1.DBM1 0
|
|
; EPBS1 0x00C2 USB Endpoint 1 Buffer Status Register
|
|
; EPBS1.UBF1 7
|
|
; EPBS1.CBF1 6
|
|
; EPBS1.DIR1 5
|
|
; EPBS1.ESP1 4
|
|
; EPBS1.SETRD1 3
|
|
; EPBS1.SETWR1 2
|
|
; EPBS1.CLREP1 1
|
|
; EPBS1.DONE1 0
|
|
; EPIE1 0x00C3 USB Endpoint 1 Interrupt Enable Register
|
|
; EPIE1.AIE1 7
|
|
; EPIE1.NAIE1 6
|
|
; EPIE1.RLEIE1 5
|
|
; EPIE1.DNRIE1 3
|
|
; EPIE1.NODIE1 2
|
|
; EPIE1.EODIE1 1
|
|
; EPIE1.SODIE1 0
|
|
; EPIR1 0x00C4 USB Endpoint 1 Interrupt Request Register
|
|
; EPIR1.ACK1 7
|
|
; EPIR1.NACK1 6
|
|
; EPIR1.RLE1 5
|
|
; EPIR1.DNR1 3
|
|
; EPIR1.NOD1 2
|
|
; EPIR1.EOD1 1
|
|
; EPIR1.SOD1 0
|
|
; EPBA1 0x00C5 USB Endpoint 1 Base Address Register
|
|
; EPBA1.PAGE1 7
|
|
; EPBA1.A16 3
|
|
; EPBA1.A15 2
|
|
; EPBA1.A14 1
|
|
; EPBA1.A13 0
|
|
; EPLEN1 0x00C6 USB Endpoint 1 Buffer Length Register
|
|
; EPLEN1.L16 6
|
|
; EPLEN1.L15 5
|
|
; EPLEN1.L14 4
|
|
; EPLEN1.L13 3
|
|
; EPLEN1.L12 2
|
|
; EPLEN1.L11 1
|
|
; EPLEN1.L10 0
|
|
; RESERVED00C7 0x00C7 RESERVED
|
|
; FOR EPSEL = 0XXX.X010 B Endpoint 2 Registers
|
|
; EPBC2 0x00C1 USB Endpoint 2 Buffer Control Register
|
|
; EPBC2.STALL2 7
|
|
; EPBC2.GEPIE2 4
|
|
; EPBC2.SOFDE2 3
|
|
; EPBC2.INCE2 2
|
|
; EPBC2.DBM2 0
|
|
; EPBS2 0x00C2 USB Endpoint 2 Buffer Status Register
|
|
; EPBS2.UBF2 7
|
|
; EPBS2.CBF2 6
|
|
; EPBS2.DIR2 5
|
|
; EPBS2.ESP2 4
|
|
; EPBS2.SETRD2 3
|
|
; EPBS2.SETWR2 2
|
|
; EPBS2.CLREP2 1
|
|
; EPBS2.DONE2 0
|
|
; EPIE2 0x00C3 USB Endpoint 2 Interrupt Enable Register
|
|
; EPIE2.AIE2 7
|
|
; EPIE2.NAIE2 6
|
|
; EPIE2.RLEIE2 5
|
|
; EPIE2.DNRIE2 3
|
|
; EPIE2.NODIE2 2
|
|
; EPIE2.EODIE2 1
|
|
; EPIE2.SODIE2 0
|
|
; EPIR2 0x00C4 USB Endpoint 2 Interrupt Request Register
|
|
; EPIR2.ACK2 7
|
|
; EPIR2.NACK2 6
|
|
; EPIR2.NACK2 5
|
|
; EPIR2.DNR2 3
|
|
; EPIR2.NOD2 2
|
|
; EPIR2.EOD2 1
|
|
; EPIR2.SOD2 0
|
|
; EPBA2 0x00C5 USB Endpoint 2 Base Address Register
|
|
; EPBA2.PAGE2 7
|
|
; EPBA2.A62 3
|
|
; EPBA2.A52 2
|
|
; EPBA2.A42 1
|
|
; EPBA2.A32 0
|
|
; EPLEN2 0x00C6 USB Endpoint 2 Buffer Length Register
|
|
; EPLEN2.L62 6
|
|
; EPLEN2.L52 5
|
|
; EPLEN2.L42 4
|
|
; EPLEN2.L32 3
|
|
; EPLEN2.L22 2
|
|
; EPLEN2.L12 1
|
|
; EPLEN2.L02 0
|
|
; RESERVED00C7 0x00C7 RESERVED
|
|
; FOR EPSEL = 0XXX.X011 B Endpoint 3 Registers
|
|
; EPBC3 0x00C1 USB Endpoint 3 Buffer Control Register
|
|
; EPBC3.STALL3 7
|
|
; EPBC3.GEPIE3 4
|
|
; EPBC3.SOFDE3 3
|
|
; EPBC3.INCE3 2
|
|
; EPBC3.DBM3 0
|
|
; EPBS3 0x00C2 USB Endpoint 3 Buffer Status Register
|
|
; EPBS3.UBF3 7
|
|
; EPBS3.CBF3 6
|
|
; EPBS3.DIR3 5
|
|
; EPBS3.ESP3 4
|
|
; EPBS3.SETRD3 3
|
|
; EPBS3.SETWR3 2
|
|
; EPBS3.CLREP3 1
|
|
; EPBS3.DONE3 0
|
|
; EPIE3 0x00C3 USB Endpoint 3 Interrupt Enable Register
|
|
; EPIE3.AIE3 7
|
|
; EPIE3.NAIE3 6
|
|
; EPIE3.RLEIE3 5
|
|
; EPIE3.DNRIE3 3
|
|
; EPIE3.NODIE3 2
|
|
; EPIE3.EODIE3 1
|
|
; EPIE3.SODIE3 0
|
|
; EPIR3 0x00C4 USB Endpoint 3 Interrupt Request Register
|
|
; EPIR3.ACK3 7
|
|
; EPIR3.NACK3 6
|
|
; EPIR3.RLE3 5
|
|
; EPIR3.DNR3 3
|
|
; EPIR3.NOD3 2
|
|
; EPIR3.EOD3 1
|
|
; EPIR3.SOD3 0
|
|
; EPBA3 0x00C5 USB Endpoint 3 Base Address Register
|
|
; EPBA3.PAGE3 7
|
|
; EPBA3.A63 3
|
|
; EPBA3.A52 2
|
|
; EPBA3.A43 1
|
|
; EPBA3.A33 0
|
|
; EPLEN3 0x00C6 USB Endpoint 3 Buffer Length Register
|
|
; EPLEN3.L63 6
|
|
; EPLEN3.L53 5
|
|
; EPLEN3.L43 4
|
|
; EPLEN3.L33 3
|
|
; EPLEN3.L23 2
|
|
; EPLEN3.L13 1
|
|
; EPLEN3.L03 0
|
|
; RESERVED00C7 0x00C7 RESERVED
|
|
; FOR EPSEL = 0XXX.X100 B Endpoint 4 Registers
|
|
; EPBC4 0x00C1 USB Endpoint 4 Buffer Control Register
|
|
; EPBC4.STALL4 7
|
|
; EPBC4.GEPIE4 4
|
|
; EPBC4.SOFDE4 3
|
|
; EPBC4.INCE4 2
|
|
; EPBC4.DBM4 0
|
|
; EPBS4 0x00C2 USB Endpoint 4 Buffer Status Register
|
|
; EPBS4.UBF4 7
|
|
; EPBS4.CBF4 6
|
|
; EPBS4.DIR4 5
|
|
; EPBS4.ESP4 4
|
|
; EPBS4.SETRD4 3
|
|
; EPBS4.SETWR4 2
|
|
; EPBS4.CLREP4 1
|
|
; EPBS4.DONE4 0
|
|
; EPIE4 0x00C3 USB Endpoint 4 Interrupt Enable Register
|
|
; EPIE4.AIE4 7
|
|
; EPIE4.NAIE4 6
|
|
; EPIE4.RLEIE4 5
|
|
; EPIE4.DNRIE4 3
|
|
; EPIE4.NODIE4 2
|
|
; EPIE4.EODIE4 1
|
|
; EPIE4.SODIE4 0
|
|
; EPIR4 0x00C4 USB Endpoint 4 Interrupt Request Register
|
|
; EPIR4.ACK4 7
|
|
; EPIR4.NACK4 6
|
|
; EPIR4.RLE4 5
|
|
; EPIR4.DNR4 3
|
|
; EPIR4.NOD4 2
|
|
; EPIR4.EOD4 1
|
|
; EPIR4.SOD4 0
|
|
; EPBA4 0x00C5 USB Endpoint 4 Base Address Register
|
|
; EPBA4.PAGE4 7
|
|
; EPBA4.A64 3
|
|
; EPBA4.A54 2
|
|
; EPBA4.A44 1
|
|
; EPBA4.A34 0
|
|
; EPLEN4 0x00C6 USB Endpoint 4 Buffer Length Register
|
|
; EPLEN4.L64 6
|
|
; EPLEN4.L54 5
|
|
; EPLEN4.L44 4
|
|
; EPLEN4.L34 3
|
|
; EPLEN4.L24 2
|
|
; EPLEN4.L14 1
|
|
; EPLEN4.L04 0
|
|
; RESERVED00C7 0x00C7 RESERVED
|
|
RESERVED00C8 0x00C8 RESERVED
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
RESERVED00CA 0x00CA RESERVED
|
|
RESERVED00CB 0x00CB RESERVED
|
|
RESERVED00CC 0x00CC RESERVED
|
|
RESERVED00CD 0x00CD RESERVED
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7 Carry Flag
|
|
PSW.AC 6 Auxiliary Carry Flag
|
|
PSW.F0 5 General Purpose Flag
|
|
PSW.RS1 4 Register Bank Select Control Bit 1
|
|
PSW.RS0 3 Register Bank Select Control Bit 0
|
|
PSW.OV 2 Overflow Flag
|
|
PSW.F1 1 General Purpose Flag
|
|
PSW.P 0 Parity Flag
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
EPSEL 0x00D2 USB Endpoint Select Register
|
|
EPSEL.EPS7 7
|
|
EPSEL.EPS2 2
|
|
EPSEL.EPS1 1
|
|
EPSEL.EPS0 0
|
|
USBVAL 0x00D3 USB Data Register
|
|
USBVAL.USBVAL7 7
|
|
USBVAL.USBVAL6 6
|
|
USBVAL.USBVAL5 5
|
|
USBVAL.USBVAL4 4
|
|
USBVAL.USBVAL3 3
|
|
USBVAL.USBVAL2 2
|
|
USBVAL.USBVAL1 1
|
|
USBVAL.USBVAL0 0
|
|
ADROFF 0x00D4 USB Address Offset Register
|
|
ADROFF.AO5 5
|
|
ADROFF.AO4 4
|
|
ADROFF.AO3 3
|
|
ADROFF.AO2 2
|
|
ADROFF.AO1 1
|
|
ADROFF.AO0 0
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
GEPIR 0x00D6 USB Global Endpoint Interrupt Request Reg.
|
|
GEPIR.DRVI 7
|
|
GEPIR.EPI4 4
|
|
GEPIR.EPI3 3
|
|
GEPIR.EPI2 2
|
|
GEPIR.EPI1 1
|
|
GEPIR.EPI0 0
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
RESERVED00D8 0x00D8 RESERVED
|
|
RESERVED00D9 0x00D9 RESERVED
|
|
RESERVED00DA 0x00DA RESERVED
|
|
RESERVED00DB 0x00DB RESERVED
|
|
RESERVED00DC 0x00DC RESERVED
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
USBPWD 0x00E6 USB Power Down Register
|
|
USBPWD.SUSPIE 5
|
|
USBPWD.DADDIE 4
|
|
USBPWD.SUSP 3
|
|
USBPWD.DADD 2
|
|
USBPWD.TPWD 1
|
|
USBPWD.RPWD 0
|
|
USBDCR 0x00E7 USB Control Register
|
|
USBDCR.TYPE3 7
|
|
USBDCR.TYPE2 6
|
|
USBDCR.TYPE1 5
|
|
USBDCR.TYPE0 4
|
|
USBDCR.LEN3 3
|
|
USBDCR.LEN2 2
|
|
USBDCR.LEN1 1
|
|
USBDCR.LEN0 0
|
|
USBDR0 0x00E8 USB Data Register 0
|
|
USBDR0.USBDR07 7
|
|
USBDR0.USBDR06 6
|
|
USBDR0.USBDR05 5
|
|
USBDR0.USBDR04 4
|
|
USBDR0.USBDR03 3
|
|
USBDR0.USBDR02 2
|
|
USBDR0.USBDR01 1
|
|
USBDR0.USBDR00 0
|
|
USBDR1 0x00E9 USB Data Register 1
|
|
USBDR1.USBDR17 7
|
|
USBDR1.USBDR16 6
|
|
USBDR1.USBDR15 5
|
|
USBDR1.USBDR14 4
|
|
USBDR1.USBDR13 3
|
|
USBDR1.USBDR12 2
|
|
USBDR1.USBDR11 1
|
|
USBDR1.USBDR10 0
|
|
USBDR2 0x00EA USB Data Register 2
|
|
USBDR2.USBDR27 7
|
|
USBDR2.USBDR26 6
|
|
USBDR2.USBDR25 5
|
|
USBDR2.USBDR24 4
|
|
USBDR2.USBDR23 3
|
|
USBDR2.USBDR22 2
|
|
USBDR2.USBDR21 1
|
|
USBDR2.USBDR20 0
|
|
USBDR3 0x00EB USB Data Register 3
|
|
USBDR3.USBDR37 7
|
|
USBDR3.USBDR36 6
|
|
USBDR3.USBDR35 5
|
|
USBDR3.USBDR34 4
|
|
USBDR3.USBDR33 3
|
|
USBDR3.USBDR32 2
|
|
USBDR3.USBDR31 1
|
|
USBDR3.USBDR30 0
|
|
USBDR4 0x00EC USB Data Register 4
|
|
USBDR4.USBDR47 7
|
|
USBDR4.USBDR46 6
|
|
USBDR4.USBDR45 5
|
|
USBDR4.USBDR44 4
|
|
USBDR4.USBDR43 3
|
|
USBDR4.USBDR42 2
|
|
USBDR4.USBDR41 1
|
|
USBDR4.USBDR40 0
|
|
USBDR5 0x00ED USB Data Register 5
|
|
USBDR5.USBDR57 7
|
|
USBDR5.USBDR56 6
|
|
USBDR5.USBDR55 5
|
|
USBDR5.USBDR54 4
|
|
USBDR5.USBDR53 3
|
|
USBDR5.USBDR52 2
|
|
USBDR5.USBDR51 1
|
|
USBDR5.USBDR50 0
|
|
USBDR6 0x00EE USB Data Register 6
|
|
USBDR6.USBDR67 7
|
|
USBDR6.USBDR66 6
|
|
USBDR6.USBDR65 5
|
|
USBDR6.USBDR64 4
|
|
USBDR6.USBDR63 3
|
|
USBDR6.USBDR62 2
|
|
USBDR6.USBDR61 1
|
|
USBDR6.USBDR60 0
|
|
USBDR7 0x00EF USB Data Register 7
|
|
USBDR7.USBDR77 7
|
|
USBDR7.USBDR76 6
|
|
USBDR7.USBDR75 5
|
|
USBDR7.USBDR74 4
|
|
USBDR7.USBDR73 3
|
|
USBDR7.USBDR72 2
|
|
USBDR7.USBDR71 1
|
|
USBDR7.USBDR70 0
|
|
B 0x00F0 B Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
VR0 0x00FC Version Register 0
|
|
VR1 0x00FD Version Register 1
|
|
VR2 0x00FE Version Register 2
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
.AT89S8252
|
|
; http://www.atmel.com/atmel/acrobat/doc0401.pdf
|
|
;
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x2000
|
|
area DATA RAM 0x0000:0x0100
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DP0L 0x0082 Data Pointer Low Byte
|
|
DP0H 0x0083 Data Pointer High Byte
|
|
DP1L 0x0084 Data Pointer 1 Low Byte
|
|
DP1H 0x0085 Data Pointer 1 High Byte
|
|
SPDR 0x0086 SPI Data Register
|
|
PCON 0x0087 Power Control Register
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Control Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0 Low Byte
|
|
TL1 0x008B Timer 1 Low Byte
|
|
TH0 0x008c Timer 0 High Byte
|
|
TH1 0x008D Timer 1 High Byte
|
|
|
|
P1 0x0090 Port 1
|
|
WMCON 0x0096 Watchdog and Memory Control Register
|
|
SCON 0x0098 Serial Port Control
|
|
SBUF 0x0099 Serial Port Buffer
|
|
|
|
P2 0x00A0 Port 2
|
|
IE 0x00A8 Interrupt Enable Register 0
|
|
IE.EA 7
|
|
IE.ET2 5
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
SPSR 0x00AA SPI Status Register , different to AT89C52
|
|
|
|
P3 0x00B0 Port 3
|
|
IP 0x00B8 Interrupt Priority Register
|
|
|
|
T2CON 0x00C8 Timer 2 Control
|
|
T2MOD 0x00C9 Timer 2 Mode
|
|
RCAP2L 0x00CA Timer 2 Capture Low Byte
|
|
RCAP2H 0x00CB Timer 2 Capture High Byte
|
|
TL2 0x00CC Timer 2 Low Byte
|
|
TH2 0x00CD Timer 2 High Byte
|
|
|
|
PSW 0x00D0 Program Status Word
|
|
SPCR 0x00D5 SPI Control Register
|
|
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
B 0x00F0 B Register
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
.AT89C2051
|
|
; http://www.atmel.com/atmel/acrobat/doc0368.pdf
|
|
;
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x0800
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 interrupt
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 interrupt
|
|
entry RI_TI 0x0023 Serial port interrupt
|
|
entry TF2_EXF2 0x002B Timer 2 interrupt
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
|
|
DPL 0x0082 Data Pointer Low Byte
|
|
DPH 0x0083 Data Pointer High Byte
|
|
|
|
PCON 0x0087 Power Control Register
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
|
|
TMOD 0x0089 Timer Mode Control Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
|
|
TL0 0x008A Timer 0 Low Byte
|
|
TL1 0x008B Timer 1 Low Byte
|
|
TH0 0x008c Timer 0 High Byte
|
|
TH1 0x008D Timer 1 High Byte
|
|
|
|
P1 0x0090 Port 1
|
|
P1.P17 7
|
|
P1.P16 6
|
|
P1.P15 5
|
|
P1.P14 4
|
|
P1.P13 3
|
|
P1.P12 2
|
|
P1.P11 1
|
|
P1.P10 0
|
|
|
|
SCON 0x0098 Serial Port Control
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
|
|
SBUF 0x0099 Serial Port Buffer
|
|
|
|
IE 0x00A8 Interrupt Enable Register 0
|
|
IE.EA 7
|
|
IE.ET2 5
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
|
|
P3 0x00B0 Port 3
|
|
P3.P37 7
|
|
P3.P36 6
|
|
P3.P35 5
|
|
P3.P34 4
|
|
P3.P33 3
|
|
P3.P32 2
|
|
P3.P31 1
|
|
P3.P30 0
|
|
|
|
IP 0x00B8 Interrupt Priority Register
|
|
IP.PS 4
|
|
IP.PT1 3
|
|
IP.PX1 2
|
|
IP.PT0 1
|
|
IP.PX0 0
|
|
|
|
PSW 0x00D0 Program Status Word
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.P 0
|
|
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
|
|
B 0x00F0 B Register
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
.8032
|
|
; http://www.keil.com/dd/docs/c51/reg52.h
|
|
|
|
|
|
; MEMORY MAP
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0100
|
|
area DATA FSR 0x0080:0x0100
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External Interrupt 0
|
|
entry TF0 0x000B Timer 0 Overflow
|
|
entry IE1 0x0013 External Interrupt 1
|
|
entry TF1 0x001B Timer 1 Overflow
|
|
entry RI_TI 0x0023 Serial port interrupt
|
|
entry TF2_EXF2 0x002B Timer 2 Overflow or TX2 Pin
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
P0 0x0080 Port 0
|
|
P0.P07 7
|
|
P0.P06 6
|
|
P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
SP.SP7 7
|
|
SP.SP6 6
|
|
SP.SP5 5
|
|
SP.SP4 4
|
|
SP.SP3 3
|
|
SP.SP2 2
|
|
SP.SP1 1
|
|
SP.SP0 0
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPL.DPL7 7
|
|
DPL.DPL6 6
|
|
DPL.DPL5 5
|
|
DPL.DPL4 4
|
|
DPL.DPL3 3
|
|
DPL.DPL2 2
|
|
DPL.DPL1 1
|
|
DPL.DPL0 0
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
DPH.DPH7 7
|
|
DPH.DPH6 6
|
|
DPH.DPH5 5
|
|
DPH.DPH4 4
|
|
DPH.DPH3 3
|
|
DPH.DPH2 2
|
|
DPH.DPH1 1
|
|
DPH.DPH0 0
|
|
RESERVED0084 0x0084 RESERVED
|
|
RESERVED0085 0x0085 RESERVED
|
|
RESERVED0086 0x0086 RESERVED
|
|
PCON 0x0087 Power Control Register
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL0.TL07 7
|
|
TL0.TL06 6
|
|
TL0.TL05 5
|
|
TL0.TL04 4
|
|
TL0.TL03 3
|
|
TL0.TL02 2
|
|
TL0.TL01 1
|
|
TL0.TL00 0
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TL1.TL17 7
|
|
TL1.TL16 6
|
|
TL1.TL15 5
|
|
TL1.TL14 4
|
|
TL1.TL13 3
|
|
TL1.TL12 2
|
|
TL1.TL11 1
|
|
TL1.TL10 0
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH0.TH07 7
|
|
TH0.TH06 6
|
|
TH0.TH05 5
|
|
TH0.TH04 4
|
|
TH0.TH03 3
|
|
TH0.TH02 2
|
|
TH0.TH01 1
|
|
TH0.TH00 0
|
|
TH1 0x008D Timer 1, High Byte
|
|
TH1.TH17 7
|
|
TH1.TH16 6
|
|
TH1.TH15 5
|
|
TH1.TH14 4
|
|
TH1.TH13 3
|
|
TH1.TH12 2
|
|
TH1.TH11 1
|
|
TH1.TH10 0
|
|
RESERVED008E 0x008E RESERVED
|
|
RESERVED008F 0x008F RESERVED
|
|
P1 0x0090 Port 1
|
|
P1.P17 7
|
|
P1.P16 6
|
|
P1.SLS 5
|
|
P1.STO 4
|
|
P1.SRI 3
|
|
P1.SCLK 2
|
|
P1.T2EX 1
|
|
P1.T2 0
|
|
RESERVED0091 0x0091 RESERVED
|
|
RESERVED0092 0x0092 RESERVED
|
|
RESERVED0093 0x0093 RESERVED
|
|
RESERVED0094 0x0094 RESERVED
|
|
RESERVED0095 0x0095 RESERVED
|
|
RESERVED0096 0x0096 RESERVED
|
|
RESERVED0097 0x0097 RESERVED
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM2 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
SBUF.SBUF7 7
|
|
SBUF.SBUF6 6
|
|
SBUF.SBUF5 5
|
|
SBUF.SBUF4 4
|
|
SBUF.SBUF3 3
|
|
SBUF.SBUF2 2
|
|
SBUF.SBUF1 1
|
|
SBUF.SBUF0 0
|
|
RESERVED009A 0x009A RESERVED
|
|
RESERVED009B 0x009B RESERVED
|
|
RESERVED009C 0x009C RESERVED
|
|
RESERVED009D 0x009D RESERVED
|
|
RESERVED009E 0x009E RESERVED
|
|
RESERVED009F 0x009F RESERVED
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
RESERVED00A1 0x00A1 RESERVED
|
|
RESERVED00A2 0x00A2 RESERVED
|
|
RESERVED00A3 0x00A3 RESERVED
|
|
RESERVED00A4 0x00A4 RESERVED
|
|
RESERVED00A5 0x00A5 RESERVED
|
|
RESERVED00A6 0x00A6 RESERVED
|
|
RESERVED00A7 0x00A7 RESERVED
|
|
IE 0x00A8
|
|
IE.EA 7
|
|
IE.ET2 5
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
RESERVED00A9 0x00A9 RESERVED
|
|
RESERVED00AA 0x00AA RESERVED
|
|
RESERVED00AB 0x00AB RESERVED
|
|
RESERVED00AC 0x00AC RESERVED
|
|
RESERVED00AD 0x00AD RESERVED
|
|
RESERVED00AE 0x00AE RESERVED
|
|
RESERVED00AF 0x00AF RESERVED
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TXD 1
|
|
P3.RXD 0
|
|
RESERVED00B1 0x00B1 RESERVED
|
|
RESERVED00B2 0x00B2 RESERVED
|
|
RESERVED00B3 0x00B3 RESERVED
|
|
RESERVED00B4 0x00B4 RESERVED
|
|
RESERVED00B5 0x00B5 RESERVED
|
|
RESERVED00B6 0x00B6 RESERVED
|
|
RESERVED00B7 0x00B7 RESERVED
|
|
IP 0x00B8 Interrupt Priority Register 0
|
|
IP.PT2 5
|
|
IP.PS0 4
|
|
IP.PT1 3
|
|
IP.PX1 2
|
|
IP.PT0 1
|
|
IP.PX0 0
|
|
RESERVED00B9 0x00B9 RESERVED
|
|
RESERVED00BA 0x00BA RESERVED
|
|
RESERVED00BB 0x00BB RESERVED
|
|
RESERVED00BC 0x00BC RESERVED
|
|
RESERVED00BD 0x00BD RESERVED
|
|
RESERVED00BE 0x00BE RESERVED
|
|
RESERVED00BF 0x00BF RESERVED
|
|
RESERVED00C0 0x00C0 RESERVED
|
|
RESERVED00C1 0x00C1 RESERVED
|
|
RESERVED00C2 0x00C2 RESERVED
|
|
RESERVED00C3 0x00C3 RESERVED
|
|
RESERVED00C4 0x00C4 RESERVED
|
|
RESERVED00C5 0x00C5 RESERVED
|
|
RESERVED00C6 0x00C6 RESERVED
|
|
RESERVED00C7 0x00C7 RESERVED
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.TF2 7
|
|
T2CON.EXF2 6
|
|
T2CON.RCLK 5
|
|
T2CON.TCLK 4
|
|
T2CON.EXEN2 3
|
|
T2CON.TR2 2
|
|
T2CON.C_T2 1
|
|
T2CON.CP_RL2 0
|
|
RESERVED00C9 0x00C9 RESERVED
|
|
RC2L 0x00CA Timer 2 Reload/Capture Register, Low Byte
|
|
RC2L.RC2L7 7
|
|
RC2L.RC2L6 6
|
|
RC2L.RC2L5 5
|
|
RC2L.RC2L4 4
|
|
RC2L.RC2L3 3
|
|
RC2L.RC2L2 2
|
|
RC2L.RC2L1 1
|
|
RC2L.RC2L0 0
|
|
RC2H 0x00CB Timer 2 Reload/Capture Register, High Byte
|
|
RC2H.RC2H7 7
|
|
RC2H.RC2H6 6
|
|
RC2H.RC2H5 5
|
|
RC2H.RC2H4 4
|
|
RC2H.RC2H3 3
|
|
RC2H.RC2H2 2
|
|
RC2H.RC2H1 1
|
|
RC2H.RC2H0 0
|
|
TL2 0x00CC Timer 2 Low Byte
|
|
TL2.TL27 7
|
|
TL2.TL26 6
|
|
TL2.TL25 5
|
|
TL2.TL24 4
|
|
TL2.TL23 3
|
|
TL2.TL22 2
|
|
TL2.TL21 1
|
|
TL2.TL20 0
|
|
TH2 0x00CD Timer 2 High Byte
|
|
TH2.TH27 7
|
|
TH2.TH26 6
|
|
TH2.TH25 5
|
|
TH2.TH24 4
|
|
TH2.TH23 3
|
|
TH2.TH22 2
|
|
TH2.TH21 1
|
|
TH2.TH20 0
|
|
RESERVED00CE 0x00CE RESERVED
|
|
RESERVED00CF 0x00CF RESERVED
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7 Carry Flag
|
|
PSW.AC 6 Auxiliary Carry Flag
|
|
PSW.F0 5 General Purpose Flag
|
|
PSW.RS1 4 Register Bank Select Control Bit 1
|
|
PSW.RS0 3 Register Bank Select Control Bit 0
|
|
PSW.OV 2 Overflow Flag
|
|
PSW.F1 1 General Purpose Flag
|
|
PSW.P 0 Parity Flag
|
|
RESERVED00D1 0x00D1 RESERVED
|
|
RESERVED00D2 0x00D2 RESERVED
|
|
RESERVED00D3 0x00D3 RESERVED
|
|
RESERVED00D4 0x00D4 RESERVED
|
|
RESERVED00D5 0x00D5 RESERVED
|
|
RESERVED00D6 0x00D6 RESERVED
|
|
RESERVED00D7 0x00D7 RESERVED
|
|
RESERVED00D8 0x00D8 RESERVED
|
|
RESERVED00D9 0x00D9 RESERVED
|
|
RESERVED00DA 0x00DA RESERVED
|
|
RESERVED00DB 0x00DB RESERVED
|
|
RESERVED00DC 0x00DC RESERVED
|
|
RESERVED00DD 0x00DD RESERVED
|
|
RESERVED00DE 0x00DE RESERVED
|
|
RESERVED00DF 0x00DF RESERVED
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
RESERVED00E1 0x00E1 RESERVED
|
|
RESERVED00E2 0x00E2 RESERVED
|
|
RESERVED00E3 0x00E3 RESERVED
|
|
RESERVED00E4 0x00E4 RESERVED
|
|
RESERVED00E5 0x00E5 RESERVED
|
|
RESERVED00E6 0x00E6 RESERVED
|
|
RESERVED00E7 0x00E7 RESERVED
|
|
RESERVED00E8 0x00E8 RESERVED
|
|
RESERVED00E9 0x00E9 RESERVED
|
|
RESERVED00EA 0x00EA RESERVED
|
|
RESERVED00EB 0x00EB RESERVED
|
|
RESERVED00EC 0x00EC RESERVED
|
|
RESERVED00ED 0x00ED RESERVED
|
|
RESERVED00EE 0x00EE RESERVED
|
|
RESERVED00EF 0x00EF RESERVED
|
|
B 0x00F0 B Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
RESERVED00F1 0x00F1 RESERVED
|
|
RESERVED00F2 0x00F2 RESERVED
|
|
RESERVED00F3 0x00F3 RESERVED
|
|
RESERVED00F4 0x00F4 RESERVED
|
|
RESERVED00F5 0x00F5 RESERVED
|
|
RESERVED00F6 0x00F6 RESERVED
|
|
RESERVED00F7 0x00F7 RESERVED
|
|
RESERVED00F8 0x00F8 RESERVED
|
|
RESERVED00F9 0x00F9 RESERVED
|
|
RESERVED00FA 0x00FA RESERVED
|
|
RESERVED00FB 0x00FB RESERVED
|
|
RESERVED00FC 0x00FC RESERVED
|
|
RESERVED00FD 0x00FD RESERVED
|
|
RESERVED00FF 0x00FF RESERVED
|
|
|
|
.FX2
|
|
; Cypress EZ-USB FX2
|
|
; http://www.keil.com/dd/docs/datashts/cypress/cy7c68xxx_ds.pdf
|
|
; http://www.keil.com/dd/docs/datashts/cypress/fx2_trm.pdf
|
|
|
|
; MEMORY MAP
|
|
;area CODE code 0x0000:0x10000
|
|
;area DATA RAM 0x0000:0x0080
|
|
;area DATA FSR 0x0080:0x0100
|
|
area CODE code 0x0000:0x10000
|
|
area DATA RAM 0x0000:0x0080
|
|
area DATA FSR 0x0080:0x0100
|
|
area DATA FSR 0xe200:0x10000
|
|
|
|
; Interrupt and reset vector assignments
|
|
entry RESET 0x0000 RESET
|
|
entry IE0 0x0003 External interrupt 0
|
|
entry TF0 0x000B Timer 0 overflow
|
|
entry IE1 0x0013 External interrupt 1
|
|
entry TF1 0x001B Timer 1 overflow
|
|
entry RI_TI_0 0x0023 USART0 Rx & Tx
|
|
entry TF2 0x002B Timer 2 overflow
|
|
entry RESUME 0x0033 USB Resume
|
|
entry RI_TI_1 0x003B USART1 Rx & Tx
|
|
entry USBINT 0x0043 USB
|
|
entry I2CINT 0x004B I2C-Compatible Bus
|
|
entry IE4 0x0053 GPIF / FIFOs / INT4 Pin
|
|
entry IE5 0x005B INT5 Pin
|
|
entry IE6 0x0063 INT6 Pin
|
|
|
|
; INPUT/OUTPUT PORTS
|
|
|
|
IOA 0x0080 Port A
|
|
IOA.D7 7
|
|
IOA.D6 6
|
|
IOA.D5 5
|
|
IOA.D4 4
|
|
IOA.D3 3
|
|
IOA.D2 2
|
|
IOA.D1 1
|
|
IOA.D0 0
|
|
|
|
SP 0x0081 Stack Pointer
|
|
|
|
DPL0 0x0082 DPTR0 Low Byte
|
|
DPH0 0x0083 DPTR0 High Byte
|
|
DPL1 0x0084 DPTR1 Low Byte
|
|
DPH1 0x0085 DPTR1 High Byte
|
|
DPS 0x0086 DPTR Select (bit 0)
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD0 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Control Register
|
|
TMOD.GATE_1 7
|
|
TMOD.C_T_1 6
|
|
TMOD.M1_1 5
|
|
TMOD.M0_1 4
|
|
TMOD.GATE_0 3
|
|
TMOD.C_T_0 2
|
|
TMOD.M1_0 1
|
|
TMOD.M0_0 0
|
|
TL0 0x008A Timer 0 Reload L
|
|
TL1 0x008B Timer 1 Reload L
|
|
TH0 0x008C Timer 0 Reload H
|
|
TH1 0x008D Timer 1 Reload H
|
|
CKCON 0x008E Clock Control
|
|
|
|
IOB 0x0090 Port B
|
|
IOB.D7 7
|
|
IOB.D6 6
|
|
IOB.D5 5
|
|
IOB.D4 4
|
|
IOB.D3 3
|
|
IOB.D2 2
|
|
IOB.D1 1
|
|
IOB.D0 0
|
|
|
|
EXIF 0x0091 External Interrupt Flag(s)
|
|
MPAGE 0x0092 Upper Addr Byte of MOVX using @R0/@R1
|
|
SCON0 0x0098 Serial Port 0 Control
|
|
SCON0.SM0 7
|
|
SCON0.SM1 6
|
|
SCON0.SM2 5
|
|
SCON0.REN 4
|
|
SCON0.TB8 3
|
|
SCON0.RB8 2
|
|
SCON0.TI 1
|
|
SCON0.RI 0
|
|
|
|
SBUF0 0x0099 Serial Port 0 Data Buffer
|
|
AUTOPTRH1 0x009A Autopointer 1 Address HIGH
|
|
AUTOPTRL1 0x009B Autopointer 1 Address LOW
|
|
AUTOPTRH2 0x009D Autopointer 1 Address HIGH
|
|
AUTOPTRL2 0x009E Autopointer 1 Address LOW
|
|
|
|
IOC 0x00A0 Port C
|
|
IOC.D7 7
|
|
IOC.D6 6
|
|
IOC.D5 5
|
|
IOC.D4 4
|
|
IOC.D3 3
|
|
IOC.D2 2
|
|
IOC.D1 1
|
|
IOC.D0 0
|
|
|
|
INT2CLR 0x00A1 Interrupt 2 clear
|
|
INT4CLR 0x00A2 Interrupt 4 clear
|
|
|
|
IE 0x00A8 Interrupt Enable
|
|
IE.EA 7
|
|
IE.ET2 5
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
|
|
EP2468STAT 0x00AA Endpoint 2,4,6,8 status flags
|
|
EP2468STAT.EP8F 7
|
|
EP2468STAT.EP8E 6
|
|
EP2468STAT.EP6F 5
|
|
EP2468STAT.EP6E 4
|
|
EP2468STAT.EP4F 3
|
|
EP2468STAT.EP4E 2
|
|
EP2468STAT.EP2F 1
|
|
EP2468STAT.EP2E 0
|
|
|
|
EP24FIFOFLGS 0x00AB Endpoint 2,4 slave FIFO status flags
|
|
EP24FIFOFLGS.EP4PF 6
|
|
EP24FIFOFLGS.EP4EF 5
|
|
EP24FIFOFLGS.EP4FF 4
|
|
EP24FIFOFLGS.EP2PF 2
|
|
EP24FIFOFLGS.EP2EF 1
|
|
EP24FIFOFLGS.EP2FF 0
|
|
|
|
EP68FIFOFLGS 0x00AC Endpoint 6,8 slave FIFO status flags
|
|
EP68FIFOFLGS.EP8PF 6
|
|
EP68FIFOFLGS.EP8EF 5
|
|
EP68FIFOFLGS.EP8FF 4
|
|
EP68FIFOFLGS.EP6PF 2
|
|
EP68FIFOFLGS.EP6EF 1
|
|
EP68FIFOFLGS.EP6FF 0
|
|
|
|
AUTOPTRSETUP 0x00AF Autopointer 1&2 Setup
|
|
|
|
IOD 0x00B0 Port D
|
|
IOD.D7 7
|
|
IOD.D6 6
|
|
IOD.D5 5
|
|
IOD.D4 4
|
|
IOD.D3 3
|
|
IOD.D2 2
|
|
IOD.D1 1
|
|
IOD.D0 0
|
|
|
|
; port E is not bit-addressable
|
|
IOE 0x00B1 Port E
|
|
|
|
OEA 0x00B2 Port A Output Enable
|
|
OEB 0x00B3 Port B Output Enable
|
|
OEC 0x00B4 Port C Output Enable
|
|
OED 0x00B5 Port D Output Enable
|
|
OEE 0x00B6 Port E Output Enable
|
|
|
|
IP 0x00B8 Interrupt Priority Register
|
|
IP.PS1 6
|
|
IP.PT2 5
|
|
IP.PS0 4
|
|
IP.PT1 3
|
|
IP.PX1 2
|
|
IP.PT0 1
|
|
IP.PX0 0
|
|
|
|
EP01STAT 0x00ba Endpoint 0 and 1 Status
|
|
EP01STAT.EP1INBSY 2
|
|
EP01STAT.EP1OUTBSY 1
|
|
EP01STAT.EP0BSY 0
|
|
GPIFTRIG 0x00bb Endpoint 2, 4, 6, 8 GPIF slave FIFO trigger
|
|
GPIFTRIG.DONE 7
|
|
GPIFTRIG.RW 2
|
|
GPIFTRIG.EP1 1
|
|
GPIFTRIG.EP0 0
|
|
GPIFSGLDATH 0x00bd GPIF Data H
|
|
GPIFSGLDATL 0x00be GPIF Data L with Trigger
|
|
GPIFSGLDATLNOX 0x00bf GPIF Data L with No Trigger
|
|
|
|
SCON1 0x00C0 Serial Port 1 Control
|
|
SCON1.SM0 7
|
|
SCON1.SM1 6
|
|
SCON1.SM2 5
|
|
SCON1.REN 4
|
|
SCON1.TB8 3
|
|
SCON1.RB8 2
|
|
SCON1.TI 1
|
|
SCON1.RI 0
|
|
|
|
SBUF1 0x00c1 Serial Port 1 Data Buffer
|
|
T2CON 0x00c8 Timer/Counter 2 Control
|
|
T2CON.TF2 7
|
|
T2CON.EXF2 6
|
|
T2CON.RCLK 5
|
|
T2CON.TCLK 4
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T2CON.EXEN2 3
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T2CON.TR2 2
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T2CON.CT2 1
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T2CON.CPRL2 0
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RCAP2L 0x00ca Capture for Timer 2, auto-reload, up-counter
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RCAP2H 0x00cb Capture for Timer 2, auto-reload, up-counter
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TL2 0x00cc Timer 2 reload L
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TH2 0x00cd Timer 2 reload H
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PSW 0x00d0 Program Status Word
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PSW.CY 7
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PSW.AC 6
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PSW.F0 5
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PSW.RS1 4
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PSW.RS0 3
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PSW.OV 2
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PSW.F1 1
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PSW.P 0
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EICON 0x00d8 External Interrupt Control
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EICON.SMOD1 7
|
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EICON.ERESI 5
|
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EICON.RESI 4
|
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EICON.INT6 3
|
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ACC 0x00e0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
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ACC.ACC4 4
|
|
ACC.ACC3 3
|
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ACC.ACC2 2
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ACC.ACC1 1
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|
ACC.ACC0 0
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|
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EIE 0x00e8 External Interrupt Enables
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|
|
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B 0x00F0 B Register
|
|
B.D7 7
|
|
B.D6 6
|
|
B.D5 5
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B.D4 4
|
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B.D3 3
|
|
B.D2 2
|
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B.D1 1
|
|
B.D0 0
|
|
|
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EIP 0x00f8 External Interrupt Priority Control
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|
|
|
|
|
.SM5964
|
|
; SyncMOS SM5964
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; http://www.keil.com/dd/chip/3767.htm
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; http://www.keil.com/dd/docs/datashts/syncmos/sm5964.pdf
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|
|
|
|
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; MEMORY MAP
|
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area CODE code 0x0000:0x10000
|
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area DATA RAM 0x0000:0x0300
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area DATA FSR 0x0080:0x0100
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; Interrupt and reset vector assignments
|
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entry RESET 0x0000 RESET
|
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entry IE0 0x0003 External interrupt 0
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entry TF0 0x000B Timer 0 interrupt
|
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entry IE1 0x0013 External interrupt 1
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entry TF1 0x001B Timer 1 interrupt
|
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entry RI_TI 0x0023 Serial port interrupt
|
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entry TF2_EXF2 0x002B Timer 2 interrupt
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; INPUT/OUTPUT PORTS
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P0 0x0080 Port 0
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P0.P07 7
|
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P0.P06 6
|
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P0.P05 5
|
|
P0.P04 4
|
|
P0.P03 3
|
|
P0.P02 2
|
|
P0.P01 1
|
|
P0.P00 0
|
|
SP 0x0081 Stack Pointer
|
|
DPL 0x0082 Data Pointer, Low Byte
|
|
DPH 0x0083 Data Pointer, High Byte
|
|
RCON 0x0085 Internal RAM Control Register
|
|
RCON.RAMS0 0
|
|
RCON.RAMS1 1
|
|
DBANK 0x0086 Data Bank Control Register
|
|
DBANK.BSE 7
|
|
DBANK.BS3 3
|
|
DBANK.BS2 2
|
|
DBANK.BS1 1
|
|
DBANK.BS0 0
|
|
PCON 0x0087 Power Control Register
|
|
PCON.SMOD 7
|
|
PCON.PDS 6
|
|
PCON.IDLS 5
|
|
PCON.SD 4
|
|
PCON.GF1 3
|
|
PCON.GF0 2
|
|
PCON.PDE 1
|
|
PCON.IDLE 0
|
|
TCON 0x0088 Timer 0/1 Control Register
|
|
TCON.TF1 7
|
|
TCON.TR1 6
|
|
TCON.TF0 5
|
|
TCON.TR0 4
|
|
TCON.IE1 3
|
|
TCON.IT1 2
|
|
TCON.IE0 1
|
|
TCON.IT0 0
|
|
TMOD 0x0089 Timer Mode Register
|
|
TMOD.GATE_0 7
|
|
TMOD.C_T_0 6
|
|
TMOD.M1_0 5
|
|
TMOD.M0_0 4
|
|
TMOD.GATE_1 3
|
|
TMOD.C_T_1 2
|
|
TMOD.M1_1 1
|
|
TMOD.M0_1 0
|
|
TL0 0x008A Timer 0, Low Byte
|
|
TL1 0x008B Timer 1, Low Byte
|
|
TH0 0x008C Timer 0, High Byte
|
|
TH1 0x008D Timer 1, High Byte
|
|
P1 0x0090 Port 1
|
|
P1.SPWM4 7
|
|
P1.SPWM3 6
|
|
P1.SPWM2 5
|
|
P1.SPWM1 4
|
|
P1.SPWM0 3
|
|
P1.T2EX 1
|
|
P1.T2 0
|
|
SCON 0x0098 Serial Channel Control Register
|
|
SCON.SM0 7
|
|
SCON.SM1 6
|
|
SCON.SM3 5
|
|
SCON.REN 4
|
|
SCON.TB8 3
|
|
SCON.RB8 2
|
|
SCON.TI 1
|
|
SCON.RI 0
|
|
SBUF 0x0099 Serial Channel Buffer Register
|
|
P1CON 0x009B Port 1 Configuration Register
|
|
P1CON.SPWM4E 7 SPWM function for pin SPWM4
|
|
P1CON.SPWM3E 6 SPWM function for pin SPWM3
|
|
P1CON.SPWM2E 5 SPWM function for pin SPWM2
|
|
P1CON.SPWM1E 4 SPWM function for pin SPWM1
|
|
P1CON.SPWM0E 3 SPWM function for pin SPWM0
|
|
WDTC 0x009F Watch Dog Timer Control
|
|
WDTC.WDTE 7 Watch Dog Timer enable
|
|
WDTC.CLEAR 5 Watch Dog Timer counter clear
|
|
WDTC.PS2 2 Watch Dog Timer clock source divider bit 2
|
|
WDTC.PS1 1 Watch Dog Timer clock source divider bit 1
|
|
WDTC.PS0 0 Watch Dog Timer clock source divider bit 0
|
|
P2 0x00A0 Port 2
|
|
P2.P27 7
|
|
P2.P26 6
|
|
P2.P25 5
|
|
P2.P24 4
|
|
P2.P23 3
|
|
P2.P22 2
|
|
P2.P21 1
|
|
P2.P20 0
|
|
SPWMC 0x00A3
|
|
SPWMC.FPDIV1 1
|
|
SPWMC.FPDIV1 0
|
|
SPWMD0 0x00A4
|
|
SPWMD1 0x00A5
|
|
SPWMD2 0x00A6
|
|
SPWMD3 0x00A7
|
|
IE 0x00A8 Interrupt Enable Register
|
|
IE.EA 7
|
|
IE.ES 4
|
|
IE.ET1 3
|
|
IE.EX1 2
|
|
IE.ET0 1
|
|
IE.EX0 0
|
|
SPWMD4 0x00AC
|
|
P3 0x00B0 Port 3
|
|
P3.RD 7
|
|
P3.WR 6
|
|
P3.T1 5
|
|
P3.T0 4
|
|
P3.INT1 3
|
|
P3.INT0 2
|
|
P3.TxD0 1
|
|
P3.RxD0 0
|
|
IP 0x00B8 Interrupt Priority Register
|
|
IP.PS 4
|
|
IP.PT1 3
|
|
IP.PX1 2
|
|
IP.PT0 1
|
|
IP.PX0 0
|
|
SCONF 0x00BF System Control Register
|
|
SCONF.WDR 7 Watch Dog Timer Reset.
|
|
SCONF.ISPE 2 ISP function enable bit
|
|
SCONF.OME 1 768 byte on-chip RAM enable bit
|
|
SCONF.ALEI 0 ALE output inhibit bit
|
|
T2CON 0x00C8 Timer 2 Control Register
|
|
T2CON.TF2 7
|
|
T2CON.EXF2 6
|
|
T2CON.RCLK 5
|
|
T2CON.TCLK 4
|
|
T2CON.EXEN2 3
|
|
T2CON.TR2 2
|
|
T2CON.C_T2 1
|
|
T2CON.CP_RL2 0
|
|
T2MOD 0x00C9 Timer 2 Mode Register
|
|
T2MOD.DCEN 0
|
|
T2MOD.T2OE 1
|
|
RC2L 0x00CA Timer 2 Reload/Capture Register, Low Byte
|
|
RC2H 0x00CB Timer 2 Reload/Capture Register, High Byte
|
|
TL2 0x00CC Timer 2 Low Byte
|
|
TH2 0x00CD Timer 2 High Byte
|
|
PSW 0x00D0 Program Status Word Register
|
|
PSW.CY 7
|
|
PSW.AC 6
|
|
PSW.F0 5
|
|
PSW.RS1 4
|
|
PSW.RS0 3
|
|
PSW.OV 2
|
|
PSW.F1 1
|
|
PSW.P 0
|
|
P4 0x00D8 Port 4
|
|
P4.P47 7
|
|
P4.P46 6
|
|
P4.P45 5
|
|
P4.P44 4
|
|
P4.P43 3
|
|
P4.P42 2
|
|
P4.P41 1
|
|
P4.P40 0
|
|
ACC 0x00E0 Accumulator
|
|
ACC.ACC7 7
|
|
ACC.ACC6 6
|
|
ACC.ACC5 5
|
|
ACC.ACC4 4
|
|
ACC.ACC3 3
|
|
ACC.ACC2 2
|
|
ACC.ACC1 1
|
|
ACC.ACC0 0
|
|
B 0x00F0 B-Register
|
|
B.B7 7
|
|
B.B6 6
|
|
B.B5 5
|
|
B.B4 4
|
|
B.B3 3
|
|
B.B2 2
|
|
B.B1 1
|
|
B.B0 0
|
|
ISPFAH 0x00F4 ISP Flash Address High Register
|
|
ISPFAL 0x00F5 ISP Flash Address Low Register
|
|
ISPFD 0x00F6 ISP Flash Data Register
|
|
ISPC 0x00F7 ISP Flash Control Register
|
|
ISPC.START 7 ISP function start bit
|
|
ISPC.F1 1 ISP function select bit 1
|
|
ISPC.F0 0 ISP function select bit 0
|