255 lines
7.6 KiB
C++
255 lines
7.6 KiB
C++
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/*
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* National Semiconductor Corporation CR16 processor module for IDA.
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* Copyright (c) 2002-2006 Konstantin Norvatoff, <konnor@bk.ru>
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* Freeware.
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*/
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#include "cr16.hpp"
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#include <diskio.hpp>
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#include <segregs.hpp>
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int data_id;
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//--------------------------------------------------------------------------
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// list of registers
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static const char *const RegNames[] =
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{
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// empty
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"",
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// general purpose
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "ra", "sp",
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// special
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"pc", "isp", "intbase", "psr", "cfg", "dsr", "dcr", "carl", "carh",
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"intbaseh", "intbasel",
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// pseudo segments
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"cs", "ds"
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};
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//----------------------------------------------------------------------
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void cr16_t::load_from_idb()
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{
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ioh.restore_device();
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}
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//----------------------------------------------------------------------
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// This old-style callback only returns the processor module object.
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static ssize_t idaapi notify(void *, int msgid, va_list)
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{
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if ( msgid == processor_t::ev_get_procmod )
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return size_t(SET_MODULE_DATA(cr16_t));
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return 0;
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}
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//----------------------------------------------------------------------
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ssize_t idaapi cr16_t::on_event(ssize_t msgid, va_list va)
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{
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switch ( msgid )
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{
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case processor_t::ev_init:
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inf_set_be(false);
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inf_set_gen_lzero(true);
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helper.create(PROCMOD_NODE_NAME);
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break;
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case processor_t::ev_term:
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ioh.ports.clear();
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clr_module_data(data_id);
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break;
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case processor_t::ev_newfile:
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// ask for a processor from the config file
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// use it to handle ports and registers
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{
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char cfgfile[QMAXFILE];
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ioh.get_cfg_filename(cfgfile, sizeof(cfgfile));
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iohandler_t::parse_area_line0_t cb(ioh);
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if ( choose_ioport_device2(&ioh.device, cfgfile, &cb) )
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ioh.set_device_name(ioh.device.c_str(), IORESP_ALL);
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}
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break;
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case processor_t::ev_ending_undo:
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case processor_t::ev_oldfile:
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load_from_idb();
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break;
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case processor_t::ev_creating_segm:
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{
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segment_t *s = va_arg(va, segment_t *);
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// Set default value of DS register for all segments
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set_default_dataseg(s->sel);
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}
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break;
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case processor_t::ev_out_header:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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CR16_header(*ctx);
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return 1;
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}
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case processor_t::ev_out_footer:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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CR16_footer(*ctx);
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return 1;
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}
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case processor_t::ev_out_segstart:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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segment_t *seg = va_arg(va, segment_t *);
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CR16_segstart(*ctx, seg);
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return 1;
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}
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case processor_t::ev_ana_insn:
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{
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insn_t *out = va_arg(va, insn_t *);
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return CR16_ana(out);
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}
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case processor_t::ev_emu_insn:
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{
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const insn_t *insn = va_arg(va, const insn_t *);
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return CR16_emu(*insn) ? 1 : -1;
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}
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case processor_t::ev_out_insn:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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out_insn(*ctx);
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return 1;
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}
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case processor_t::ev_out_operand:
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{
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outctx_t *ctx = va_arg(va, outctx_t *);
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const op_t *op = va_arg(va, const op_t *);
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return out_opnd(*ctx, *op) ? 1 : -1;
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}
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default:
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break;
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}
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return 0;
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}
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//-----------------------------------------------------------------------
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// PseudoSam
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//-----------------------------------------------------------------------
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static const asm_t pseudosam =
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{
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AS_COLON | AS_UDATA | ASH_HEXF3 | ASD_DECF0,
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// user flags
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0,
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"Generic CR16 assembler", // title
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0, // help id
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NULL, // header
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"org", // ORG directive
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"end", // end directive
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";", // comment
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'"', // string delimiter
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'\'', // character constant
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"\\\"'", // special characters
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"db", // ascii string directive
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".byte", // byte directive
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".word", // word directive
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NULL, // dword (4 bytes)
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NULL, // qword (8 bytes)
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NULL, // oword (16 bytes)
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NULL, // float (4 bytes)
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NULL, // double (8 bytes)
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NULL, // tbyte (10/12 bytes)
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NULL, // packed decimal real
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"#d dup(#v)", // arrays (#h,#d,#v,#s(...)
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"db ?", // uninited arrays
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".equ", // equ
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NULL, // seg prefix
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"$", // current IP (instruction pointer) symbol in assembler
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NULL, // Generate function header lines
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NULL, // Generate function footer lines
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NULL, // public
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NULL, // weak
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NULL, // extrn
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NULL, // comm
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NULL, // Get name of type of item at ea or id
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".ALIGN", // align
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'(', ')', // lbrace, rbrace
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NULL, // mod
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NULL, // and
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NULL, // or
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NULL, // xor
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NULL, // not
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NULL, // shl
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NULL, // shr
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NULL, // sizeof
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};
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// list of assemblers
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static const asm_t *const asms[] = { &pseudosam, NULL };
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//-----------------------------------------------------------------------
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#define FAMILY "NSC CR16:"
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// short names
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static const char *const shnames[] = { "CR16", NULL };
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// long names
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static const char *const lnames[] = { FAMILY"NSC CR16", NULL };
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//--------------------------------------------------------------------------
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// return instructions
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static const uchar retcode_1[] = { 0x00, 0x0B }; // RTS
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static const bytes_t retcodes[] =
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{
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{ sizeof(retcode_1), retcode_1 },
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{ 0, NULL }
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};
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//-----------------------------------------------------------------------
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// Processor Definition
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//-----------------------------------------------------------------------
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processor_t LPH =
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{
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IDP_INTERFACE_VERSION, // version
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PLFM_CR16, // processor ID
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// flag
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PR_USE32
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| PR_BINMEM
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| PR_SEGTRANS,
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// flag2
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0,
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8, // 8 bits in a byte for code segments
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8, // 8 bits in a byte for data segments
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shnames, // short processor names (NULL terminated)
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lnames, // long processor names (NULL terminated)
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asms, // assemblers
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notify, // Event notification handler
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RegNames, // Regsiter names
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qnumber(RegNames), // Number of registers
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rVcs, rVds,
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2, // size of a segment register
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rVcs, rVds,
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NULL, // Array of typical code start sequences
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retcodes, // Array of 'return' instruction opcodes
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0, CR16_last, // icode of the first and the last instruction
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Instructions, // instruc
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3, // Size of long double (tbyte) for this processor - 24 bits
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{0, 0, 0, 0}, // Number of digits in floating numbers after the decimal point
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0, // Icode of return instruction
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NULL, // micro virtual mashine
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};
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