388 lines
20 KiB
C++
388 lines
20 KiB
C++
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/*
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* Interactive disassembler (IDA).
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* Copyright (c) 1990-2021 Hex-Rays
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* ALL RIGHTS RESERVED.
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*
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*/
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#ifndef __INS_HPP
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#define __INS_HPP
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extern instruc_t Instructions[];
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enum nameNum
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{
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ARC_null = 0, // Unknown Operation
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ARC_ld, // Load
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ARC_lr, // Load from auxiliary register
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ARC_st, // Store
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ARC_sr, // Store to auxiliary register
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ARC_store_instructions = ARC_sr,
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ARC_flag, // Set flags
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ARC_asr, // Arithmetic shift right
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ARC_lsr, // Logical shift right
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ARC_sexb, // Sign extend byte
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ARC_sexw, // Sign extend word
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ARC_sexh = ARC_sexw,
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ARC_extb, // Zero extend byte
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ARC_extw, // Zero extend word
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ARC_exth = ARC_extw,
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ARC_ror, // Rotate right
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ARC_rrc, // Rotate right through carry
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ARC_b, // Branch
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ARC_bl, // Branch and link
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ARC_lp, // Zero-overhead loop setup
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ARC_j, // Jump
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ARC_jl, // Jump and link
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ARC_add, // Add
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ARC_adc, // Add with carry
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ARC_sub, // Subtract
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ARC_sbc, // Subtract with carry
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ARC_and, // Logical bitwise AND
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ARC_or, // Logical bitwise OR
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ARC_bic, // Logical bitwise AND with invert
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ARC_xor, // Logical bitwise exclusive-OR
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// pseudo instructions
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ARC_mov, // Move
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ARC_nop, // No operation
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ARC_lsl, // Logical shift left
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ARC_rlc, // Rotate left through carry
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// arc7
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ARC_brk, // Breakpoint
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ARC_sleep, // Sleep until interrupt or restart
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// arc8
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ARC_swi, // Software interrupt
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// extra optional instrutions
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ARC_asl, // Arithmetic shift left
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ARC_mul64, // Signed 32x32 multiply
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ARC_mulu64, // Unsigned 32x32 multiply
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ARC_max, // Maximum of two signed integers
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ARC_min, // Minimum of two signed integers
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ARC_swap, // Exchange upper and lower 16 bits
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ARC_norm, // Normalize (find-first-bit)
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// ARCompact instructions
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ARC_bbit0, // Branch if bit cleared to 0
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ARC_bbit1, // Branch if bit set to 1
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ARC_br, // Branch on compare
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ARC_pop, // Restore register value from stack
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ARC_push, // Store register value on stack
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ARC_abs, // Absolute value
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ARC_add1, // Add with left shift by 1 bit
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ARC_add2, // Add with left shift by 2 bits
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ARC_add3, // Add with left shift by 3 bits
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ARC_bclr, // Clear specified bit (to 0)
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ARC_bmsk, // Bit Mask
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ARC_bset, // Set specified bit (to 1)
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ARC_btst, // Test value of specified bit
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ARC_bxor, // Bit XOR
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ARC_cmp, // Compare
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ARC_ex, // Atomic Exchange
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ARC_mpy, // Signed 32x32 multiply (low)
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ARC_mpyh, // Signed 32x32 multiply (high)
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ARC_mpym = ARC_mpyh,
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ARC_mpyhu, // Unsigned 32x32 multiply (high)
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ARC_mpyhm = ARC_mpyhu,
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ARC_mpyu, // Unsigned 32x32 multiply (low)
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ARC_neg, // Negate
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ARC_not, // Logical bit inversion
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ARC_rcmp, // Reverse Compare
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ARC_rsub, // Reverse Subtraction
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ARC_rtie, // Return from Interrupt/Exception
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ARC_sub1, // Subtract with left shift by 1 bit
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ARC_sub2, // Subtract with left shift by 2 bits
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ARC_sub3, // Subtract with left shift by 3 bits
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ARC_sync, // Synchronize
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ARC_trap, // Raise an exception
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ARC_tst, // Test
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ARC_unimp, // Unimplemented instruction
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ARC_abss, // Absolute and saturate
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ARC_abssw, // Absolute and saturate of word
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ARC_abssh = ARC_abssw,
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ARC_adds, // Add and saturate
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ARC_addsdw, // Add and saturate dual word
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ARC_asls, // Arithmetic shift left and saturate
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ARC_asrs, // Arithmetic shift right and saturate
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ARC_divaw, // Division assist
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ARC_negs, // Negate and saturate
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ARC_negsw, // Negate and saturate of word
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ARC_negsh = ARC_negsw,
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ARC_normw, // Normalize to 16 bits
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ARC_normh = ARC_normw,
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ARC_rnd16, // Round to word
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ARC_rndh = ARC_rnd16,
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ARC_sat16, // Saturate to word
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ARC_sath = ARC_sat16,
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ARC_subs, // Subtract and saturate
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ARC_subsdw, // Subtract and saturate dual word
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// mac d16
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ARC_muldw,
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ARC_muludw,
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ARC_mulrdw,
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ARC_macdw,
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ARC_macudw,
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ARC_macrdw,
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ARC_msubdw,
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// 32x16 MUL/MAC
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ARC_mululw,
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ARC_mullw,
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ARC_mulflw,
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ARC_maclw,
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ARC_macflw,
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ARC_machulw,
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ARC_machlw,
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ARC_machflw,
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ARC_mulhlw,
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ARC_mulhflw,
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// Major 6 compact insns
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ARC_acm,
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ARC_addqbs,
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ARC_avgqb,
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ARC_clamp,
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ARC_daddh11,
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ARC_daddh12,
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ARC_daddh21,
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ARC_daddh22,
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ARC_dexcl1,
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ARC_dexcl2,
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ARC_dmulh11,
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ARC_dmulh12,
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ARC_dmulh21,
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ARC_dmulh22,
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ARC_dsubh11,
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ARC_dsubh12,
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ARC_dsubh21,
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ARC_dsubh22,
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ARC_drsubh11,
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ARC_drsubh12,
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ARC_drsubh21,
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ARC_drsubh22,
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ARC_fadd,
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ARC_fsadd = ARC_fadd,
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ARC_fmul,
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ARC_fsmul = ARC_fmul,
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ARC_fsub,
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ARC_fssub = ARC_fsub,
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ARC_fxtr,
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ARC_iaddr,
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ARC_mpyqb,
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ARC_sfxtr,
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ARC_pkqb,
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ARC_upkqb,
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ARC_xpkqb,
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// ARCv2 only major 4 instructions
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ARC_mpyw, // Signed 16x16 multiply
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ARC_mpyuw, // Unsigned 16x16 multiply
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ARC_bi, // Branch indexed
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ARC_bih, // Branch indexed half-word
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ARC_ldi, // Load indexed
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ARC_aex, // Exchange with auxiliary register
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ARC_bmskn, // Bit mask negated
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ARC_seteq, // Set if equal
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ARC_setne, // Set if not equal
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ARC_setlt, // Set if less than
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ARC_setge, // Set if greater or equal
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ARC_setlo, // Set if lower than
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ARC_seths, // Set if higher or same
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ARC_setle, // Set if less than or equal
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ARC_setgt, // Set if greater than
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ARC_rol, // Rotate left
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ARC_llock, // Load locked
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ARC_scond, // Store conditional
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ARC_seti, // Set interrupt enable and priority level
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ARC_clri, // Cler and get interrupt enable and priority level
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// ARCv2 compact prolog / epilog instructions
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ARC_enter, // Function prologue sequence
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ARC_leave, // Function epilogue sequence
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// ARCv2 32-bit extension major 5 DOP instructions
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ARC_div, // Signed integer divsion
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ARC_divu, // Unsigned integer divsion
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ARC_rem, // Signed integer remainder
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ARC_remu, // Unsigned integer remainder
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ARC_asrsr, // Shift right rounding and saturating
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ARC_valgn2h, // Two-way 16-bit vector align
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ARC_setacc, // Set the accumulator
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ARC_mac, // Signed 32x32 multiply accumulate
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ARC_macu, // Unsigned 32x32 multiply accumulate
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ARC_dmpyh, // Sum of dual signed 16x16 multiplication
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ARC_dmpyhu, // Sum of dual unsigned 16x16 multiplication
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ARC_dmach, // Dual signed 16x16 multiply accumulate
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ARC_dmachu, // Dual unsigned 16x16 multiply accumulate
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ARC_vadd2h, // Dual 16-bit addition
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ARC_vadds2h, // Dual 16-bit saturating addition
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ARC_vsub2h, // Dual 16-bit subtraction
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ARC_vsubs2h, // Dual 16-bit saturating subtraction
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ARC_vaddsub2h, // Dual 16-bit addition/subtraction
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ARC_vaddsubs2h, // Dual 16-bit saturating addition/subtraction
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ARC_vsubadd2h, // Dual 16-bit subtraction/addition
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ARC_vsubadds2h, // Dual 16-bit saturating subtraction/addition
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ARC_mpyd, // Signed 32x32 multiply (wide)
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ARC_mpydu, // Unsigned 32x32 multiply (wide)
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ARC_macd, // Signed 32x32 multiply accumulate (wide)
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ARC_macdu, // Unsigned 32x32 multiply accumulate (wide)
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ARC_vmpy2h, // Dual signed 16x16 multiply (wide)
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ARC_vmpy2hf, // Dual 16x16 saturating fractional multiply
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ARC_vmpy2hu, // Dual unsigned 16x16 multiply (wide)
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ARC_vmpy2hfr, // Dual 16x16 saturating rounded fractional multiply
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ARC_vmac2h, // Dual signed 16x16 multiply (wide)
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ARC_vmac2hf, // Dual 16x16 saturating fractional multiply
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ARC_vmac2hu, // Dual unsigned 16x16 multiply (wide)
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ARC_vmac2hfr, // Dual 16x16 saturating rounded fractional multiply
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ARC_vmpy2hwf, // Dual 16x16 saturating fractional multiply (wide)
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ARC_vasl2h, // Dual 16-bit arithmetic shift left
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ARC_vasls2h, // Dual 16-bit saturating arithmetic shift left
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ARC_vasr2h, // Dual 16-bit arithmetic shift right
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ARC_vasrs2h, // Dual 16-bit saturating arithmetic shift right
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ARC_vlsr2h, // Dual 16-bit logical shift right
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ARC_vasrsr2h, // Dual 16-bit saturating rounded arithmetic shift right
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ARC_vadd4b, // Quad 8-bit addition
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ARC_vmax2h, // Dual 16-bit maximum
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ARC_vsub4b, // Quad 8-bit subtraction
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ARC_vmin2h, // Dual 16-bit minimum
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ARC_adcs, // Signed saturating addition with carry in
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ARC_sbcs, // Signed saturating subtraction with carry in
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ARC_dmpyhwf, // Fractional saturating sum of dual 16x16 signed fractional multiply
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ARC_vpack2hl, // Compose lower 16-bits
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ARC_vpack2hm, // Compose upper 16-bits
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ARC_dmpyhf, // Saturating sum of dual 16x16 signed fractional multiply
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ARC_dmpyhfr, // Saturating rounded sum of dual 16x16 signed fractional multiply
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ARC_dmachf, // Saturating sum of dual 16x16 signed fractional multiply accumulate
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ARC_dmachfr, // Saturating rounded sum of dual 16x16 signed fractional multiply accumulate
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ARC_vperm, // Byte permutation with zero or sign extension
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ARC_bspush, // Bitstream push
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// ARCv2 32-bit extension major 5 SOP instructions
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ARC_swape, // Swap byte ordering
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ARC_lsl16, // Logical shift left by 16 bits
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ARC_lsr16, // Logical shift right by 16 bits
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ARC_asr16, // Arithmetic shift right by 16 bits
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ARC_asr8, // Arithmetic shift right by 8 bits
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ARC_lsr8, // Logical shift right by 8 bits
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ARC_lsl8, // Logical shift left by 8 bits
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ARC_rol8, // Rotate left by 8 bits
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ARC_ror8, // Rotate right by 8 bits
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ARC_ffs, // Find first set bit
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ARC_fls, // Find last set bit
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ARC_getacc, // Get accumulator
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ARC_normacc, // Normalize accumulator
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ARC_satf, // Saturate according to flags
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ARC_vpack2hbl, // Pack lower bytes into lower 16 bits
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ARC_vpack2hbm, // Pack upper bytes into upper 16 bits
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ARC_vpack2hblf, // Pack upper bytes into lower 16 bits
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ARC_vpack2hbmf, // Pack lower bytes into upper 16 bits
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ARC_vext2bhlf, // Pack lower 2 bytes into upper byte of 16 bits each
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ARC_vext2bhmf, // Pack upper 2 bytes into upper byte of 16 bits each
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ARC_vrep2hl, // Repeat lower 16 bits
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ARC_vrep2hm, // Repeat upper 16 bits
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ARC_vext2bhl, // Pack lower 2 bytes into zero extended 16 bits
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ARC_vext2bhm, // Pack upper 2 bytes into zero extended 16 bits
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ARC_vsext2bhl, // Pack lower 2 bytes into sign extended 16 bits
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ARC_vsext2bhm, // Pack upper 2 bytes into sign extended 16 bits
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ARC_vabs2h, // Dual 16-bit absolute value
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ARC_vabss2h, // Dual saturating 16-bit absolute value
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ARC_vneg2h, // Dual 16-bit negation
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ARC_vnegs2h, // Dual saturating 16-bit negation
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ARC_vnorm2h, // Dual 16-bit normalization
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ARC_bspeek, // Bitstream peek
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ARC_bspop, // Bitstream pop
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ARC_sqrt, // Integer square root
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ARC_sqrtf, // Fractional square root
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// ARCv2 32-bit extension major 5 ZOP instructions
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ARC_aslacc, // Arithmetic shift of accumulator
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ARC_aslsacc, // Saturating arithmetic shift of accumulator
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ARC_flagacc, // Copy accumulator flags to status32 register
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ARC_modif, // Update address pointer
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// ARCv2 32-bit extension major 6 DOP instructions
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ARC_cmpyhnfr, // Fractional 16+16 bit complex saturating rounded unshifted multiply
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ARC_cmpyhfr, // Fractional 16+16 bit complex saturating rounded multiply
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ARC_cmpychfr, // Fractional 16+16 bit complex saturating rounded conjugated multiply
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ARC_vmsub2hf, // Dual 16x16 saturating fractional multiply subtract
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ARC_vmsub2hfr, // Dual 16x16 saturating rounded fractional multiply subtract
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ARC_cmpychnfr, // Fractional 16+16 bit complex saturating rounded unshifted conjugated multiply
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ARC_cmachnfr, // Fractional 16+16 bit complex saturating rounded unshifted multiply accumulate
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ARC_cmachfr, // Fractional 16+16 bit complex saturating rounded unshifted accumulate
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ARC_cmacchnfr, // Fractional 16+16 bit complex saturating rounded conjugated multiply accumulate
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ARC_cmacchfr, // Fractional 16+16 bit complex saturating rounded unshifted conjugated multiply accumulate
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ARC_mpyf, // Signed 32-bit fractional saturating multiply
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ARC_mpyfr, // Signed 32-bit fractional saturating rounded multiply
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ARC_macf, // Signed 32-bit fractional saturating multiply accumulate
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ARC_macfr, // Signed 32-bit fractional saturating rounded multiply accumulate
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ARC_msubf, // Signed 32-bit fractional saturating multiply subtract
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ARC_msubfr, // Signed 32-bit fractional saturating rounded multiply subtract
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ARC_divf, // Signed 32-bit fractional division
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ARC_vmac2hnfr, // Dual signed 16-bit fractional saturating rounded multiply accumulate
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ARC_vmsub2hnfr, // Dual signed 16-bit fractional saturating rounded multiply subtract
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ARC_mpydf, // Signed 32-bit fractional multiply (wide)
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ARC_macdf, // Signed 32-bit fractional multiply accumulate (wide)
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ARC_msubwhfl, // Signed 32 x 16 (lower) fractional saturating multiply subtract
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ARC_msubdf, // Signed 32-bit fractional multiply subtract (wide)
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ARC_dmpyhbl, // Dual 16x8 signed multiply with lower two bytes
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ARC_dmpyhbm, // Dual 16x8 signed multiply with upper two bytes
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ARC_dmachbl, // Dual 16x8 signed multiply accumulate with lower two bytes
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ARC_dmachbm, // Dual 16x8 signed multiply accumulate with upper two bytes
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ARC_msubwhflr, // Signed 32 x 16 (lower) fractional saturating rounded multiply subtract
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ARC_cmpyhfmr, // Fractional 16+16 bit complex x 16bit real (upper) saturating rounded multiply
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ARC_cbflyhf0r, // Fractional 16+16 bit complex FFT butterfly, first half
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ARC_mpywhl, // Signed 32 x 16 (lower) multiply
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ARC_macwhl, // Signed 32 x 16 (lower) multiply accumulate
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ARC_mpywhul, // Unsigned 32 x 16 (lower) multiply
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ARC_macwhul, // Unsigned 32 x 16 (lower) multiply accumulate
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ARC_mpywhfm, // Signed 32 x 16 (upper) fractional saturating multiply
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ARC_mpywhfmr, // Signed 32 x 16 (upper) fractional saturating rounded multiply
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ARC_macwhfm, // Signed 32 x 16 (upper) fractional saturating multiply accumulate
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ARC_macwhfmr, // Signed 32 x 16 (upper) fractional saturating rounded multiply accumulate
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ARC_mpywhfl, // Signed 32 x 16 (lower) fractional saturating multiply
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ARC_mpywhflr, // Signed 32 x 16 (lower) fractional saturating rounded multiply
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ARC_macwhfl, // Signed 32 x 16 (lower) fractional saturating multiply accumulate
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ARC_macwhflr, // Signed 32 x 16 (lower) fractional saturating rounded multiply accumulate
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ARC_macwhkl, // Signed 32 x 16 (lower) 16-bit shifted multiply accumulate
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ARC_macwhkul, // Unsigned 32 x 16 (lower) 16-bit shifted multiply accumulate
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ARC_mpywhkl, // Signed 32 x 16 (lower) 16-bit shifted multiply
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ARC_mpywhkul, // Unsigned 32 x 16 (lower) 16-bit shifted multiply
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ARC_msubwhfm, // Signed 32 x 16 (upper) fractional saturating multiply subtract
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ARC_msubwhfmr, // Signed 32 x 16 (upper) fractional saturating rounded multiply subtract
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// ARCv2 32-bit extension major 6 SOP instructions
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ARC_cbflyhf1r, // Fractional 16+16 bit complex FFT butterfly, second half
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// ARCv2 FPU instructions
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ARC_fscmp, // Single precision floating point compare
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ARC_fscmpf, // Single precision floating point compare (IEEE 754 flag generation)
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ARC_fsmadd, // Single precision floating point fused multiply add
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ARC_fsmsub, // Single precision floating point fused multiply subtract
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ARC_fsdiv, // Single precision floating point division
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ARC_fcvt32, // Single precision floating point / integer conversion
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ARC_fssqrt, // Single precision floating point square root
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// ARCv2 jump / execute indexed instructions
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ARC_jli, // Jump and link indexed
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ARC_ei, // Execute indexed
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ARC_kflag, // Set kernel flags
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ARC_wevt, // Enter sleep state
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ARC_last,
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};
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#endif
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