; The format of the input file: ; each device definition begins with a line like this: ; ; .devicename ; ; after it go the port definitions in this format: ; ; portname address ; ; the bit definitions (optional) are represented like this: ; ; portname.bitname bitnumber ; ; lines beginning with a space are ignored. ; comment lines should be started with ';' character. ; ; the default device is specified at the start of the file ; ; .default device_name ; ; all lines non conforming to the format are passed to the callback function ; ; the processor definition may include the memory configuration. ; the line format is: ; ; area CLASS AREA-NAME START:END ; ; where CLASS is anything, but please use one of CODE, DATA, BSS ; START and END are addresses, the end address is not included ; Interrupt vectors are declared in the following way: ; interrupt NAME ADDRESS COMMENT .default Z8 .Z8 ; http://www.zilog.com/docs/um0016.pdf ; Z8 CPU User Manual ; MEMORY MAP area CODE code 0x0000:0x10000 ; code segment: up to 64K area DATA INTMEM 0x0000:0x01000 ; internal RAM/registers area DATA EXTMEM 0x0000:0x10000 ; external data: up to 64K ; Interrupt and reset vector assignments interrupt irq0 0x0 DAV0, IRQ0, Comparator interrupt irq1 0x2 DAV1, IRQ1 interrupt irq2 0x4 DAV2, IRQ2, TIN, Comparator interrupt irq3 0x6 IRQ3, Serial in interrupt irq4 0x8 T0, Serial out interrupt irq5 0xA T1 entry RESET 0xC Reset ; Registers ; use the third nibble for the Expanded Register File (ERF) banks, e.g. 0xF0F for ERF F, register 0F p0 0x00 Port 0 p1 0x01 Port 1 p2 0x02 Port 2 p3 0x03 Port 3 sio 0xF0 Serial I/O tmr 0xF1 Timer mode t1 0xF2 Timer/counter 1 pre1 0xF3 T1 prescaler t0 0xF4 Timer/counter 0 pre0 0xF5 T0 prescaler p2m 0xF6 Port 2 mode register p3m 0xF7 Port 3 mode register p01m 0xF8 Ports 0-1 mode register ipr 0xF9 Interrupt priority register irq 0xFA Interrupt request register imr 0xFB Interrupt mask register flags 0xFC Program control flags rp 0xFD Register pointer sph 0xFE Stack pointer high byte spl 0xFF Stack pointer low byte ;Expanded Register Group F wdtmr 0xF0F Watch Dog Timer smr 0xF0B Stop Mode Recovery pcon 0xF00 PCON Register ;Expanded Register Group C scon 0xC02 SPI Control rxbuf 0xC01 SPI Tx/Rx Data scomp 0xC00 SPI Compare .Z86C93 ; http://www.zilog.com/docs/z8/dc2508.pdf ; Z86C93 Product Specification ; MEMORY MAP area CODE code 0x0000:0x10000 ; code segment: up to 64K area DATA INTMEM 0x0000:0x01000 ; internal RAM/registers area DATA EXTMEM 0x0000:0x10000 ; external data: up to 64K ; Interrupt and reset vector assignments interrupt irq0 0x0 DAV0, P32, T2 interrupt irq1 0x2 P33 interrupt irq2 0x4 DAV2, P31, TIN interrupt irq3 0x6 P30, Serial in interrupt irq4 0x8 T0, Serial out interrupt irq5 0xA T1 entry RESET 0xC Reset ; Registers ; use the third nibble for the Expanded Register File (ERF) banks, e.g. 0xF0F for ERF F, register 0F p0 0x00 Port 0 p2 0x02 Port 2 p3 0x03 Port 3 sio 0xF0 Serial I/O tmr 0xF1 Timer mode t1 0xF2 Timer/counter 1 pre1 0xF3 T1 prescaler t0 0xF4 Timer/counter 0 pre0 0xF5 T0 prescaler p2m 0xF6 Port 2 mode register p3m 0xF7 Port 3 mode register p01m 0xF8 Ports 0-1 mode register ipr 0xF9 Interrupt priority register irq 0xFA Interrupt request register imr 0xFB Interrupt mask register flags 0xFC Program control flags rp 0xFD Register pointer sph 0xFE Stack pointer high byte spl 0xFF Stack pointer low byte ;Expanded Register Group E mreg0 0xE00 Multiply/Divide unit mreg1 0xE01 Multiply/Divide unit mreg2 0xE02 Multiply/Divide unit mreg3 0xE03 Multiply/Divide unit mreg4 0xE04 Multiply/Divide unit mreg5 0xE05 Multiply/Divide unit mdcon 0xE06 Multiply/Divide control register ;Expanded Register Group D t2tmr 0xD01 T2 timer mode register t1h 0xD02 Timer/counter 1 high byte t2pre 0xD03 T2 prescaler register t0h 0xD04 Timer/counter 0 high byte t2h 0xD06 Timer/counter 2 high byte t2l 0xD07 Timer/counter 2 low byte t2caph 0xD08 t2capl 0xD09