; The format of the input file: ; each device definition begins with a line like this: ; ; .devicename ; ; after it go the port definitions in this format: ; ; portname address ; ; the bit definitions (optional) are represented like this: ; ; portname.bitname bitnumber ; ; lines beginning with a space are ignored. ; comment lines should be started with ';' character. ; ; the default device is specified at the start of the file ; ; .default device_name ; ; all lines non conforming to the format are passed to the callback function ; ; Rockwell C39 SPECIFIC LINES ;------------------------ ; ; the processor definition may include the memory configuration. ; the line format is: ; area CLASS AREA-NAME START:END ; ; where CLASS is anything, but please use one of CODE, DATA, BSS ; START and END are addresses, the end address is not included ; Interrupt vectors are declared in the following way: ; entry NAME ADDRESS COMMENT .default C39 .C39 ; MEMORY MAP area DATA SFR 0x0000:0x0040 Special Function Register area DATA IRAMS 0x0040:0x0080 Page 1 Segment Address area DATA IRAM0 0x0080:0x0100 Page 0 Internal RAM area DATA IRAM1 0x0100:0x0200 Page 1 Internal RAM area DATA IRAM2 0x0200:0x0300 Page 2 Internal RAM area DATA IRAM3 0x0300:0x0400 Page 3 Internal RAM area DATA IRAM4 0x0400:0x0480 Page 4 Internal RAM area DATA ICRC 0x0480:0x0500 CRC buffer Area area DATA IRAM5 0x0500:0x0600 Page 5 Internal RAM (UNAVAIL) area DATA IES4 0x0600:0x0800 Part of ES4 RAM ; Interrupt and reset vector assignments interrupt JSB0_ 0xFFE0 JBS0 Vector interrupt JSB1_ 0xFFE2 JBS1 Vector interrupt JSB2_ 0xFFE4 JBS2 Vector interrupt JSB3_ 0xFFE6 JBS3 Vector interrupt JSB4_ 0xFFE8 JBS4 Vector interrupt JSB5_ 0xFFEA JBS5 Vector interrupt JSB6_ 0xFFEC JBS6 Vector interrupt JSB7_ 0xFFEE JBS7 Vector interrupt INT0_ 0xFFF0 INT0 Vector interrupt TIMERA_ 0xFFF2 TIMER A Vector interrupt INT2_ 0xFFF4 INT2 Vector interrupt TIMERB_ 0xFFF6 TIMER B Vector interrupt INT4_ 0xFFF8 INT4 Vector interrupt NMI_ 0xFFFA NMI Vector interrupt RESET_ 0xFFFC Reset Vector interrupt PWR_INT 0xFFFE Start Vector ; INPUT/OUTPUT P_A 0x00 Port A (bidir) P_B 0x01 Port B (W) P_C 0x02 Port C (Bidir) P_AD 0x03 Port A Direction (R/O) P_DD 0x04 Port D Direction Controll P_BS 0x05 Port B Select (R/W) P_CD 0x06 Port C Direction (W) P_E 0x07 Port E (R/W) P_ED 0x08 Port E Direction/Mask option P_LPR 0x09 Low Power Register P_EI 0x0A External Interrupt Register P_CEI 0x0B Clear External Interrupt P_PTGBMODE 0x0C PTG B Mode (R/W) P_PBB 0x0D PBB (R/W) P_PBUL 0x0E PBUL, PBB to PBLL P_PBULC 0x0F PBUL PBB-PBLL Clear Download P_TAMODE 0x10 Timer A Mode P_TALC 0x11 Timer A LC, Timer A UC - Timer A S, Timer A LL P_TAS 0x12 Timer A S (R), Timer A UL (W) P_TASC 0x13 Timer A S, Timer A UL, Clear, Download P_TBMODE 0x14 Timer B Mode P_TBLC 0x15 Timer B LC, Timer B UC - Timer B S, Timer B LL P_TBS 0x16 Timer B S (R), Timer B UL (W) P_TBSC 0x17 Timer B S, Timer B UL, Clear, Download P_BANK0000 0x18 Bank switch register 0000-1FFF (R/W) P_BANK2000 0x19 Bank switch register 2000-3FFF (R/W) P_BANK4000 0x1A Bank switch register 4000-5FFF (R/W) P_BANK6000 0x1B Bank switch register 6000-7FFF (R/W) P_BANK8000 0x1C Bank switch register 8000-9FFF (R/W) P_BANKA000 0x1D Bank switch register A000-BFFF (R/W) P_BANKC000 0x1E Bank switch register C000-DFFF (R/W) P_BANKE000 0x1F Bank switch register E000-FFFF (R/W) P_TXRX 0x20 Tx/Rx FIFO buf P_LSR 0x21 LSR P_MSR 0x22 MSR P_LCR 0x23 line control register P_MCR 0x24 modem control register P_FIFOC 0x25 FIFO control P_SPRAM6 0x26 SP RAM 6 P_SCRR 0x27 scratch reg P_DLSB 0x28 divisor latch LSB P_DMSB 0x29 divisor latch MSB P_SPRAMA 0x2A SP RAM A P_SPRAMB 0x2B SP RAM B P_SPRAMC 0x2C SP RAM C P_SPRAMD 0x2D SP RAM D P_GPFE 0x2E GPFS P_HHR 0x2F host handshake register P_FSR 0x30 FSR P_FIER 0x31 FIER P_HCR 0x32 host control register P_CSF 0x33 chip select fast/slow P_PTGAMODE 0x34 PTG A mode P_PAB 0x35 PAB P_PAUL 0x36 PAUL, PAB-PALL P_PAULC 0x37 PAUL PAB-PALL clear download P_SIOBUF 0x38 serial I/O buffers P_SIE 0x39 serial interrupt enable P_SMR 0x3A serial mode register P_SLCR 0x3B serial line control register P_SSR 0x3C serial status register P_SFR 0x3D serial form register P_SOUTD 0x3E SOUT (RxD) divider latch (R) P_SIND 0x3F SIN (TxD) divider latch (R) .C29 ; MEMORY MAP area DATA SFR 0x0000:0x0040 Special Function Register area DATA IRAMS 0x0040:0x0080 Page 1 Segment Address area DATA IRAM0 0x0080:0x0100 Page 0 Internal RAM area DATA IRAM1 0x0100:0x0200 Page 1 Internal RAM area DATA IRAM2 0x0200:0x0300 Page 2 Internal RAM area DATA IRAM3 0x0300:0x0400 Page 3 Internal RAM area DATA IRAM4 0x0400:0x0480 Page 4 Internal RAM area DATA ICRC 0x0480:0x0500 CRC buffer Area area DATA IRAM5 0x0500:0x0600 Page 5 Internal RAM (UNAVAIL) area DATA IES4 0x0600:0x0800 Part of ES4 RAM ; Interrupt and reset vector assignments interrupt JSB0_ 0xFFE0 JBS0 Vector interrupt JSB1_ 0xFFE2 JBS1 Vector interrupt JSB2_ 0xFFE4 JBS2 Vector interrupt JSB3_ 0xFFE6 JBS3 Vector interrupt JSB4_ 0xFFE8 JBS4 Vector interrupt JSB5_ 0xFFEA JBS5 Vector interrupt JSB6_ 0xFFEC JBS6 Vector interrupt JSB7_ 0xFFEE JBS7 Vector interrupt INT0_ 0xFFF0 INT0 Vector interrupt TIMERA_ 0xFFF2 TIMER A Vector interrupt INT2_ 0xFFF4 INT2 Vector interrupt TIMERB_ 0xFFF6 TIMER B Vector interrupt INT4_ 0xFFF8 INT4 Vector interrupt NMI_ 0xFFFA NMI Vector interrupt RESET_ 0xFFFC Reset Vector interrupt PWR_INT 0xFFFE Start Vector ; INPUT/OUTPUT P_A 0x00 Port A (bidir) P_B 0x01 Port B (W) P_C 0x02 Port C (Bidir) P_AD 0x03 Port A Direction (R/O) P_DD 0x04 Port D Direction Controll P_BS 0x05 Port B Select (R/W) P_CD 0x06 Port C Direction (W) P_E 0x07 Port E (R/W) P_ED 0x08 Port E Direction/Mask option P_LPR 0x09 Low Power Register P_EI 0x0A External Interrupt Register P_CEI 0x0B Clear External Interrupt P_PTGBMODE 0x0C PTG B Mode (R/W) P_PBB 0x0D PBB (R/W) P_PBUL 0x0E PBUL, PBB to PBLL P_PBULC 0x0F PBUL PBB-PBLL Clear Download P_TAMODE 0x10 Timer A Mode P_TALC 0x11 Timer A LC, Timer A UC - Timer A S, Timer A LL P_TAS 0x12 Timer A S (R), Timer A UL (W) P_TASC 0x13 Timer A S, Timer A UL, Clear, Download P_TBMODE 0x14 Timer B Mode P_TBLC 0x15 Timer B LC, Timer B UC - Timer B S, Timer B LL P_TBS 0x16 Timer B S (R), Timer B UL (W) P_TBSC 0x17 Timer B S, Timer B UL, Clear, Download P_BANK0000 0x18 Bank switch register 0000-1FFF (R/W) P_BANK2000 0x19 Bank switch register 2000-3FFF (R/W) P_BANK4000 0x1A Bank switch register 4000-5FFF (R/W) P_BANK6000 0x1B Bank switch register 6000-7FFF (R/W) P_BANK8000 0x1C Bank switch register 8000-9FFF (R/W) P_BANKA000 0x1D Bank switch register A000-BFFF (R/W) P_BANKC000 0x1E Bank switch register C000-DFFF (R/W) P_BANKE000 0x1F Bank switch register E000-FFFF (R/W) P_TXRX 0x20 Tx/Rx P_TXBUF 0x21 Tx buffer P_SPRAM2 0x22 SP RAM 2 P_LCR 0x23 line control register P_MCR 0x24 modem control register P_SPRAM5 0x25 SP RAM 5 P_SPRAM6 0x26 SP RAM 6 P_SPRAM7 0x27 SP RAM 7 P_DLSB 0x28 divisor latch LSB P_DMSB 0x29 divisor latch MSB P_SPRAMA 0x2A SP RAM A P_SPRAMB 0x2B SP RAM B P_SPRAMC 0x2C SP RAM C P_SPRAMD 0x2D SP RAM D P_SPRAME 0x2E SP RAM E P_HHR 0x2F host handshake register P_LSR 0x30 LSR P_MSR 0x31 MSR P_HCR 0x32 host control register P_CSF 0x33 chip select fast/slow P_PTGAMODE 0x34 PTG A mode P_PAB 0x35 PAB P_PAUL 0x36 PAUL, PAB-PALL P_PAULC 0x37 PAUL PAB-PALL clear download P_SIOBUF 0x38 serial I/O buffers P_SIE 0x39 serial interrupt enable P_SMR 0x3A serial mode register P_SLCR 0x3B serial line control register P_SSR 0x3C serial status register P_SFR 0x3D serial form register P_SOUTD 0x3E SOUT (RxD) divider latch (R) P_SIND 0x3F SIN (TxD) divider latch (R) ; Some Datapump register's - RC(V)288DPi ;DPi Rx/voice Rx buf (RBUFFER/VBUFR) ;DPi VOLUME/VPAUSE/CELULR/xXHF/RXP ;DPi TDE/SQDIS/V54/S511/DCD/CODBITS ;DPi EPT/SEPT/SRCEN/RLSDE/ARC/SDIS ;DPi RB/EQT2/V32BS/FIFOEN/EQFZ/NRZIEN ;DPi ECFZ/ECSQ/FECSQ/TXSQ/CEQ/TTDIS ;DPi RTDIS/EXOS/CF17/HDLC/PEN/STB ;DPi RDLE/RDL/L2ACT/DDIS/L3ACT/RA ;DPi ASYN/TPDM/V21S/V54T/V54A/V54P ;DPi NV25/CC/DTMF/ORG/LL/DATA/RRTSE ;DPi PNSUC/FLAGDT/PE/FE/OE/CRCS/VSYNC ;DPi TONEx/ATV25/ATBEL/DISDET/EQMAT ;DPi AADET/ACDET/CADET/CCDET/SDET ;DPi P2DET/PNDET/S1DET/SCR1/U1DET ;DPi RTDET/BRKD/RREDT/V32BDT/SPEED ;DPi RLSD/FED/CTS/DSR/RI/TM/RTSDT ;DPi Tx/voice Tx buf (TBUFFER/VBUFT) ;DPi BRKS/PARSL/TXV/RXV/V23HDX/TEOF ;DPi configuration (CONF) ;DPi TLVL/RTH/TXCLK ;DPi handshake abort code (ABCODE) ;DPi SLEEP/RDWK/HWRWK/AUTO/RREN/EXL3 ;DPi sec Rx/V.34 Rx status (SECRXB) ;DPi sec Tx/V.34 Tx status (SECTXB) ;DPi memory access data LSB (MEDAL) ;DPi memory access data MSB (MEDAM) ;DPi SFRES/RIEN/RION/DMAE/SCOBF ;DPi EDET/DTDET/OTS/DTMFD/DTMF code ;DPi memory access addr LSB (MEADDL) ;DPi MEACC/MEMW/MEMCR/addr bits 8-11 ;DPi TDBIA/RDBIA/TDBIE/TDBE/RDBIE ;DPi NSIA/NCIA/NSIE/NEWS/NCIE/NEWC ;