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update to ida 7.6, add builds

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This commit is contained in:
josh
2021-10-31 21:20:46 +02:00
parent e0e0f2be99
commit b1809fe2d9
1408 changed files with 279193 additions and 302468 deletions
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1409
idasdk76/module/st7/ana.cpp Normal file
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156
idasdk76/module/st7/emu.cpp Normal file
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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-99 by Ilfak Guilfanov.
* ALL RIGHTS RESERVED.
* E-mail: ig@datarescue.com
*
*
*/
#include "st7.hpp"
//#include <frame.hpp>
//------------------------------------------------------------------------
static void process_immediate_number(const insn_t &insn, int n)
{
set_immd(insn.ea);
if ( is_defarg(get_flags(insn.ea), n) )
return;
switch ( insn.itype )
{
case ST7_bres:
case ST7_bset:
case ST7_btjf:
case ST7_btjt:
op_dec(insn.ea, n);
break;
}
}
//----------------------------------------------------------------------
ea_t calc_mem(const insn_t &insn, ea_t ea)
{
return to_ea(insn.cs, ea);
}
//----------------------------------------------------------------------
void st7_t::handle_operand(const insn_t &insn, const op_t &x, bool isload)
{
ea_t ea;
switch ( x.type )
{
case o_reg:
case o_phrase:
break;
case o_imm:
QASSERT(10111, isload);
process_immediate_number(insn, x.n);
if ( op_adds_xrefs(get_flags(insn.ea), x.n) )
insn.add_off_drefs(x, dr_O, 0);
break;
case o_mem:
if ( !is_forced_operand(insn.ea, x.n) )
{
ea = calc_mem(insn, x.addr);
insn.create_op_data(ea, x);
dref_t dref = isload || (insn.auxpref & aux_indir) ? dr_R : dr_W;
insn.add_dref(ea, x.offb, dref);
}
break;
case o_near:
{
cref_t ftype = fl_JN;
ea = calc_mem(insn, x.addr);
if ( has_insn_feature(insn.itype, CF_CALL) )
{
if ( !func_does_return(ea) )
flow = false;
ftype = fl_CN;
}
insn.add_cref(ea, x.offb, ftype);
}
break;
case o_displ:
process_immediate_number(insn, x.n);
if ( op_adds_xrefs(get_flags(insn.ea), x.n) && !is_forced_operand(insn.ea, x.n) )
insn.add_off_drefs(x, isload ? dr_R : dr_W, OOF_ADDR);
break;
default:
INTERR(10378);
}
}
//----------------------------------------------------------------------
int st7_t::st7_emu(const insn_t &insn)
{
uint32 Feature = insn.get_canon_feature(ph);
flow = ((Feature & CF_STOP) == 0);
if ( Feature & CF_USE1 ) handle_operand(insn, insn.Op1, true);
if ( Feature & CF_USE2 ) handle_operand(insn, insn.Op2, true);
if ( Feature & CF_USE3 ) handle_operand(insn, insn.Op3, true);
if ( Feature & CF_CHG1 ) handle_operand(insn, insn.Op1, false);
if ( Feature & CF_CHG2 ) handle_operand(insn, insn.Op2, false);
if ( Feature & CF_CHG3 ) handle_operand(insn, insn.Op3, false);
//
// Determine if the next instruction should be executed
//
if ( segtype(insn.ea) == SEG_XTRN )
flow = false;
if ( flow )
add_cref(insn.ea,insn.ea+insn.size,fl_F);
return 1;
}
//----------------------------------------------------------------------
int is_jump_func(const func_t * /*pfn*/, ea_t *jump_target)
{
*jump_target = BADADDR;
return 0; // means "don't know"
}
//----------------------------------------------------------------------
int may_be_func(const insn_t &) // can a function start here?
{
// if ( insn.itype == H8_push && isbp(insn.Op1.reg) ) return 100; // push.l er6
return 0;
}
//----------------------------------------------------------------------
int is_sane_insn(const insn_t &insn, int /*nocrefs*/)
{
if ( insn.itype == ST7_nop )
{
for ( int i=0; i < 8; i++ )
if ( get_word(insn.ea-i*2) != 0 )
return 1;
return 0; // too many nops in a row
}
return 1;
}
//----------------------------------------------------------------------
int idaapi is_align_insn(ea_t ea)
{
insn_t insn;
if ( decode_insn(&insn, ea) < 1 )
return 0;
switch ( insn.itype )
{
case ST7_nop:
break;
default:
return 0;
}
return insn.size;
}

81
idasdk76/module/st7/ins.cpp Normal file
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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-2000 by Ilfak Guilfanov.
* ALL RIGHTS RESERVED.
* E-mail: ig@datarescue.com
*
*
*/
#include "st7.hpp"
const instruc_t Instructions[] =
{
{ "", 0 }, // Unknown Operation
{ "adc", CF_CHG1|CF_USE1|CF_USE2 }, // Add with Carry
{ "add", CF_CHG1|CF_USE1|CF_USE2 }, // Addition
{ "and", CF_CHG1|CF_USE1|CF_USE2 }, // Logical And
{ "bcp", CF_USE1|CF_USE2 }, // Bit compare
{ "bres", CF_CHG1|CF_USE1 }, // Bit Reset
{ "bset", CF_CHG1|CF_USE1 }, // Bit Set
{ "btjf", CF_USE1|CF_USE2|CF_USE3 }, // Jump if bit is false
{ "btjt", CF_USE1|CF_USE2|CF_USE3 }, // Jump if bit is true
{ "call", CF_USE1|CF_CALL }, // Call subroutine
{ "callr", CF_USE1|CF_CALL }, // Call subroutine relative
{ "clr", CF_CHG1 }, // Clear
{ "cp", CF_USE1|CF_USE2 }, // Arithmetic Compare
{ "cpl", CF_USE1|CF_CHG1 }, // One Complement
{ "dec", CF_USE1|CF_CHG1 }, // Decrement
{ "halt", 0 }, // Halt
{ "iret", CF_STOP }, // Interrupt routine return
{ "inc", CF_USE1|CF_CHG1 }, // Increment
{ "jp", CF_USE1|CF_STOP }, // Absolute Jump
{ "jra", CF_USE1|CF_STOP }, // Jump relative always
{ "jrt", CF_USE1|CF_STOP }, // Jump relative
{ "jrf", CF_USE1 }, // Never jump
{ "jrih", CF_USE1 }, // Jump if Port INT pin = 1
{ "jril", CF_USE1 }, // Jump if Port INT pin = 0
{ "jrh", CF_USE1 }, // Jump if H = 1
{ "jrnh", CF_USE1 }, // Jump if H = 0
{ "jrm", CF_USE1 }, // Jump if I = 1
{ "jrnm", CF_USE1 }, // Jump if I = 0
{ "jrmi", CF_USE1 }, // Jump if N = 1 (minus)
{ "jrpl", CF_USE1 }, // Jump if N = 0 (plus)
{ "jreq", CF_USE1 }, // Jump if Z = 1 (equal)
{ "jrne", CF_USE1 }, // Jump if Z = 0 (not equal)
{ "jrc", CF_USE1 }, // Jump if C = 1
{ "jrnc", CF_USE1 }, // Jump if C = 0
{ "jrult", CF_USE1 }, // Jump if C = 1
{ "jruge", CF_USE1 }, // Jump if C = 0
{ "jrugt", CF_USE1 }, // Jump if ( C + Z = 0 )
{ "jrule", CF_USE1 }, // Jump if ( C + Z = 1 )
{ "ld", CF_CHG1|CF_USE2 }, // Load
{ "mul", CF_CHG1|CF_USE1|CF_USE2 }, // Multiply
{ "neg", CF_USE1|CF_CHG1 }, // Negate
{ "nop", 0 }, // No Operation
{ "or", CF_CHG1|CF_USE1|CF_USE2 }, // OR Operation
{ "pop", CF_CHG1 }, // Pop from the Stack
{ "push", CF_USE1 }, // Push onto the Stack
{ "rcf", 0 }, // Reset carry flag
{ "ret", CF_STOP }, // Subroutine Return
{ "rim", 0 }, // Enable Interrupts
{ "rlc", CF_USE1|CF_CHG1 }, // Rotate left true
{ "rrc", CF_USE1|CF_CHG1 }, // Rotate right true
{ "rsp", 0 }, // Reset Stack Pointer
{ "sbc", CF_CHG1|CF_USE1|CF_USE2 }, // Subtract with Carry
{ "scf", 0 }, // Set carry flag
{ "sim", 0 }, // Disable Interrupts
{ "sla", CF_USE1|CF_CHG1 }, // Shift left Arithmetic
{ "sll", CF_USE1|CF_CHG1 }, // Shift left Logic
{ "srl", CF_USE1|CF_CHG1 }, // Shift right Logic
{ "sra", CF_USE1|CF_CHG1 }, // Shift right Arithmetic
{ "sub", CF_CHG1|CF_USE1|CF_USE2 }, // Substraction
{ "swap", CF_USE1|CF_CHG1 }, // SWAP nibbles
{ "tnz", CF_USE1 }, // Test for Neg & Zero
{ "trap", 0 }, // S/W trap
{ "wfi", 0 }, // Wait for Interrupt
{ "xor", CF_CHG1|CF_USE1|CF_USE2 }, // Exclusive OR
};
CASSERT(qnumber(Instructions) == ST7_last);

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idasdk76/module/st7/ins.hpp Normal file
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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-2021 Hex-Rays
* ALL RIGHTS RESERVED.
*
*/
#ifndef __INSTRS_HPP
#define __INSTRS_HPP
extern const instruc_t Instructions[];
enum nameNum
{
ST7_null = 0, // Unknown Operation
ST7_adc, // Add with Carry
ST7_add, // Addition
ST7_and, // Logical And
ST7_bcp, // Bit compare
ST7_bres, // Bit Reset
ST7_bset, // Bit Set
ST7_btjf, // Jump if bit is false
ST7_btjt, // Jump if bit is true
ST7_call, // Call subroutine
ST7_callr, // Call subroutine relative
ST7_clr, // Clear
ST7_cp, // Arithmetic Compare
ST7_cpl, // One Complement
ST7_dec, // Decrement
ST7_halt, // Halt
ST7_iret, // Interrupt routine return
ST7_inc, // Increment
ST7_jp, // Absolute Jump
ST7_jra, // Jump relative always
ST7_jrt, // Jump relative
ST7_jrf, // Never jump
ST7_jrih, // Jump if Port INT pin = 1
ST7_jril, // Jump if Port INT pin = 0
ST7_jrh, // Jump if H = 1
ST7_jrnh, // Jump if H = 0
ST7_jrm, // Jump if I = 1
ST7_jrnm, // Jump if I = 0
ST7_jrmi, // Jump if N = 1 (minus)
ST7_jrpl, // Jump if N = 0 (plus)
ST7_jreq, // Jump if Z = 1 (equal)
ST7_jrne, // Jump if Z = 0 (not equal)
ST7_jrc, // Jump if C = 1
ST7_jrnc, // Jump if C = 0
ST7_jrult, // Jump if C = 1
ST7_jruge, // Jump if C = 0
ST7_jrugt, // Jump if (C + Z = 0)
ST7_jrule, // Jump if (C + Z = 1)
ST7_ld, // Load
ST7_mul, // Multiply
ST7_neg, // Negate
ST7_nop, // No Operation
ST7_or, // OR Operation
ST7_pop, // Pop from the Stack
ST7_push, // Push onto the Stack
ST7_rcf, // Reset carry flag
ST7_ret, // Subroutine Return
ST7_rim, // Enable Interrupts
ST7_rlc, // Rotate left true
ST7_rrc, // Rotate right true
ST7_rsp, // Reset Stack Pointer
ST7_sbc, // Subtract with Carry
ST7_scf, // Set carry flag
ST7_sim, // Disable Interrupts
ST7_sla, // Shift left Arithmetic
ST7_sll, // Shift left Logic
ST7_srl, // Shift right Logic
ST7_sra, // Shift right Arithmetic
ST7_sub, // Substraction
ST7_swap, // SWAP nibbles
ST7_tnz, // Test for Neg & Zero
ST7_trap, // S/W trap
ST7_wfi, // Wait for Interrupt
ST7_xor, // Exclusive OR
ST7_last,
};
#endif

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idasdk76/module/st7/makefile Normal file
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PROC=st7
CONFIGS=st7.cfg
include ../module.mak
# MAKEDEP dependency list ------------------
$(F)ana$(O) : $(I)auto.hpp $(I)bitrange.hpp $(I)bytes.hpp \
$(I)config.hpp $(I)diskio.hpp \
$(I)entry.hpp $(I)fpro.h $(I)funcs.hpp $(I)ida.hpp \
$(I)idp.hpp $(I)ieee.h $(I)kernwin.hpp $(I)lines.hpp \
$(I)llong.hpp $(I)loader.hpp \
$(I)nalt.hpp $(I)name.hpp \
$(I)netnode.hpp $(I)offset.hpp $(I)pro.h \
$(I)problems.hpp $(I)range.hpp $(I)segment.hpp \
$(I)ua.hpp $(I)xref.hpp ../idaidp.hpp ../iohandler.hpp \
ana.cpp ins.hpp st7.hpp
$(F)emu$(O) : $(I)auto.hpp $(I)bitrange.hpp $(I)bytes.hpp \
$(I)config.hpp $(I)diskio.hpp \
$(I)entry.hpp $(I)fpro.h $(I)funcs.hpp $(I)ida.hpp \
$(I)idp.hpp $(I)ieee.h $(I)kernwin.hpp $(I)lines.hpp \
$(I)llong.hpp $(I)loader.hpp \
$(I)nalt.hpp $(I)name.hpp \
$(I)netnode.hpp $(I)offset.hpp $(I)pro.h \
$(I)problems.hpp $(I)range.hpp $(I)segment.hpp \
$(I)ua.hpp $(I)xref.hpp ../idaidp.hpp ../iohandler.hpp \
emu.cpp ins.hpp st7.hpp
$(F)ins$(O) : $(I)auto.hpp $(I)bitrange.hpp $(I)bytes.hpp \
$(I)config.hpp $(I)diskio.hpp \
$(I)entry.hpp $(I)fpro.h $(I)funcs.hpp $(I)ida.hpp \
$(I)idp.hpp $(I)ieee.h $(I)kernwin.hpp $(I)lines.hpp \
$(I)llong.hpp $(I)loader.hpp \
$(I)nalt.hpp $(I)name.hpp \
$(I)netnode.hpp $(I)offset.hpp $(I)pro.h \
$(I)problems.hpp $(I)range.hpp $(I)segment.hpp \
$(I)ua.hpp $(I)xref.hpp ../idaidp.hpp ../iohandler.hpp \
ins.cpp ins.hpp st7.hpp
$(F)out$(O) : $(I)auto.hpp $(I)bitrange.hpp $(I)bytes.hpp \
$(I)config.hpp $(I)diskio.hpp \
$(I)entry.hpp $(I)fpro.h $(I)funcs.hpp $(I)ida.hpp \
$(I)idp.hpp $(I)ieee.h $(I)kernwin.hpp $(I)lines.hpp \
$(I)llong.hpp $(I)loader.hpp \
$(I)nalt.hpp $(I)name.hpp \
$(I)netnode.hpp $(I)offset.hpp $(I)pro.h \
$(I)problems.hpp $(I)range.hpp $(I)segment.hpp \
$(I)ua.hpp $(I)xref.hpp ../idaidp.hpp ../iohandler.hpp \
ins.hpp out.cpp st7.hpp
$(F)reg$(O) : $(I)auto.hpp $(I)bitrange.hpp $(I)bytes.hpp \
$(I)config.hpp $(I)diskio.hpp \
$(I)entry.hpp $(I)fpro.h $(I)funcs.hpp $(I)ida.hpp \
$(I)idp.hpp $(I)ieee.h $(I)kernwin.hpp $(I)lines.hpp \
$(I)llong.hpp $(I)loader.hpp \
$(I)nalt.hpp $(I)name.hpp \
$(I)netnode.hpp $(I)offset.hpp $(I)pro.h \
$(I)problems.hpp $(I)range.hpp $(I)segment.hpp \
$(I)ua.hpp $(I)xref.hpp ../idaidp.hpp ../iohandler.hpp \
ins.hpp reg.cpp st7.hpp

245
idasdk76/module/st7/out.cpp Normal file
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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-2000 by Ilfak Guilfanov.
* ALL RIGHTS RESERVED.
* E-mail: ig@datarescue.com
*
*
*/
#include "st7.hpp"
//----------------------------------------------------------------------
class out_st7_t : public outctx_t
{
out_st7_t(void) = delete; // not used
public:
void outreg(int r) { out_register(ph.reg_names[r]); }
void outmem(const op_t &x, ea_t ea);
bool out_operand(const op_t &x);
void out_insn(void);
};
CASSERT(sizeof(out_st7_t) == sizeof(outctx_t));
DECLARE_OUT_FUNCS_WITHOUT_OUTMNEM(out_st7_t)
//----------------------------------------------------------------------
void out_st7_t::outmem(const op_t &x, ea_t ea)
{
qstring qbuf;
if ( get_name_expr(&qbuf, insn.ea+x.offb, x.n, ea, BADADDR) <= 0 )
{
st7_t &pm = *static_cast<st7_t *>(procmod);
const ioport_t *p = pm.find_sym(x.addr);
if ( p == NULL )
{
out_tagon(COLOR_ERROR);
out_btoa(x.addr, 16);
out_tagoff(COLOR_ERROR);
remember_problem(PR_NONAME, insn.ea);
}
else
{
out_line(p->name.c_str(), COLOR_IMPNAME);
}
}
else
{
bool complex = strchr(qbuf.begin(), '+') || strchr(qbuf.begin(), '-');
if ( complex )
out_symbol(ash.lbrace);
out_line(qbuf.begin());
if ( complex )
out_symbol(ash.rbrace);
}
}
//----------------------------------------------------------------------
bool out_st7_t::out_operand(const op_t &x)
{
switch ( x.type )
{
case o_void:
return 0;
case o_reg:
outreg(x.reg);
break;
case o_imm:
out_symbol('#');
out_value(x, OOFS_IFSIGN|OOFW_IMM);
break;
case o_displ:
// o_displ Short Direct Indexed ld A,($10,X) 00..1FE + 1
// o_displ Long Direct Indexed ld A,($1000,X) 0000..FFFF + 2
out_symbol('(');
out_value(x, OOFS_IFSIGN
|OOF_ADDR
|((insn.auxpref & aux_16) ? OOFW_16 : OOFW_8));
out_symbol(',');
outreg(x.reg);
out_symbol(')');
break;
case o_phrase:
out_symbol('(');
outreg(x.reg);
out_symbol(')');
break;
case o_mem:
// o_mem Short Direct ld A,$10 00..FF + 1
// o_mem Long Direct ld A,$1000 0000..FFFF + 2
// o_mem Short Indirect ld A,[$10] 00..FF 00..FF byte + 2
// o_mem Long Indirect ld A,[$10.w] 0000..FFFF 00..FF word + 2
// o_mem Short Indirect Indexed ld A,([$10],X) 00..1FE 00..FF byte + 2
// o_mem Long Indirect Indexed ld A,([$10.w],X) 0000..FFFF 00..FF word + 2
// o_mem Relative Indirect jrne [$10] PC+/-127 00..FF byte + 2
// o_mem Bit Direct bset $10,#7 00..FF + 1
// o_mem Bit Indirect bset [$10],#7 00..FF 00..FF byte + 2
// o_mem Bit Direct Relative btjt $10,#7,skip 00..FF + 2
// o_mem Bit Indirect Relative btjt [$10],#7,skip 00..FF 00..FF byte + 3
if ( insn.auxpref & aux_index )
out_symbol('(');
if ( insn.auxpref & aux_indir )
out_symbol('[');
outmem(x, calc_mem(insn, x.addr));
if ( insn.auxpref & aux_long )
{
out_symbol('.');
out_symbol('w');
}
if ( insn.auxpref & aux_indir )
out_symbol(']');
if ( insn.auxpref & aux_index )
{
out_symbol(',');
outreg(x.reg);
out_symbol(')');
}
break;
case o_near:
outmem(x, calc_mem(insn, x.addr));
break;
default:
INTERR(10379);
}
return 1;
}
//----------------------------------------------------------------------
void out_st7_t::out_insn(void)
{
out_mnemonic();
out_one_operand(0);
if ( insn.Op2.type != o_void )
{
out_symbol(',');
out_char(' ');
out_one_operand(1);
}
if ( insn.Op3.type != o_void )
{
out_symbol(',');
out_char(' ');
out_one_operand(2);
}
out_immchar_cmts();
flush_outbuf();
}
//--------------------------------------------------------------------------
//lint -esym(1764, ctx) could be made const
//lint -esym(818, seg) could be made const
void idaapi st7_segstart(outctx_t &ctx, segment_t *seg)
{
if ( is_spec_segm(seg->type) )
return;
const char *align;
switch ( seg->align )
{
case saAbs: align = "at: "; break;
case saRelByte: align = "byte"; break;
case saRelWord: align = "word"; break;
case saRelPara: align = "para"; break;
case saRelPage: align = "page"; break;
case saRel4K: align = "4k"; break;
case saRel64Bytes: align = "64"; break;
default: align = NULL; break;
}
if ( align == NULL )
{
ctx.gen_cmt_line("Segment alignment '%s' cannot be represented in assembly",
get_segment_alignment(seg->align));
align = "";
}
qstring sname;
qstring sclas;
get_visible_segm_name(&sname, seg);
get_segm_class(&sclas, seg);
ctx.out_printf(SCOLOR_ON SCOLOR_ASMDIR "%-*s segment %s ",
inf_get_indent()-1,
sname.c_str(),
align);
if ( seg->align == saAbs )
{
ea_t absbase = get_segm_base(seg);
ctx.out_btoa(absbase);
ctx.out_char(' ');
}
const char *comb;
switch ( seg->comb )
{
case scPub:
case scPub2:
case scPub3: comb = ""; break;
case scCommon: comb = "common"; break;
default: comb = NULL; break;
}
if ( comb == NULL )
{
ctx.gen_cmt_line("Segment combination '%s' cannot be represented in assembly",
get_segment_combination(seg->comb));
comb = "";
}
ctx.out_printf("%s '%s'", comb, sclas.c_str());
ctx.out_tagoff(COLOR_ASMDIR);
ctx.flush_outbuf(0);
}
//--------------------------------------------------------------------------
void idaapi st7_segend(outctx_t &, segment_t *)
{
}
//--------------------------------------------------------------------------
void idaapi st7_header(outctx_t &ctx)
{
ctx.gen_header(GH_PRINT_PROC | GH_PRINT_HEADER);
ctx.gen_empty_line();
}
//--------------------------------------------------------------------------
void st7_t::st7_footer(outctx_t &ctx) const
{
qstring nbuf = get_colored_name(inf_get_start_ea());
const char *name = nbuf.c_str();
const char *end = ash.end;
if ( end == NULL )
ctx.gen_printf(DEFAULT_INDENT, COLSTR("%s end %s",SCOLOR_AUTOCMT), ash.cmnt, name);
else
ctx.gen_printf(DEFAULT_INDENT,
COLSTR("%s",SCOLOR_ASMDIR) " " COLSTR("%s %s",SCOLOR_AUTOCMT),
ash.end, ash.cmnt, name);
}

341
idasdk76/module/st7/reg.cpp Normal file
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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-2000 by Ilfak Guilfanov.
* ALL RIGHTS RESERVED.
* E-mail: ig@datarescue.com
*
*
*/
#include "st7.hpp"
#include <diskio.hpp>
int data_id;
//--------------------------------------------------------------------------
static const char *const register_names[] =
{
"a", "x", "y", "cc", "s",
"ds", "cs",
};
//--------------------------------------------------------------------------
static const uchar retcode0[] = { 0x80 }; // iret 80
static const uchar retcode1[] = { 0x81 }; // ret 81
static const bytes_t retcodes[] =
{
{ sizeof(retcode0), retcode0 },
{ sizeof(retcode1), retcode1 },
{ 0, NULL }
};
//-----------------------------------------------------------------------
// STMicroelectronics - Assembler - rel. 4.10
// We support Motorola format
//-----------------------------------------------------------------------
static const char *const st7_headers[] =
{
"st7/",
"",
NULL
};
static const asm_t stasm =
{
ASH_HEXF4 // $1234
|ASD_DECF0 // 1234
|ASB_BINF2 // %1010
|ASO_OCTF6 // ~1234
|AS_NOXRF // Disable xrefs during the output file generation
|AS_ONEDUP, // one array definition per line
0,
"STMicroelectronics - Assembler",
0,
st7_headers, // header lines
"org", // org
"end", // end
";", // comment string
'\"', // string delimiter
'\'', // char delimiter
"'\"", // special symbols in char and string constants
"dc.b", // ascii string directive
"dc.b", // byte directive
"dc.w", // word directive
"dc.l", // double words
NULL, // qwords
NULL, // oword (16 bytes)
NULL, // float (4 bytes)
NULL, // double (8 bytes)
NULL, // tbyte (10/12 bytes)
NULL, // packed decimal real
"skip#s( )#d, #v", // arrays (#h,#d,#v,#s(...) ONLY BYTE ARRAYS!!!
"ds.b %s", // uninited arrays
"equ", // equ
NULL, // 'seg' prefix (example: push seg seg001)
"*", // current IP (instruction pointer)
NULL, // func_header
NULL, // func_footer
"public", // "public" name keyword
NULL, // "weak" name keyword
"extern", // "extrn" name keyword
// .extern directive requires an explicit object size
NULL, // "comm" (communal variable)
NULL, // get_type_name
NULL, // "align" keyword
'{', '}', // lbrace, rbrace
NULL, // mod
"and", // and
"or", // or
"xor", // xor
NULL, // not
"shl", // shl
"shr", // shr
NULL, // sizeof
AS2_BRACE,
};
static const asm_t *const asms[] = { &stasm, NULL };
//--------------------------------------------------------------------------
//static const char cfgname[] = "st7.cfg";
//----------------------------------------------------------------------
const ioport_t *st7_t::find_sym(ea_t address)
{
const ioport_t *port = find_ioport(ioh.ports, address);
return port;
}
//----------------------------------------------------------------------
void st7_t::create_words(void)
{
for ( int i=0; i < ioh.ports.size(); i++ )
{
ea_t ea = ioh.ports[i].address;
if ( is_tail(get_flags(ea)) )
del_items(ea, DELIT_SIMPLE);
create_word(ea, 2);
}
}
//--------------------------------------------------------------------------
const char *st7_t::set_idp_options(
const char *keyword,
int /*value_type*/,
const void * /*value*/,
bool /*idb_loaded*/)
{
if ( keyword != NULL )
return IDPOPT_BADKEY;
char cfgfile[QMAXFILE];
ioh.get_cfg_filename(cfgfile, sizeof(cfgfile));
if ( choose_ioport_device(&ioh.device, cfgfile) )
ioh.set_device_name(ioh.device.c_str(), IORESP_PORT|IORESP_INT);
return IDPOPT_OK;
}
//----------------------------------------------------------------------
void st7_t::load_from_idb()
{
ioh.restore_device();
}
//----------------------------------------------------------------------
// This old-style callback only returns the processor module object.
static ssize_t idaapi notify(void *, int msgid, va_list)
{
if ( msgid == processor_t::ev_get_procmod )
return size_t(SET_MODULE_DATA(st7_t));
return 0;
}
//--------------------------------------------------------------------------
ssize_t idaapi st7_t::on_event(ssize_t msgid, va_list va)
{
int code = 0;
switch ( msgid )
{
case processor_t::ev_init:
helper.create(PROCMOD_NODE_NAME);
inf_set_be(true);
break;
case processor_t::ev_term:
ioh.ports.clear();
clr_module_data(data_id);
break;
case processor_t::ev_newfile: // new file loaded
{
char cfgfile[QMAXFILE];
ioh.get_cfg_filename(cfgfile, sizeof(cfgfile));
if ( choose_ioport_device(&ioh.device, cfgfile) )
ioh.set_device_name(ioh.device.c_str(), IORESP_ALL);
create_words();
}
break;
case processor_t::ev_ending_undo:
case processor_t::ev_oldfile: // old file loaded
load_from_idb();
break;
case processor_t::ev_is_jump_func:
{
const func_t *pfn = va_arg(va, const func_t *);
ea_t *jump_target = va_arg(va, ea_t *);
return is_jump_func(pfn, jump_target);
}
case processor_t::ev_is_sane_insn:
{
const insn_t *insn = va_arg(va, insn_t *);
int no_crefs = va_arg(va, int);
return is_sane_insn(*insn, no_crefs) == 1 ? 1 : -1;
}
case processor_t::ev_may_be_func:
{
const insn_t *insn = va_arg(va, insn_t *);
return may_be_func(*insn);
}
case processor_t::ev_out_header:
{
outctx_t *ctx = va_arg(va, outctx_t *);
st7_header(*ctx);
return 1;
}
case processor_t::ev_out_footer:
{
outctx_t *ctx = va_arg(va, outctx_t *);
st7_footer(*ctx);
return 1;
}
case processor_t::ev_out_segstart:
{
outctx_t *ctx = va_arg(va, outctx_t *);
segment_t *seg = va_arg(va, segment_t *);
st7_segstart(*ctx, seg);
return 1;
}
case processor_t::ev_out_segend:
{
outctx_t *ctx = va_arg(va, outctx_t *);
segment_t *seg = va_arg(va, segment_t *);
st7_segend(*ctx, seg);
return 1;
}
case processor_t::ev_ana_insn:
{
insn_t *out = va_arg(va, insn_t *);
return st7_ana(out);
}
case processor_t::ev_emu_insn:
{
const insn_t *insn = va_arg(va, const insn_t *);
return st7_emu(*insn) ? 1 : -1;
}
case processor_t::ev_out_insn:
{
outctx_t *ctx = va_arg(va, outctx_t *);
out_insn(*ctx);
return 1;
}
case processor_t::ev_out_operand:
{
outctx_t *ctx = va_arg(va, outctx_t *);
const op_t *op = va_arg(va, const op_t *);
return out_opnd(*ctx, *op) ? 1 : -1;
}
case processor_t::ev_set_idp_options:
{
const char *keyword = va_arg(va, const char *);
int value_type = va_arg(va, int);
const char *value = va_arg(va, const char *);
const char **errmsg = va_arg(va, const char **);
bool idb_loaded = va_argi(va, bool);
const char *ret = set_idp_options(keyword, value_type, value, idb_loaded);
if ( ret == IDPOPT_OK )
return 1;
if ( errmsg != NULL )
*errmsg = ret;
return -1;
}
case processor_t::ev_is_align_insn:
{
ea_t ea = va_arg(va, ea_t);
return is_align_insn(ea);
}
default:
break;
}
return code;
}
//-----------------------------------------------------------------------
#define FAMILY "SGS-Thomson ST7:"
static const char *const shnames[] = { "st7", NULL };
static const char *const lnames[] =
{
FAMILY"SGS-Thomson ST7",
NULL
};
//-----------------------------------------------------------------------
// Processor Definition
//-----------------------------------------------------------------------
processor_t LPH =
{
IDP_INTERFACE_VERSION, // version
PLFM_ST7, // id
// flag
PRN_HEX
| PR_RNAMESOK,
// flag2
PR2_IDP_OPTS, // the module has processor-specific configuration options
8, // 8 bits in a byte for code segments
8, // 8 bits in a byte for other segments
shnames,
lnames,
asms,
notify,
register_names, // Register names
qnumber(register_names), // Number of registers
ds, // first
cs, // last
2, // size of a segment register
cs, ds,
NULL, // No known code start sequences
retcodes,
ST7_null,
ST7_last,
Instructions, // instruc
0, // int tbyte_size; -- doesn't exist
{ 0, 7, 15, 0 }, // char real_width[4];
// number of symbols after decimal point
// 2byte float (0-does not exist)
// normal float
// normal double
// long double
ST7_ret, // Icode of return instruction. It is ok to give any of possible return instructions
};

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/*
* Interactive disassembler (IDA).
* Copyright (c) 1990-2000 by Ilfak Guilfanov.
* ALL RIGHTS RESERVED.
* E-mail: ig@datarescue.com
*
*
*/
#ifndef _ST7_HPP
#define _ST7_HPP
#include "../idaidp.hpp"
#include <diskio.hpp>
#include "ins.hpp"
#include "../iohandler.hpp"
#define PROCMOD_NAME st7
#define PROCMOD_NODE_NAME "$ st7"
// o_void Inherent nop
// o_imm Immediate ld A,#$55
// o_mem Direct ld A,$55
// o_displ Indexed ld A,($55,X)
// o_mem Indirect ld A,([$55],X)
// o_near Relative jrne loop
// o_mem Bit operation bset byte,#5
// type Mode Syntax Destination Ptradr PtrSz Len
// ------- --------------------------- ------------------------ ---------- ------ ---- ---
// o_void Inherent nop + 0
// o_imm Immediate ld A,#$55 + 1
// o_mem Short Direct ld A,$10 00..FF + 1
// o_mem Long Direct ld A,$1000 0000..FFFF + 2
// o_phras No Offset Direct Indexed ld A,(X) 00..FF + 0
// o_displ Short Direct Indexed ld A,($10,X) 00..1FE + 1
// o_displ Long Direct Indexed ld A,($1000,X) 0000..FFFF + 2
// o_mem Short Indirect ld A,[$10] 00..FF 00..FF byte + 2
// o_mem Long Indirect ld A,[$10.w] 0000..FFFF 00..FF word + 2
// o_mem Short Indirect Indexed ld A,([$10],X) 00..1FE 00..FF byte + 2
// o_mem Long Indirect Indexed ld A,([$10.w],X) 0000..FFFF 00..FF word + 2
// o_near Relative Direct jrne loop PC+/-127 + 1
// o_mem Relative Indirect jrne [$10] PC+/-127 00..FF byte + 2
// o_mem Bit Direct bset $10,#7 00..FF + 1
// o_mem Bit Indirect bset [$10],#7 00..FF 00..FF byte + 2
// o_mem Bit Direct Relative btjt $10,#7,skip 00..FF + 2
// o_mem Bit Indirect Relative btjt [$10],#7,skip 00..FF 00..FF byte + 3
#define aux_long 0x0001 // long addressing mode
#define aux_indir 0x0002 // o_mem: indirect addressing mode
#define aux_index 0x0004 // o_mem: indexed addressing mode
#define aux_16 0x0008 // 16bit displacement
//------------------------------------------------------------------
#ifdef _MSC_VER
#define ENUM8BIT : uint8
#else
#define ENUM8BIT
#endif
enum regnum_t ENUM8BIT
{
A, X, Y, CC, S,
ds, cs,
};
//------------------------------------------------------------------
struct st7_iohandler_t : public iohandler_t
{
st7_iohandler_t(netnode &nn) : iohandler_t(nn) {}
};
struct st7_t : public procmod_t
{
netnode helper;
st7_iohandler_t ioh = st7_iohandler_t(helper);
bool flow;
virtual ssize_t idaapi on_event(ssize_t msgid, va_list va) override;
const ioport_t *find_sym(ea_t address);
void create_words(void);
const char *idaapi set_idp_options(
const char *keyword,
int /*value_type*/,
const void * /*value*/,
bool /*idb_loaded*/);
int st7_emu(const insn_t &insn);
void handle_operand(const insn_t &insn, const op_t &x, bool isload);
void st7_footer(outctx_t &ctx) const;
void load_from_idb();
};
extern int data_id;
//------------------------------------------------------------------
ea_t calc_mem(const insn_t &insn, ea_t ea); // map virtual to physical ea
//------------------------------------------------------------------
void idaapi st7_header(outctx_t &ctx);
void idaapi st7_segstart(outctx_t &ctx, segment_t *seg);
void idaapi st7_segend(outctx_t &ctx, segment_t *seg);
void idaapi st7_assumes(outctx_t &ctx); // function to produce assume directives
int idaapi st7_ana(insn_t *insn);
int idaapi is_align_insn(ea_t ea);
int is_jump_func(const func_t *pfn, ea_t *jump_target);
int is_sane_insn(const insn_t &insn, int nocrefs);
int may_be_func(const insn_t &insn); // can a function start here?
#endif // _ST7_HPP