update to ida 7.6, add builds
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190
idasdk76/module/m32r/m32r.hpp
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190
idasdk76/module/m32r/m32r.hpp
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#ifndef _M32R_HPP
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#define _M32R_HPP
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#include "../idaidp.hpp"
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#include "ins.hpp"
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#include <diskio.hpp>
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#include <frame.hpp>
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#include "../iohandler.hpp"
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#define PROCMOD_NAME m32r
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#define PROCMOD_NODE_NAME "$ m32r"
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// Flags for operand specflag1
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#define NEXT_INSN_PARALLEL_NOP 0x0001 // next insn is a // nop
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#define NEXT_INSN_PARALLEL_DSP 0x0002 // next insn is a // dsp
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#define NEXT_INSN_PARALLEL_OTHER 0x0004 // next insn is an other // insn
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#define SYNTHETIC_SHORT 0x0010 // insn is synthetic short (ex bc.s)
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#define SYNTHETIC_LONG 0x0020 // insn is synthetic long (ex bc.l)
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#define HAS_MSB 0x0100 // insn _has_ its MSB to 1
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// Synthetic instructions list:
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/*
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m32r :
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bc.s label bc label [8-bit offset]
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bc.l label bc label [24-bit offset]
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bl.s label bl label [8-bit offset]
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bl.l label bl label [24-bit offset]
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bnc.s label bnc label [8-bit offset]
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bnc.l label bnc label [24-bit offset]
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bra.s label bra label [8-bit offset]
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bra.l label bra label [24-bit offset]
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ldi8 reg, #const ldi reg, #const [8-bit constant]
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ldi16 reg, #const ldi reg, #const [16-bit constant]
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push reg st reg, @-sp
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pop reg ld reg, @sp+
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m32rx :
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bcl.s label bcl label [8 bit offset]
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bcl.l label bcl label [24 bit offset]
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bncl.s label bncl label [8 bit offset]
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bncl.l label bncl label [24 bit offset]
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*/
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// Register aliases list:
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/*
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m32r :
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r13 fp
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r14 lr
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r15 sp
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cr0 psw
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cr1 cbr
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cr2 spi
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cr3 spu
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cr6 bpc
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m32rx :
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cr8 bbpsw
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cr14 bbpc
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*/
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// define some shortcuts
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#define rFP rR13
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#define rLR rR14
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#define rSP rR15
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#define rPSW rCR0
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#define rCBR rCR1
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#define rSPI rCR2
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#define rSPU rCR3
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#define rBPC rCR6
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#define rFPSR rCR7
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// m32rx only
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#define rBBPSW rCR8
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#define rBBPC rCR14
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// m32r registers
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enum m32r_registers
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{
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// General-purpose registers
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rR0, rR1, rR2, rR3, rR4,
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rR5, rR6, rR7, rR8, rR9,
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rR10, rR11, rR12, rR13, rR14, rR15,
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// Control registers
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rCR0, rCR1, rCR2, rCR3, rCR6,
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// Program counter
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rPC,
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// m32rx special registers
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rA0, rA1, // Accumulators
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rCR4, rCR5, rCR7, rCR8, rCR9, // Add. control registers
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rCR10, rCR11, rCR12, rCR13, rCR14, rCR15,
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rVcs, rVds // these 2 registers are required by the IDA kernel
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};
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// m32r indirect addressing mode
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enum m32r_phrases
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{
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fRI, // @R Register indirect
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fRIBA, // @R+ Register indirect update before add
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fRIAA, // @+R Register indirect update after add
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fRIAS // @-R Register indirect update after sub
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};
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// this module supports 2 processors: m32r and m32rx
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enum processor_subtype_t
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{
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prc_m32r = 0,
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prc_m32rx = 1
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};
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// exporting our routines
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void idaapi m32r_footer(outctx_t &ctx);
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void idaapi m32r_segstart(outctx_t &ctx, segment_t *seg);
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int idaapi emu(const insn_t &insn);
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bool idaapi create_func_frame(func_t *pfn);
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int idaapi m32r_get_frame_retsize(const func_t *pfn);
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int idaapi is_sp_based(const insn_t &insn, const op_t &op);
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bool idaapi can_have_type(const op_t &op);
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int m32r_create_switch_xrefs(ea_t insn_ea, const switch_info_t &si);
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int m32r_calc_switch_cases(casevec_t *casevec, eavec_t *targets, ea_t insn_ea, const switch_info_t &si);
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//------------------------------------------------------------------
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struct opcode;
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struct m32r_iohandler_t : public iohandler_t
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{
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struct m32r_t ±
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m32r_iohandler_t(m32r_t &_pm, netnode &nn) : iohandler_t(nn), pm(_pm) {}
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virtual void get_cfg_filename(char *buf, size_t bufsize) override;
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};
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struct m32r_t : public procmod_t
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{
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// altval(-1) -> idpflags
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// supstr(-1) -> device
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netnode helper;
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m32r_iohandler_t ioh = m32r_iohandler_t(*this, helper);
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#define IDP_SYNTHETIC 0x0001 // use synthetic instructions
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#define IDP_REG_ALIASES 0x0002 // use register aliases
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uint32 idpflags = IDP_SYNTHETIC | IDP_REG_ALIASES;
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inline bool use_synthetic_insn(void) { return (idpflags & IDP_SYNTHETIC) != 0; }
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inline bool use_reg_aliases(void) { return (idpflags & IDP_REG_ALIASES) != 0; }
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// Current processor type (prc_m32r or prc_m32rx)
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processor_subtype_t ptype = prc_m32r;
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bool flow = false;
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virtual ssize_t idaapi on_event(ssize_t msgid, va_list va) override;
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const char *set_idp_options(
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const char *keyword,
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int /*value_type*/,
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const void * /*value*/,
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bool idb_loaded);
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void handle_new_flags(bool save=true);
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const ioport_t *find_sym(ea_t address);
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int ana(insn_t *_insn);
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const opcode *get_opcode(int word) const;
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bool ana_special(insn_t &insn, int word, int *s) const;
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int parse_fp_insn(insn_t &insn, int word);
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void m32r_header(outctx_t &ctx);
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inline const char *ptype_str(void) const;
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void handle_operand(const insn_t &insn, const op_t &op, bool loading);
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int emu(const insn_t &insn);
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void save_idpflags() { helper.altset(-1, idpflags); }
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void load_from_idb();
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};
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extern int data_id;
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#endif /* _M32R_HPP */
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