olari/sigmaker-ida
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

update to ida 7.6, add builds

Browse Source
This commit is contained in:
josh
2021-10-31 21:20:46 +02:00
parent e0e0f2be99
commit b1809fe2d9
1408 changed files with 279193 additions and 302468 deletions
Download Patch File Download Diff File Expand all files Collapse all files

104
idasdk76/ldr/elf/common.cpp Normal file
View File

@@ -0,0 +1,104 @@
/*
* Interactive disassembler (IDA)
* Copyright (c) 1990-98 by Ilfak Guilfanov.
* E-mail: ig@datarescue.com
* ELF binary loader.
* Copyright (c) 1995-2006 by Iouri Kharon.
* E-mail: yjh@styx.cabel.net
*
* ALL RIGHTS RESERVED.
*
*/
#include <idp.hpp>
#include "elfbase.h"
//--------------------------------------------------------------------------
// Functions common for EFD & DEBUGGER
//--------------------------------------------------------------------------
//--------------------------------------------------------------------------
static bool dummy_error_handler(const reader_t &, reader_t::errcode_t, ...)
{
// ignore all errors
return true;
}
//--------------------------------------------------------------------------
bool is_elf_file(linput_t *li)
{
reader_t reader(li);
reader.set_handler(dummy_error_handler);
return reader.read_ident() && reader.read_header();
}
//--------------------------------------------------------------------------
inline bool can_be_solaris(reader_t &reader)
{
switch ( reader.get_header().e_machine )
{
case EM_SPARC:
case EM_SPARC32PLUS:
case EM_SPARC64:
case EM_386:
case EM_486:
case EM_X86_64:
return true;
}
return false;
}
//--------------------------------------------------------------------------
int elf_machine_2_proc_module_id(reader_t &reader)
{
int id = -1;
switch ( reader.get_header().e_machine )
{
#define CASE(E_ID, P_ID) case EM_##E_ID: id = PLFM_##P_ID; break
CASE(ARM, ARM);
CASE(SH, SH);
CASE(PPC, PPC);
CASE(PPC64, PPC);
CASE(860, I860);
CASE(68K, 68K);
CASE(MIPS, MIPS);
CASE(CISCO7200, MIPS);
CASE(CISCO3620, MIPS);
CASE(386, 386);
CASE(486, 386);
CASE(X86_64, 386);
CASE(SPARC, SPARC);
CASE(SPARC32PLUS, SPARC);
CASE(SPARC64, SPARC);
CASE(ALPHA, ALPHA);
CASE(IA64, IA64);
CASE(H8300, H8);
CASE(H8300H, H8);
CASE(H8S, H8);
CASE(H8500, H8);
CASE(V850, NEC_V850X);
CASE(NECV850, NEC_V850X);
CASE(PARISC, HPPA);
CASE(6811, 6800);
CASE(6812, MC6812);
CASE(I960, I960);
CASE(ARC, ARC);
CASE(ARCOMPACT, ARC);
CASE(ARC_COMPACT2, ARC);
CASE(M32R, M32R);
CASE(ST9, ST9);
CASE(FR, FR);
CASE(AVR, AVR);
CASE(SPU, SPU);
CASE(C166, C166);
CASE(M16C, M16C);
CASE(MN10200, MN102L00);
// CASE(MN10300, MN103L00); // FIXME: Dunno what to do, here.
// CASE(MCORE, MCORE); // FIXME: PLFM_MCORE still defined in mcore/reg.cpp
CASE(S390, S390);
#undef CASE
}
return id;
}

3249
idasdk76/ldr/elf/elf.h Normal file
View File

File diff suppressed because it is too large Load Diff

1014
idasdk76/ldr/elf/elfbase.h Normal file
View File

File diff suppressed because it is too large Load Diff

542
idasdk76/ldr/elf/elfr_arm.h Normal file
View File

@@ -0,0 +1,542 @@
#ifndef __ELFR_ARM_H__
#define __ELFR_ARM_H__
#ifndef __ELFBASE_H__
#include "elfbase.h"
#endif
// relocation field - word32 with HIGH BYTE FIRST!!!
// A- from Elf32_Rela
// B- Loading address of shared object (REAL section when symbol defined)
// (not) G- offset into global objet table
// (not) GOT- adress of global object table
// (not) L- linkage table entry
// P- place of storage unit (computed using r_offset)
// S- value of symbol
enum elf_RTYPE_arm
{
R_ARM_NONE = 0, // No reloc
R_ARM_PC24 = 1, // S-P+A (relative 26 bit branch)
R_ARM_ABS32 = 2, // S+A
R_ARM_REL32 = 3, // S-P+A
R_ARM_LDR_PC_G0 = 4, // S-P+A
R_ARM_ABS16 = 5, // S+A
R_ARM_ABS12 = 6, // S+A
R_ARM_THM_ABS5 = 7, // S+A
R_ARM_ABS8 = 8, // S+A
R_ARM_SBREL32 = 9, // S-B+A
R_ARM_THM_CALL = 10, // S-P+A
R_ARM_THM_PC8 = 11, // S-P+A
R_ARM_BREL_ADJ = 12, // S-B+A
R_ARM_TLS_DESC = 13, //
R_ARM_THM_SWI8 = 14, // S+A (obsolete)
R_ARM_XPC25 = 15, // S-P+A (obsolete)
R_ARM_THM_XPC22 = 16, // S-P+A (obsolete)
R_ARM_TLS_DTPMOD32 = 17, /* ID of module containing symbol */
R_ARM_TLS_DTPOFF32 = 18, /* Offset in TLS block */
R_ARM_TLS_TPOFF32 = 19, /* Offset in static TLS block */
// linux-specific
R_ARM_COPY = 20, // none (copy symbol at runtime)
R_ARM_GLOB_DAT = 21, // S (create .got entry)
R_ARM_JUMP_SLOT = 22, // S (create .plt entry)
R_ARM_RELATIVE = 23, // B+A (adjust by programm base)
R_ARM_GOTOFF32 = 24, // S+A-GOT (32bit offset to .got)
R_ARM_BASE_PREL = 25, // B+A-P
R_ARM_GOT_BREL = 26, // G+A-GOT (32bit .got entry)
R_ARM_PLT32 = 27, // L+A-P (32bit .plt entry)
R_ARM_CALL = 28,
R_ARM_JUMP24 = 29,
R_ARM_THM_JUMP24 = 30, // ((S + A) | T) - P
R_ARM_BASE_ABS = 31, // B + A
R_ARM_ALU_PCREL7_0 = 32,
R_ARM_ALU_PCREL15_8 = 33,
R_ARM_ALU_PCREL23_15 = 34,
R_ARM_LDR_SBREL_11_0 = 35,
R_ARM_ALU_SBREL_19_12 = 36,
R_ARM_ALU_SBREL_27_20 = 37,
R_ARM_TARGET1 = 38,
R_ARM_ROSEGREL32 = 39,
R_ARM_V4BX = 40,
R_ARM_TARGET2 = 41,
R_ARM_PREL31 = 42,
R_ARM_MOVW_ABS_NC = 43, // Static ARM (S + A) | T
R_ARM_MOVT_ABS = 44, // Static ARM S + A
R_ARM_MOVW_PREL_NC = 45, // Static ARM ((S + A) | T) - P
R_ARM_MOVT_PREL = 46, // Static ARM S + A - P
R_ARM_THM_MOVW_ABS_NC = 47, // Static Thumb32 (S + A) | T
R_ARM_THM_MOVT_ABS = 48, // Static Thumb32 S + A
R_ARM_THM_MOVW_PREL_NC= 49, // Static Thumb32 ((S + A) | T) - P
R_ARM_THM_MOVT_PREL = 50, // Static Thumb32 S + A - P
R_ARM_THM_JUMP19 = 51, // Static Thumb32 ((S + A) | T) - P
R_ARM_THM_JUMP6 = 52, // Static Thumb16 S + A - P
R_ARM_THM_ALU_PREL_11_0= 53, // Static Thumb32 ((S + A) | T) - Pa
R_ARM_THM_PC12 = 54, // Static Thumb32 S + A - Pa
R_ARM_ABS32_NOI = 55, // Static Data S + A
R_ARM_REL32_NOI = 56, // Static Data S + A - P
R_ARM_ALU_PC_G0_NC = 57, // Static ARM ((S + A) | T) - P
R_ARM_ALU_PC_G0 = 58, // Static ARM ((S + A) | T) - P
R_ARM_ALU_PC_G1_NC = 59, // Static ARM ((S + A) | T) - P
R_ARM_ALU_PC_G1 = 60, // Static ARM ((S + A) | T) - P
R_ARM_ALU_PC_G2 = 61, // Static ARM ((S + A) | T) - P
R_ARM_LDR_PC_G1 = 62, // Static ARM S + A - P
R_ARM_LDR_PC_G2 = 63, // Static ARM S + A - P
R_ARM_LDRS_PC_G0 = 64, // Static ARM S + A - P
R_ARM_LDRS_PC_G1 = 65, // Static ARM S + A - P
R_ARM_LDRS_PC_G2 = 66, // Static ARM S + A - P
R_ARM_LDC_PC_G0 = 67, // Static ARM S + A - P
R_ARM_LDC_PC_G1 = 68, // Static ARM S + A - P
R_ARM_LDC_PC_G2 = 69, // Static ARM S + A - P
R_ARM_ALU_SB_G0_NC = 70, // Static ARM ((S + A) | T) - B(S)
R_ARM_ALU_SB_G0 = 71, // Static ARM ((S + A) | T) - B(S)
R_ARM_ALU_SB_G1_NC = 72, // Static ARM ((S + A) | T) - B(S)
R_ARM_ALU_SB_G1 = 73, // Static ARM ((S + A) | T) - B(S)
R_ARM_ALU_SB_G2 = 74, // Static ARM ((S + A) | T) - B(S)
R_ARM_LDR_SB_G0 = 75, // Static ARM S + A - B(S)
R_ARM_LDR_SB_G1 = 76, // Static ARM S + A - B(S)
R_ARM_LDR_SB_G2 = 77, // Static ARM S + A - B(S)
R_ARM_LDRS_SB_G0 = 78, // Static ARM S + A - B(S)
R_ARM_LDRS_SB_G1 = 79, // Static ARM S + A - B(S)
R_ARM_LDRS_SB_G2 = 80, // Static ARM S + A - B(S)
R_ARM_LDC_SB_G0 = 81, // Static ARM S + A - B(S)
R_ARM_LDC_SB_G1 = 82, // Static ARM S + A - B(S)
R_ARM_LDC_SB_G2 = 83, // Static ARM S + A - B(S)
R_ARM_MOVW_BREL_NC = 84, // Static ARM ((S + A) | T) - B(S)
R_ARM_MOVT_BREL = 85, // Static ARM S + A - B(S)
R_ARM_MOVW_BREL = 86, // Static ARM ((S + A) | T) - B(S)
R_ARM_THM_MOVW_BREL_NC = 87, // Static Thumb32 ((S + A) | T) - B(S)
R_ARM_THM_MOVT_BREL = 88, // Static Thumb32 S + A - B(S)
R_ARM_THM_MOVW_BREL = 89, // Static Thumb32 ((S + A) | T) - B(S)
R_ARM_TLS_GOTDESC = 90, // Static Data
R_ARM_TLS_CALL = 91, // Static ARM
R_ARM_TLS_DESCSEQ = 92, // Static ARM TLS relaxation
R_ARM_THM_TLS_CALL = 93, // Static Thumb32
R_ARM_PLT32_ABS = 94, // Static Data PLT(S) + A
R_ARM_GOT_ABS = 95, // G+A
R_ARM_GOT_PREL = 96, // G+A-P
R_ARM_GOT_BREL12 = 97, // G+A-GOT
R_ARM_GOTOFF12 = 98, // S+A-GOT
R_ARM_GOTRELAX = 99,
R_ARM_GNU_VTENTRY = 100,
R_ARM_GNU_VTINHERIT = 101,
R_ARM_THM_PC11 = 102, /* Cygnus extension to abi: Thumb unconditional branch. */
R_ARM_THM_PC9 = 103, /* Cygnus extension to abi: Thumb conditional branch. */
R_ARM_THM_JUMP11 = 102, // Static Thumb16 S + A - P
R_ARM_THM_JUMP8 = 103, // Static Thumb16 S + A - P
R_ARM_TLS_GD32 = 104, // Static Data GOT(S) + A - P
R_ARM_TLS_LDM32 = 105, // Static Data GOT(S) + A - P
R_ARM_TLS_LDO32 = 106, // Static Data S + A - TLS
R_ARM_TLS_IE32 = 107, // Static Data GOT(S) + A - P
R_ARM_TLS_LE32 = 108, // Static Data S + A - tp
R_ARM_TLS_LDO12 = 109, // Static ARM S + A - TLS
R_ARM_TLS_LE12 = 110, // Static ARM S + A - tp
R_ARM_TLS_IE12GP = 111, // Static ARM GOT(S) + A - GOT_ORG
R_ARM_PRIVATE_0 = 112, // Private (n = 0, 1, ... 15)
R_ARM_PRIVATE_1 = 113,
R_ARM_PRIVATE_2 = 114,
R_ARM_PRIVATE_3 = 115,
R_ARM_PRIVATE_4 = 116,
R_ARM_PRIVATE_5 = 117,
R_ARM_PRIVATE_6 = 118,
R_ARM_PRIVATE_7 = 119,
R_ARM_PRIVATE_8 = 120,
R_ARM_PRIVATE_9 = 121,
R_ARM_PRIVATE_10 = 122,
R_ARM_PRIVATE_11 = 123,
R_ARM_PRIVATE_12 = 124,
R_ARM_PRIVATE_13 = 125,
R_ARM_PRIVATE_14 = 126,
R_ARM_PRIVATE_15 = 127,
R_ARM_ME_TOO = 128, // Obsolete
R_ARM_THM_TLS_DESCSEQ16 = 129,// Static Thumb16
R_ARM_THM_TLS_DESCSEQ32 = 130,// Static Thumb32
R_ARM_THM_GOT_BREL12 = 131, // GOT entry relative to GOT origin, 12 bit (Thumb32 LDR).
R_ARM_THM_ALU_ABS_G0_NC = 132,
R_ARM_THM_ALU_ABS_G1_NC = 133,
R_ARM_THM_ALU_ABS_G2_NC = 134,
R_ARM_THM_ALU_ABS_G3_NC = 135,
// 136 - 139 Unallocated
// 140 - 159 Dynamic Reserved for future allocation
R_ARM_IRELATIVE = 160,
// 161 - 255 Unallocated
//
// ATT: R_ARM_RXPC25 used ONLY in OLD_ABI (+ 15 OTHER relocs!)
// dynamic sections only
R_ARM_RXPC25 = 249, // (BLX) call between segments
//
R_ARM_RSBREL32 = 250, // (Word) SBrelative offset
R_ARM_THM_RPC22 = 251, // (Thumb BL/BLX) call between segments
R_ARM_RREL32 = 252, // (Word) inter-segment offset
R_ARM_RABS32 = 253, // (Word) Target segment displacement
R_ARM_RPC24 = 254, // (BL/BLX) call between segment
R_ARM_RBASE = 255 // segment being relocated
};
// X is the result of a relocation operation, before any masking or bit-selection
// Page(expr) is the page address of the expression expr, defined as (expr & ~0xFFF)
// GOT is the address of the Global Offset Table
// GDAT(S+A) represents a 64-bit entry in the GOT for address S+A
// G(expr) is the address of the GOT entry for the expression expr
// Delta(S) if S is a normal symbol, resolves to the difference between
// the static link address of S and the execution address of S.
// If S is the null symbol (ELF symbol index 0), resolves to the difference
// between the static link address of P and the execution address of P.
// Indirect(expr) represents the result of calling expr as a function.
// The result is the return value from the function that is returned in r0.
// [msb:lsb] is a bit-mask operation representing the selection of bits in a value
enum elf_RTYPE_aarch64
{
R_AARCH64_NONE = 0x100,
// ILP32 relocations
R_AARCH64_P32_ABS32 = 1,/* Direct 32 bit. */
R_AARCH64_P32_COPY = 180,/* Copy symbol at runtime. */
R_AARCH64_P32_GLOB_DAT = 181,/* Create GOT entry. */
R_AARCH64_P32_JUMP_SLOT = 182,/* Create PLT entry. */
R_AARCH64_P32_RELATIVE = 183,/* Adjust by program base. */
R_AARCH64_P32_TLS_DTPMOD = 184,/* Module number, 32 bit. */
R_AARCH64_P32_TLS_DTPREL = 185,/* Module-relative offset, 32 bit. */
R_AARCH64_P32_TLS_TPREL = 186,/* TP-relative offset, 32 bit. */
R_AARCH64_P32_TLSDESC = 187,/* TLS Descriptor. */
R_AARCH64_P32_IRELATIVE = 188,/* STT_GNU_IFUNC relocation. */
// 4.6.5 Static Data relocations
R_AARCH64_ABS64 = 0x101, // S + A
R_AARCH64_ABS32 = 0x102, // S + A
R_AARCH64_ABS16 = 0x103,
R_AARCH64_PREL64 = 0x104,
R_AARCH64_PREL32 = 0x105,
R_AARCH64_PREL16 = 0x106,
// 4.6.6 Static AArch64 relocations
R_AARCH64_MOVW_UABS_G0 = 0x107,
R_AARCH64_MOVW_UABS_G0_NC = 0x108,
R_AARCH64_MOVW_UABS_G1 = 0x109,
R_AARCH64_MOVW_UABS_G1_NC = 0x10a,
R_AARCH64_MOVW_UABS_G2 = 0x10b,
R_AARCH64_MOVW_UABS_G2_NC = 0x10c,
R_AARCH64_MOVW_UABS_G3 = 0x10d,
R_AARCH64_MOVW_SABS_G0 = 0x10e,
R_AARCH64_MOVW_SABS_G1 = 0x10f,
R_AARCH64_MOVW_SABS_G2 = 0x110,
R_AARCH64_LD_PREL_LO19 = 0x111,
R_AARCH64_ADR_PREL_LO21 = 0x112,
R_AARCH64_ADR_PREL_PG_HI21 = 0x113, // Page(S+A) - Page(P); Set an ADRP immediate value to bits [32:12] of the X
R_AARCH64_ADR_PREL_PG_HI21_NC = 0x114,
R_AARCH64_ADD_ABS_LO12_NC = 0x115, // S+A; Set an ADD immediate value to bits [11:0] of X
R_AARCH64_LDST8_ABS_LO12_NC = 0x116,
R_AARCH64_TSTBR14 = 0x117,
R_AARCH64_CONDBR19 = 0x118,
R_AARCH64_JUMP26 = 0x11a, // S+A-P; Set a B immediate field to bits [27:2] of X
R_AARCH64_CALL26 = 0x11b, // S+A-P; Set a CALL immediate field to bits [27:2] of X
R_AARCH64_LDST16_ABS_LO12_NC = 0x11c,
R_AARCH64_LDST32_ABS_LO12_NC = 0x11d,
R_AARCH64_LDST64_ABS_LO12_NC = 0x11e, // S+A; Set the LD/ST immediate value to bits [11:3] of X
R_AARCH64_MOVW_PREL_G0 = 0x11f,
R_AARCH64_MOVW_PREL_G0_NC = 0x120,
R_AARCH64_MOVW_PREL_G1 = 0x121,
R_AARCH64_MOVW_PREL_G1_NC = 0x122,
R_AARCH64_MOVW_PREL_G2 = 0x123,
R_AARCH64_MOVW_PREL_G2_NC = 0x124,
R_AARCH64_MOVW_PREL_G3 = 0x125,
R_AARCH64_LDST128_ABS_LO12_NC = 0x12b,
R_AARCH64_MOVW_GOTOFF_G0 = 0x12c,
R_AARCH64_MOVW_GOTOFF_G0_NC = 0x12d,
R_AARCH64_MOVW_GOTOFF_G1 = 0x12e,
R_AARCH64_MOVW_GOTOFF_G1_NC = 0x12f,
R_AARCH64_MOVW_GOTOFF_G2 = 0x130,
R_AARCH64_MOVW_GOTOFF_G2_NC = 0x131,
R_AARCH64_MOVW_GOTOFF_G3 = 0x132,
R_AARCH64_GOTREL64 = 0x133,
R_AARCH64_GOTREL32 = 0x134,
R_AARCH64_GOT_LD_PREL19 = 0x135,
R_AARCH64_LD64_GOTOFF_LO15 = 0x136,
R_AARCH64_ADR_GOT_PAGE = 0x137, // Page(G(GDAT(S+A)))-Page(P); Set the immediate value of an ADRP to bits [32:12] of X
R_AARCH64_LD64_GOT_LO12_NC = 0x138, // G(GDAT(S+A)); Set the LD/ST immediate field to bits [11:3] of X
R_AARCH64_LD64_GOTPAGE_LO15 = 0x139,
R_AARCH64_TLSGD_ADR_PREL21 = 0x200,
R_AARCH64_TLSGD_ADR_PAGE21 = 0x201,
R_AARCH64_TLSGD_ADD_LO12_NC = 0x202,
R_AARCH64_TLSGD_MOVW_G1 = 0x203,
R_AARCH64_TLSGD_MOVW_G0_NC = 0x204,
R_AARCH64_TLSLD_ADR_PREL21 = 0x205,
R_AARCH64_TLSLD_ADR_PAGE21 = 0x206,
R_AARCH64_TLSLD_ADD_LO12_NC = 0x207,
R_AARCH64_TLSLD_MOVW_G1 = 0x208,
R_AARCH64_TLSLD_MOVW_G0_NC = 0x209,
R_AARCH64_TLSLD_LD_PREL19 = 0x20a,
R_AARCH64_TLSLD_MOVW_DTPREL_G2 = 0x20b,
R_AARCH64_TLSLD_MOVW_DTPREL_G1 = 0x20c,
R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC = 0x20d,
R_AARCH64_TLSLD_MOVW_DTPREL_G0 = 0x20e,
R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC = 0x20f,
R_AARCH64_TLSLD_ADD_DTPREL_HI12 = 0x210,
R_AARCH64_TLSLD_ADD_DTPREL_LO12 = 0x211,
R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC = 0x212,
R_AARCH64_TLSLD_LDST8_DTPREL_LO12 = 0x213,
R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC = 0x214,
R_AARCH64_TLSLD_LDST16_DTPREL_LO12 = 0x215,
R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC = 0x216,
R_AARCH64_TLSLD_LDST32_DTPREL_LO12 = 0x217,
R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC = 0x218,
R_AARCH64_TLSLD_LDST64_DTPREL_LO12 = 0x219,
R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC = 0x21a,
R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 = 0x21b,
R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC = 0x21c,
R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 = 0x21d,
R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC = 0x21e,
R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 = 0x21f,
R_AARCH64_TLSLE_MOVW_TPREL_G2 = 0x220,
R_AARCH64_TLSLE_MOVW_TPREL_G1 = 0x221,
R_AARCH64_TLSLE_MOVW_TPREL_G1_NC = 0x222,
R_AARCH64_TLSLE_MOVW_TPREL_G0 = 0x223,
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC = 0x224,
R_AARCH64_TLSLE_ADD_TPREL_HI12 = 0x225,
R_AARCH64_TLSLE_ADD_TPREL_LO12 = 0x226,
R_AARCH64_TLSLE_ADD_TPREL_LO12_NC = 0x227,
R_AARCH64_TLSLE_LDST8_TPREL_LO12 = 0x228,
R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC = 0x229,
R_AARCH64_TLSLE_LDST16_TPREL_LO12 = 0x22a,
R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC = 0x22b,
R_AARCH64_TLSLE_LDST32_TPREL_LO12 = 0x22c,
R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC = 0x22d,
R_AARCH64_TLSLE_LDST64_TPREL_LO12 = 0x22e,
R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC = 0x22f,
R_AARCH64_TLSDESC_LD_PREL19 = 0x230,
R_AARCH64_TLSDESC_ADR_PREL21 = 0x231,
R_AARCH64_TLSDESC_ADR_PAGE21 = 0x232, // R_AARCH64_TLSDESC_ADR_PAGE
R_AARCH64_TLSDESC_LD64_LO12 = 0x233, // R_AARCH64_TLSDESC_LD64_LO12_NC
R_AARCH64_TLSDESC_ADD_LO12 = 0x234, // R_AARCH64_TLSDESC_ADD_LO12_NC
R_AARCH64_TLSDESC_OFF_G1 = 0x235,
R_AARCH64_TLSDESC_OFF_G0_NC = 0x236,
R_AARCH64_TLSDESC_LDR = 0x237,
R_AARCH64_TLSDESC_ADD = 0x238,
R_AARCH64_TLSDESC_CALL = 0x239,
R_AARCH64_TLSLE_LDST128_TPREL_LO12 = 0x23a,
R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC = 0x23b,
R_AARCH64_TLSLD_LDST128_DTPREL_Lo12 = 0x23c,
R_AARCH64_TLSLD_LDST128_DTPREL_Lo12_NC= 0x23d,
// 4.6.11 Dynamic relocations
R_AARCH64_COPY = 0x400,
R_AARCH64_GLOB_DAT = 0x401,
R_AARCH64_JUMP_SLOT = 0x402,
R_AARCH64_RELATIVE = 0x403,
R_AARCH64_TLS_DTPREL64 = 0x404,
R_AARCH64_TLS_DTPMOD64 = 0x405,
R_AARCH64_TLS_TPREL64 = 0x406,
R_AARCH64_TLSDESC = 0x407,
R_AARCH64_IRELATIVE = 0x408,
};
// Flags:
#define EF_ARM_RELEXEC 0x00000001 // dynamic only how to relocation
#define EF_ARM_HASENTRY 0x00000002 // e_entry is real start address
// GNU flags (EABI version = 0)
#define EF_ARM_INTERWORK 0x00000004 // interworking enabled
#define EF_ARM_APCS_26 0x00000008 // APCS-26 used (otherwise APCS-32)
#define EF_ARM_APCS_FLOAT 0x00000010 // floats passed in float registers
#define EF_ARM_PIC 0x00000020 // Position-independent code
#define EF_ARM_ALIGN8 0x00000040 // 8-bit struct alignment
#define EF_ARM_NEW_ABI 0x00000080 // New ABI
#define EF_ARM_OLD_ABI 0x00000100 // Old ABI
#define EF_ARM_SOFT_FLOAT 0x00000200 // software FP
#define EF_ARM_VFP_FLOAT 0x00000400 // VFP float format
#define EF_ARM_MAVERICK_FLOAT 0x00000800 // Maverick float format
// ARM flags:
#define EF_ARM_SYMSARESORTED 0x00000004 // Each subsection of the symbol table is sorted by symbol value (NB conflicts with EF_INTERWORK)
#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 // Symbols in dynamic symbol tables that are defined in sections
// included in program segment n have st_shndx = n + 1. (NB conflicts with EF_APCS26)
#define EF_ARM_MAPSYMSFIRST 0x00000010 // Mapping symbols precede other local symbols in the symbol
// table (NB conflicts with EF_APCS_FLOAT)
#define EF_ARM_LE8 0x00400000 // LE-8 code
#define EF_ARM_BE8 0x00800000 // BE-8 code for ARMv6 or later
#define EF_ARM_EABIMASK 0xFF000000 // ARM EABI version
/* Additional symbol types for Thumb. */
#define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */
#define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */
// patching GOT loading,
// discard auxiliary values in plt/got
// can present offset bypass segment
#define ELF_RPL_ARM_DEFAULT (ELF_RPL_GL | ELF_DIS_OFFW | ELF_DIS_GPLT)
enum elf_SHT_ARM
{
SHT_ARM_EXIDX = 0x70000001, // Exception Index table
SHT_ARM_PREEMPTMAP = 0x70000002, // BPABI DLL dynamic linking pre-emption map
SHT_ARM_ATTRIBUTES = 0x70000003, // Object file compatibility attributes
SHT_ARM_DEBUGOVERLAY = 0x70000004, //
SHT_ARM_OVERLAYSECTION = 0x70000005, //
};
enum elf_PT_ARM
{
// From binutils-2.27/elfcpp/elfcpp.h
PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility information
PT_ARM_EXIDX = 0x70000001, // Exception unwind tables
};
enum elf_PT_AARCH64
{
// From binutils-2.27/elfcpp/elfcpp.h
PT_AARCH64_ARCHEXT = 0x70000000, // Platform architecture compatibility information
PT_AARCH64_UNWIND = 0x70000001, // Exception unwind tables
};
enum eabi_tags_t
{
Tag_NULL,
Tag_File, // (=1) <uint32: byte-size> <attribute>*
Tag_Section, // (=2) <uint32: byte-size> <section number>* 0 <attribute>*
Tag_Symbol, // (=3) <unit32: byte-size> <symbol number>* 0 <attribute>*
Tag_CPU_raw_name, // (=4), NTBS
Tag_CPU_name, // (=5), NTBS
Tag_CPU_arch, // (=6), uleb128
Tag_CPU_arch_profile, // (=7), uleb128
Tag_ARM_ISA_use, // (=8), uleb128
Tag_THUMB_ISA_use, // (=9), uleb128
Tag_FP_arch, // (=10), uleb128 (formerly Tag_VFP_arch = 10)
Tag_VFP_arch = Tag_FP_arch,
Tag_WMMX_arch, // (=11), uleb128
Tag_NEON_arch, // (=12), uleb128
Tag_PCS_config, // (=13), uleb128
Tag_ABI_PCS_R9_use, // (=14), uleb128
Tag_ABI_PCS_RW_data, // (=15), uleb128
Tag_ABI_PCS_RO_data, // (=16), uleb128
Tag_ABI_PCS_GOT_use, // (=17), uleb128
Tag_ABI_PCS_wchar_t, // (=18), uleb128
Tag_ABI_FP_rounding, // (=19), uleb128
Tag_ABI_FP_denormal, // (=20), uleb128
Tag_ABI_FP_exceptions, // (=21), uleb128
Tag_ABI_FP_user_exceptions, // (=22), uleb128
Tag_ABI_FP_number_model, // (=23), uleb128
Tag_ABI_align_needed, // (=24), uleb128
Tag_ABI_align8_needed = Tag_ABI_align_needed,
Tag_ABI_align_preserved, // (=25), uleb128
Tag_ABI_align8_preserved = Tag_ABI_align_preserved,
Tag_ABI_enum_size, // (=26), uleb128
Tag_ABI_HardFP_use, // (=27), uleb128
Tag_ABI_VFP_args, // (=28), uleb128
Tag_ABI_WMMX_args, // (=29), uleb128
Tag_ABI_optimization_goals, // (=30), uleb128
Tag_ABI_FP_optimization_goals, // (=31), uleb128
Tag_compatibility, // (=32), uleb128: flag, NTBS: vendor-name
Tag_CPU_unaligned_access=34, // (=34), uleb128
Tag_FP_HP_extension=36, // (=36), uleb128 (formerly Tag_VFP_HP_extension = 36)
Tag_VFP_HP_extension = Tag_FP_HP_extension,
Tag_ABI_FP_16bit_format=38, // (=38), uleb128
Tag_MPextension_use=42, // (=42), uleb128
Tag_DIV_use=44, // (=44), uleb128
Tag_nodefaults=64, // (=64), uleb128: ignored (write as 0)
Tag_also_compatible_with, // (=65), NTBS: data; ULEB128-encoded tag followed by a value of that tag.
Tag_T2EE_use, // (=66), uleb128
Tag_conformance, // (=67), string: ABI-version
Tag_Virtualization_use, // (=68), uleb128
Tag_MPextension_use_legacy=70, // (=70),
};
//----------------------------------------------------------------------------
class arm_arch_specific_t : public arch_specific_t
{
public:
enum isa_t
{
isa_arm = 1,
isa_thumb
};
typedef void isa_handler_t(
reader_t &reader,
sym_rel &symbol,
isa_t isa,
bool force);
private:
typedef std::map<uint64, isa_t> section_isa_ranges_t;
typedef std::map<elf_shndx_t, section_isa_ranges_t> isa_ranges_t;
isa_ranges_t isa_ranges;
std::set<ea_t> forced_isas;
isa_handler_t *isa_handler = nullptr;
ea_t debug_segbase = 0;
bool has_mapsym = false;
bool track_mapsym = false;
bool be8_code = false;
void notify_isa(reader_t &reader, sym_rel &symbol, isa_t isa, bool force)
{
if ( isa_handler != NULL )
isa_handler(reader, symbol, isa, force);
}
isa_t get_isa(const sym_rel &symbol) const;
void set_isa(const sym_rel &symbol, isa_t isa);
friend void arm_isa_handler(
reader_t &reader,
sym_rel &symbol,
arm_arch_specific_t::isa_t isa,
bool force);
public:
virtual ~arm_arch_specific_t() {}
virtual void on_start_symbols(reader_t &reader) override;
virtual void on_symbol_read(reader_t &reader, sym_rel &sym) override;
bool is_mapping_symbol(const char *name) const;
bool has_mapping_symbols() const { return has_mapsym; }
// Tracking mapping symbols can be useful for
// determining whether a certain function is using
// the Thumb or ARM ISA.
// In some ELF files, the only way to know what ISA
// certain functions are in is by looking at some
// mapping symbols (i.e., '$a', '$t').
// By default, tracking of such symbols in an
// instance of this class is _not_ enabled.
void set_mapping_symbols_tracking(bool track) { track_mapsym = track; }
bool is_mapping_symbols_tracking() const { return track_mapsym; }
void set_isa_handler(isa_handler_t *ih, ea_t dea)
{
isa_handler = ih;
debug_segbase = dea;
}
void set_be8(bool be8) { be8_code = be8; }
bool is_be8() { return be8_code; }
};
//----------------------------------------------------------------------------
// Specific flags that will be set on sym_rel instances.
enum arm_sym_rel_flags
{
thumb_function = 1
};
#endif

87
idasdk76/ldr/elf/elfr_avr.h Normal file
View File

@@ -0,0 +1,87 @@
#ifndef __ELFR_AVR_H__
#define __ELFR_AVR_H__
#ifndef __ELFBASE_H__
#include "elfbase.h"
#endif
enum elf_RTYPE_avr
{
R_AVR_NONE = 0,
R_AVR_32 = 1,
R_AVR_7_PCREL = 2,
R_AVR_13_PCREL = 3,
R_AVR_16 = 4,
R_AVR_16PM = 5,
R_AVR_LO8_LDI = 6,
R_AVR_HI8_LDI = 7,
R_AVR_HH8_LDI = 8,
R_AVR_LO8_LDI_NEG = 9,
R_AVR_HI8_LDI_NEG = 10,
R_AVR_HH8_LDI_NEG = 11,
R_AVR_LO8_LDI_PM = 12,
R_AVR_HI8_LDI_PM = 13,
R_AVR_HH8_LDI_PM = 14,
R_AVR_LO8_LDI_PM_NEG = 15,
R_AVR_HI8_LDI_PM_NEG = 16,
R_AVR_HH8_LDI_PM_NEG = 17,
R_AVR_CALL = 18,
// *nix obj's specific
R_AVR_LDI = 19,
R_AVR_6 = 20,
R_AVR_6_ADIW = 21,
R_AVR_MS8_LDI = 22,
R_AVR_MS8_LDI_NEG = 23,
R_AVR_LO8_LDI_GS = 24,
R_AVR_HI8_LDI_GS = 25,
R_AVR_8 = 26,
R_AVR_8_LO8 = 27,
R_AVR_8_HI8 = 28,
R_AVR_8_HLO8 = 29,
R_AVR_DIFF8 = 30,
R_AVR_DIFF16 = 31,
R_AVR_DIFF32 = 32,
R_AVR_LDS_STS_16 = 33,
R_AVR_PORT6 = 34,
R_AVR_PORT5 = 35,
R_AVR_32_PCREL = 36,
};
// Flags:
// If bit #7 is set, it is assumed that the elf file uses local symbols
// as reference for the relocations so that linker relaxation is possible.
#define EF_AVR_LINKRELAX_PREPARED 0x80
// Processor specific flags for the ELF header e_flags field.
#define EF_AVR_MACH 0x7F
#define E_AVR_MACH_AVR1 1
#define E_AVR_MACH_AVR2 2
#define E_AVR_MACH_AVR25 25
#define E_AVR_MACH_AVR3 3
#define E_AVR_MACH_AVR31 31
#define E_AVR_MACH_AVR35 35
#define E_AVR_MACH_AVR4 4
#define E_AVR_MACH_AVR5 5
#define E_AVR_MACH_AVR51 51
#define E_AVR_MACH_AVR6 6
#define E_AVR_MACH_TINY 100
#define E_AVR_MACH_XMEGA1 101
#define E_AVR_MACH_XMEGA2 102
#define E_AVR_MACH_XMEGA3 103
#define E_AVR_MACH_XMEGA4 104
#define E_AVR_MACH_XMEGA5 105
#define E_AVR_MACH_XMEGA6 106
#define E_AVR_MACH_XMEGA7 107
// netnode flag's and constant
#define AVR_INFO_NODENAME "$ atmel"
#define ELF_AVR_TAG 'f'
#define ELF_AVR_LDI_NEG 1
#define ELF_AVR_RAM_OFF 2
#define ELF_AVR_EEP_OFF 3
#define ELF_AVR_ABS_OFF 4
#define ELF_AVR_RAMBASE 0x800000
#define ELF_AVR_EEPROMBASE 0x810000
#define ELF_AVR_ABSBASE 0x1000000
#endif

272
idasdk76/ldr/elf/elfr_ia64.h Normal file
View File

@@ -0,0 +1,272 @@
#ifndef __ELFR_IA64_H__
#define __ELFR_IA64_H__
#ifndef __ELFBASE_H__
#include "elfbase.h"
#endif
/* Bits in the e_flags field of the Elf64_Ehdr: */
#define EF_IA_64_MASKOS 0x00ff000f /* os-specific flags */
#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
#define EFA_IA_64 0x00000000
/* ??? These four definitions are not part of the SVR4 ABI.
They were present in David's initial code drop, so it is probable
that they are used by HP/UX. */
#define EF_IA_64_TRAPNIL (1 << 0) /* Trap NIL pointer dereferences. */
#define EF_IA_64_LAZYSWAP (1 << 1) /* Lazy Swap algorithm */
#define EF_IA_64_EXT (1 << 2) /* Program uses arch. extensions. */
#define EF_IA_64_BE (1 << 3) /* PSR BE bit set (big-endian). */
#define EFA_IA_64_EAS2_3 0x23000000 /* IA64 EAS 2.3. */
#define EF_IA_64_ABI64 (1 << 4) /* 64-bit ABI. */
/* Not used yet. */
#define EF_IA_64_REDUCEDFP (1 << 5) /* Only FP6-FP11 used. */
#define EF_IA_64_CONS_GP (1 << 6) /* gp as program wide constant. */
#define EF_IA_64_NOFUNCDESC_CONS_GP (1 << 7) /* And no function descriptors. */
/* Not used yet. */
#define EF_IA_64_ABSOLUTE (1 << 8) /* Load at absolute addresses. */
/*============================================================================
The R_EM_* macros are the IA_64 relocation types
============================================================================*/
/*
** These are "real" Tahoe relocations. The offset in a relocation
** applied to a data location is the actual byte address of the
** 32-/64-bit field to relocate. The value of (offset & ~3) in
** an instruction relocation is the byte offset of the bundle
** the instruction lives in; the value of (offset & 3) signifies:
** 0: first instruction slot in bundle
** 1: second instruction slot in bundle
** 2: third instruction slot in bundle
**
** Little piece of info: the first (hex) digit specifies the
** expression type, while the second specifies the format of
** the data word being relocated.
*/
// relocation field - word32 with HIGH BYTE FIRST!!!
// A- from Elf32_Rela
// B- Loading address of shared object
// G- offset into global objet table
// GOT- adress of global object table
// L- linkage table entry
// P- plase of storage unit (computed using r_offset)
// S- value of symbol
enum elf_RTYPE_ia64
{
R_IA64_NONE = 0x00, /* none */
R_IA64_IMM14 = 0x21, /* symbol + addend, add imm14 */
R_IA64_IMM22 = 0x22, /* symbol + addend, add imm22 */
R_IA64_IMM64 = 0x23, /* symbol + addend, mov imm64 */
R_IA64_DIR32MSB = 0x24, /* symbol + addend, data4 MSB */
R_IA64_DIR32LSB = 0x25, /* symbol + addend, data4 LSB */
R_IA64_DIR64MSB = 0x26, /* symbol + addend, data8 MSB */
R_IA64_DIR64LSB = 0x27, /* symbol + addend, data8 LSB */
R_IA64_GPREL22 = 0x2a, /* @gprel(sym + add), add imm22 */
R_IA64_GPREL64I = 0x2b, /* @gprel(sym + add), mov imm64 */
R_IA64_GPREL32MSB = 0x2c, /* @gprel(sym + add), data4 MSB ## */
R_IA64_GPREL32LSB = 0x2d, /* @gprel(sym + add), data4 LSB ## */
R_IA64_GPREL64MSB = 0x2e, /* @gprel(sym + add), data8 MSB */
R_IA64_GPREL64LSB = 0x2f, /* @gprel(sym + add), data8 LSB */
R_IA64_LTOFF22 = 0x32, /* @ltoff(sym + add), add imm22 */
R_IA64_LTOFF64I = 0x33, /* @ltoff(sym + add), mov imm64 */
R_IA64_PLTOFF22 = 0x3a, /* @pltoff(sym + add), add imm22 */
R_IA64_PLTOFF64I = 0x3b, /* @pltoff(sym + add), mov imm64 */
R_IA64_PLTOFF64MSB = 0x3e, /* @pltoff(sym + add), data8 MSB */
R_IA64_PLTOFF64LSB = 0x3f, /* @pltoff(sym + add), data8 LSB */
R_IA64_FPTR64I = 0x43, /* @fptr(sym + add), mov imm64 */
R_IA64_FPTR32MSB = 0x44, /* @fptr(sym + add), data4 MSB */
R_IA64_FPTR32LSB = 0x45, /* @fptr(sym + add), data4 LSB */
R_IA64_FPTR64MSB = 0x46, /* @fptr(sym + add), data8 MSB */
R_IA64_FPTR64LSB = 0x47, /* @fptr(sym + add), data8 LSB */
R_IA64_PCREL60B = 0x48, /* @pcrel(sym + add), brl */
R_IA64_PCREL21B = 0x49, /* @pcrel(sym + add), ptb, call */
R_IA64_PCREL21M = 0x4a, /* @pcrel(sym + add), chk.s */
R_IA64_PCREL21F = 0x4b, /* @pcrel(sym + add), fchkf */
R_IA64_PCREL32MSB = 0x4c, /* @pcrel(sym + add), data4 MSB */
R_IA64_PCREL32LSB = 0x4d, /* @pcrel(sym + add), data4 LSB */
R_IA64_PCREL64MSB = 0x4e, /* @pcrel(sym + add), data8 MSB */
R_IA64_PCREL64LSB = 0x4f, /* @pcrel(sym + add), data8 LSB */
R_IA64_LTOFF_FPTR22 = 0x52, /* @ltoff(@fptr(s+a)), imm22 */
R_IA64_LTOFF_FPTR64I = 0x53, /* @ltoff(@fptr(s+a)), imm64 */
R_IA64_LTOFF_FPTR32MSB = 0x54, /* @ltoff(@fptr(s+a)), 4 MSB */
R_IA64_LTOFF_FPTR32LSB = 0x55, /* @ltoff(@fptr(s+a)), 4 LSB */
R_IA64_LTOFF_FPTR64MSB = 0x56, /* @ltoff(@fptr(s+a)), 8 MSB ##*/
R_IA64_LTOFF_FPTR64LSB = 0x57, /* @ltoff(@fptr(s+a)), 8 LSB ##*/
R_IA64_SEGBASE = 0x58, /* set segment base for @segrel ## */
R_IA64_SEGREL32MSB = 0x5c, /* @segrel(sym + add), data4 MSB */
R_IA64_SEGREL32LSB = 0x5d, /* @segrel(sym + add), data4 LSB */
R_IA64_SEGREL64MSB = 0x5e, /* @segrel(sym + add), data8 MSB */
R_IA64_SEGREL64LSB = 0x5f, /* @segrel(sym + add), data8 LSB */
R_IA64_SECREL32MSB = 0x64, /* @secrel(sym + add), data4 MSB */
R_IA64_SECREL32LSB = 0x65, /* @secrel(sym + add), data4 LSB */
R_IA64_SECREL64MSB = 0x66, /* @secrel(sym + add), data8 MSB */
R_IA64_SECREL64LSB = 0x67, /* @secrel(sym + add), data8 LSB */
R_IA64_REL32MSB = 0x6c, /* data 4 + REL */
R_IA64_REL32LSB = 0x6d, /* data 4 + REL */
R_IA64_REL64MSB = 0x6e, /* data 8 + REL */
R_IA64_REL64LSB = 0x6f, /* data 8 + REL */
R_IA64_LTV32MSB = 0x74, /* symbol + addend, data4 MSB */
R_IA64_LTV32LSB = 0x75, /* symbol + addend, data4 LSB */
R_IA64_LTV64MSB = 0x76, /* symbol + addend, data8 MSB */
R_IA64_LTV64LSB = 0x77, /* symbol + addend, data8 LSB */
R_IA64_PCREL21BI = 0x79, /* @pcrel(sym + add), ptb, call */
R_IA64_PCREL22 = 0x7a, /* @pcrel(sym + add), imm22 */
R_IA64_PCREL64I = 0x7b, /* @pcrel(sym + add), imm64 */
R_IA64_IPLTMSB = 0x80, /* dynamic reloc, imported PLT, MSB */
R_IA64_IPLTLSB = 0x81, /* dynamic reloc, imported PLT, LSB */
R_IA64_EPLTMSB = 0x82, /* dynamic reloc, exported PLT, ## */
R_IA64_EPLTLSB = 0x83, /* dynamic reloc, exported PLT, ## */
R_IA64_COPY = 0x84, /* dynamic reloc, data copy ## */
R_IA64_SUB = 0x85, /* Addend and symbol difference */
R_IA64_LTOFF22X = 0x86, /* LTOFF22, relaxable. */
R_IA64_LDXMOV = 0x87, /* Use of LTOFF22X. */
R_IA64_TPREL14 = 0x91, /* @tprel(sym+add), add imm14 */
R_IA64_TPREL22 = 0x92, /* sym-TP+add, add imm22 ## */
R_IA64_TPREL64I = 0x93, /* @tprel(sym+add), add imm64 */
R_IA64_TPREL64MSB = 0x96, /* sym-TP+add, data8 MSB ## */
R_IA64_TPREL64LSB = 0x97, /* sym-TP+add, data8 LSB ## */
R_IA64_LTOFF_TP22 = 0x9a, /* @ltoff(sym-TP+add), add imm22 ## */
R_IA64_DTPMOD64MSB = 0xa6, /* @dtpmod(sym+add), data8 MSB */
R_IA64_DTPMOD64LSB = 0xa7, /* @dtpmod(sym+add), data8 LSB */
R_IA64_LTOFF_DTPMOD22 = 0xaa, /* @ltoff(@dtpmod(s+a)), imm22 */
R_IA64_DTPREL14 = 0xb1, /* @dtprel(sym+add), imm14 */
R_IA64_DTPREL22 = 0xb2, /* @dtprel(sym+add), imm22 */
R_IA64_DTPREL64I = 0xb3, /* @dtprel(sym+add), imm64 */
R_IA64_DTPREL32MSB = 0xb4, /* @dtprel(sym+add), data4 MSB */
R_IA64_DTPREL32LSB = 0xb5, /* @dtprel(sym+add), data4 LSB */
R_IA64_DTPREL64MSB = 0xb6, /* @dtprel(sym+add), data8 MSB */
R_IA64_DTPREL64LSB = 0xb7, /* @dtprel(sym+add), data8 LSB */
R_IA64_LTOFF_DTPREL22 = 0xba, /* @ltoff(@dtprel(s+a)), imm22 */
R_IA64_MAX_RELOC_CODE = 0xba
};
// convert plt PIC => noPIC,
// patching GOT loading,
// discard auxiliary values in plt/got
#define ELF_RPL_IA64_DEFAULT (ELF_RPL_PLP | ELF_RPL_GL)
enum elf_SHT_IA64
{
SHT_IA_64_EXT = 0x70000000, /* extension bits */
SHT_IA_64_UNWIND = 0x70000001, /* unwind bits */
};
/*============================================================================
The PT_* macros are the values of p_type in ElfXX_Phdr.
============================================================================*/
enum elf_PT_IA64
{
PT_HP_TLS = (PT_LOOS + 0x0), /* TLS */
PT_HP_CORE_NONE = (PT_LOOS + 0x1), /* core file information */
PT_HP_CORE_VERSION = (PT_LOOS + 0x2),
PT_HP_CORE_KERNEL = (PT_LOOS + 0x3),
PT_HP_CORE_COMM = (PT_LOOS + 0x4),
PT_HP_CORE_PROC = (PT_LOOS + 0x5),
PT_HP_CORE_LOADABLE = (PT_LOOS + 0x6),
PT_HP_CORE_STACK = (PT_LOOS + 0x7),
PT_HP_CORE_SHM = (PT_LOOS + 0x8),
PT_HP_CORE_MMF = (PT_LOOS + 0x9),
PT_HP_PARALLEL = (PT_LOOS + 0x10), /* parallel information header */
PT_HP_FASTBIND = (PT_LOOS + 0x11), /* fastbind data segment */
PT_HP_OPT_ANNOT = (PT_LOOS + 0x12), /* dynamic opt. annotations */
PT_HP_HSL_ANNOT = (PT_LOOS + 0x13), /* HSL annotations */
PT_HP_STACK = (PT_LOOS + 0x14), /* executable stack */
PT_HP_CORE_UTSNAME = (PT_LOOS + 0x15), /* Extended utsname() core struct */
PT_HP_LINKER_FOOTPRINT = (PT_LOOS + 0x16), /* linker footprint */
PT_IA_64_ARCHEXT = (PT_LOPROC + 0), /* arch. extension bits */
PT_IA_64_UNWIND = (PT_LOPROC + 1), /* IA64 unwind bits */
};
/*============================================================================
The PF_* macros are the segment flag bits in p_flags of ElfXX_Phdr.
============================================================================*/
enum elf_PF_IA64
{
PF_HP_ENABLE_RECOVER = 0x00020000, /* enable recovery mode */
PF_HP_CODE = 0x00040000, /* code hint */
PF_HP_MODIFY = 0x00080000, /* modify hint */
PF_HP_PAGE_SIZE = 0x00100000, /* use explicit page size */
PF_HP_FAR_SHARED = 0x00200000, /* far shared data */
PF_HP_NEAR_SHARED = 0x00400000, /* near shared data */
PF_HP_LAZYSWAP = 0x00800000, /* lazy swap allocation */
PF_IA_64_NORECOV = 0x80000000, /* segment contains code that uses
speculative instructions w/o
recovery code. */
};
/*============================================================================
The NOTE_* macros are the note types for SHT_NOTE sections
============================================================================*/
#define NOTE_HP_COMPILER 1 /* Compiler identification string */
#define NOTE_HP_COPYRIGHT 2 /* Copyright string */
#define NOTE_HP_VERSION 3 /* Version string */
#define NOTE_HP_SRCFILE_INFO 4 /* Source file info for performance tools */
#define NOTE_HP_LINKER 5 /* Linker identification string */
#define NOTE_HP_INSTRUMENTED 6 /* instrumentation data */
#define NOTE_HP_UX_OPTIONS 7 /* elf hdr extension fields */
/*============================================================================
The DT_* defines are the allowed values of d_tag in ElfXX_dyn.
These are the Dynamic Array types.
============================================================================*/
/* (i)gnore (m)andatory */
/* (o)ptional */
/* d_un Exec DLL */
/* ---- ---- --- */
enum elf_DT_IA64
{
DT_HP_LOAD_MAP = (DT_LOOS + 0x0), /* d_ptr m - */
DT_HP_DLD_FLAGS = (DT_LOOS + 0x1), /* d_val m - */
DT_HP_DLD_HOOK = (DT_LOOS + 0x2), /* d_ptr m - */
DT_HP_UX10_INIT = (DT_LOOS + 0x3), /* d_ptr o o */
DT_HP_UX10_INITSZ = (DT_LOOS + 0x4), /* d_ptr o o */
DT_HP_PREINIT = (DT_LOOS + 0x5), /* d_ptr o - */
DT_HP_PREINITSZ = (DT_LOOS + 0x6), /* d_ptr o - */
DT_HP_NEEDED = (DT_LOOS + 0x7), /* d_val o o */
DT_HP_TIME_STAMP = (DT_LOOS + 0x8), /* d_val o o */
DT_HP_CHECKSUM = (DT_LOOS + 0x9), /* d_val o o */
DT_HP_GST_SIZE = (DT_LOOS + 0xa), /* d_val o - */
DT_HP_GST_VERSION = (DT_LOOS + 0xb), /* d_val o o */
DT_HP_GST_HASHVAL = (DT_LOOS + 0xc), /* d_ptr o o */
DT_HP_EPLTREL = (DT_LOOS + 0xd), /* d_ptr o o */
DT_HP_EPLTRELSZ = (DT_LOOS + 0xe), /* d_ptr o o */
DT_HP_FILTERED = (DT_LOOS + 0xf), /* d_val - o */
DT_HP_FILTER_TLS = (DT_LOOS + 0x10),/* d_val - o */
DT_HP_COMPAT_FILTERED = (DT_LOOS + 0x11),/* d_val - o */
DT_HP_LAZYLOAD = (DT_LOOS + 0x12),/* d_val o - */
DT_HP_BIND_NOW_COUNT = (DT_LOOS + 0x13),/* d_val o o */
DT_PLT = (DT_LOOS + 0x14),/* d_ptr o o */
DT_PLT_SIZE = (DT_LOOS + 0x15),/* d_val o o */
DT_DLT = (DT_LOOS + 0x16),/* d_ptr o o */
DT_DLT_SIZE = (DT_LOOS + 0x17),/* d_val o o */
DT_HP_SYM_CHECKSUM = (DT_LOOS + 0x18),/* d_val o o */
DT_IA_64_PLT_RESERVE = 0x70000000,
};
#endif

476
idasdk76/ldr/elf/elfr_mips.h Normal file
View File

@@ -0,0 +1,476 @@
#ifndef __ELFR_MIP_H__
#define __ELFR_MIP_H__
#ifndef __ELFBASE_H__
#include "elfbase.h"
#endif
#include "elf.h"
//
// e_flags
//
#define EF_MIPS_NOREORDER 0x00000001 // At least one .noreorder directive appears in the source.
#define EF_MIPS_PIC 0x00000002 // File contains position independent code.
#define EF_MIPS_CPIC 0x00000004 // Code in file uses the standard calling sequence for calling osition independent code.
#define EF_MIPS_UGEN_ALLOC 0x00000008
#define EF_MIPS_UCODE 0x00000010 // Code in file uses UCODE (obsolete)
#define EF_MIPS_ABI2 0x00000020 // Code in file uses new ABI (-n32 on Irix 6).
#define EF_MIPS_DYNAMIC 0x00000040 // MIPS dynamic
#define EF_MIPS_OPTIONS_FIRST 0x00000080
#define EF_MIPS_32BITMODE 0x00000100 // Indicates code compiled for a 64-bit machine in 32-bit mode. (regs are 32-bits wide.)
#define EF_MIPS_FP64 0x00000200 // 32-bit machine but FP registers are 64-bit (gcc -mfp64)
#define EF_MIPS_NAN2008 0x00000400 // Uses IEE 754-2008 NaN encoding
#define EF_MIPS_ARCH 0xF0000000 // Four bit MIPS architecture field.
#define E_MIPS_ARCH_1 0x00000000 // -mips1 code.
#define E_MIPS_ARCH_2 0x10000000 // -mips2 code.
#define E_MIPS_ARCH_3 0x20000000 // -mips3 code.
#define E_MIPS_ARCH_4 0x30000000 // -mips4 code.
#define E_MIPS_ARCH_5 0x40000000 // -mips5 code.
#define E_MIPS_ARCH_32 0x50000000 // -mips32 code.
#define E_MIPS_ARCH_64 0x60000000 // -mips64 code.
#define E_MIPS_ARCH_32R2 0x70000000 // -mips32r2
#define E_MIPS_ARCH_64R2 0x80000000 // -mips64r2
#define E_MIPS_ARCH_32R6 0x90000000 // -mips32r6
#define E_MIPS_ARCH_64R6 0xA0000000 // -mips64r6
#define EF_MIPS_ABI 0x0000F000 // The ABI of the file. Also see EF_MIPS_ABI2 above.
#define E_MIPS_ABI_O32 0x00001000 // The original o32 abi.
#define E_MIPS_ABI_O64 0x00002000 // O32 extended to work on 64 bit architectures
#define E_MIPS_ABI_EABI32 0x00003000 // EABI in 32 bit mode
#define E_MIPS_ABI_EABI64 0x00004000 // EABI in 64 bit mode
#define EF_MIPS_ARCH_ASE 0x0F000000 // Architectural Extensions used by this file
#define EF_MIPS_ARCH_ASE_MDMX 0x08000000 // Use MDMX multimedia extensions
#define EF_MIPS_ARCH_ASE_M16 0x04000000 // Use MIPS-16 ISA extensions
#define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 // Use microMIPS ISA extensions
/* Machine variant if we know it. This field was invented at Cygnus,
but it is hoped that other vendors will adopt it. If some standard
is developed, this code should be changed to follow it. */
#define EF_MIPS_MACH 0x00FF0000
/* Cygnus is choosing values between 80 and 9F;
00 - 7F should be left for a future standard;
the rest are open. */
#define E_MIPS_MACH_3900 0x00810000 // R3900/Toshiba TX39
#define E_MIPS_MACH_4010 0x00820000 //
#define E_MIPS_MACH_4100 0x00830000
#define E_MIPS_MACH_4650 0x00850000
#define E_MIPS_MACH_4120 0x00870000
#define E_MIPS_MACH_4111 0x00880000
#define E_MIPS_MACH_MIPS32_4K 0x00890000
#define E_MIPS_MACH_SB1 0x008A0000 // SiByte SB-1
#define E_MIPS_MACH_OCTEON 0x008B0000 // Cavium Networks OCTEON
#define E_MIPS_MACH_XLR 0x008C0000 // RMI XLR
#define E_MIPS_MACH_OCTEON2 0x008D0000 // Cavium Networks OCTEON 2
#define E_MIPS_MACH_OCTEON3 0x008E0000 // Cavium Networks OCTEON 3
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5900 0x00920000 // r5900 (Sony Playstation 2 Emotion Engine)
#define E_MIPS_MACH_5500 0x00980000
#define E_MIPS_MACH_9000 0x00990000
#define E_MIPS_MACH_LS2E 0x00A00000 // Loongson/Godson 2E
#define E_MIPS_MACH_LS2F 0x00A10000 // Loongson/Godson 2F
#define E_MIPS_MACH_ALLEGREX 0x00A20000 // Allegrex (Sony PlayStation Portable)
#define E_MIPS_MACH_LS3A 0x00A20000 // Loongson/Godson 3A
//
// p_flags
//
#define PF_MIPS_LOCAL 0x10000000 // special p_flags
// relocation field - word32 with HIGH BYTE FIRST!!!
// A- from Elf32_Rela
// B- Loading address of shared object
// G- offset into global objet table
// GOT- adress of global object table
// L- linkage table entry
// P- plase of storage unit (computed using r_offset)
// S- value of symbol
enum elf_RTYPE_mips
{
R_MIPS_NONE = 0, // No reloc
R_MIPS_16 = 1,
R_MIPS_32 = 2, // S+A-P Direct32
R_MIPS_REL = 3, // S+A Relative32
R_MIPS_26 = 4, // S+A Relative26
R_MIPS_HI16 = 5,
R_MIPS_LO16 = 6,
R_MIPS_GPREL = 7, // S+A Relative16
R_MIPS_LITERAL = 8,
R_MIPS_GOT = 9,
R_MIPS_PC16 = 10,
R_MIPS_CALL = 11, // Call16
R_MIPS_GPREL32 = 12,
R_MIPS_SHIFT5 = 16,
R_MIPS_SHIFT6 = 17,
R_MIPS_64 = 18,
R_MIPS_GOT_DISP = 19,
R_MIPS_GOT_PAGE = 20,
R_MIPS_GOT_OFST = 21,
R_MIPS_GOT_HI16 = 22,
R_MIPS_GOT_LO16 = 23,
R_MIPS_SUB = 24,
R_MIPS_INSERT_A = 25,
R_MIPS_INSERT_B = 26,
R_MIPS_DELETE = 27,
R_MIPS_HIGHER = 28,
R_MIPS_HIGHEST = 29,
R_MIPS_CALL_HI16 = 30,
R_MIPS_CALL_LO16 = 31,
R_MIPS_SCN_DISP = 32,
R_MIPS_REL16 = 33,
R_MIPS_ADD_IMMEDIATE = 34,
R_MIPS_PJUMP = 35,
R_MIPS_RELGOT = 36,
R_MIPS_JALR = 37,
R_MIPS_TLS_DTPMOD32 = 38,
R_MIPS_TLS_DTPREL32 = 39,
R_MIPS_TLS_DTPMOD64 = 40,
R_MIPS_TLS_DTPREL64 = 41,
R_MIPS_TLS_GD = 42,
R_MIPS_TLS_LDM = 43,
R_MIPS_TLS_DTPREL_HI16 = 44,
R_MIPS_TLS_DTPREL_LO16 = 45,
R_MIPS_TLS_GOTTPREL = 46,
R_MIPS_TLS_TPREL32 = 47,
R_MIPS_TLS_TPREL64 = 48,
R_MIPS_TLS_TPREL_HI16 = 49,
R_MIPS_TLS_TPREL_LO16 = 50,
R_MIPS_GLOB_DAT = 51,
R_MIPS_PC21_S2 = 60,
R_MIPS_PC26_S2 = 61,
R_MIPS_PC18_S3 = 62,
R_MIPS_PC19_S2 = 63,
R_MIPS_PCHI16 = 64,
R_MIPS_PCLO16 = 65,
R_MIPS16_26 = 100,
R_MIPS16_GPREL = 101,
R_MIPS16_GOT16 = 102,
R_MIPS16_CALL16 = 103,
R_MIPS16_HI16 = 104,
R_MIPS16_LO16 = 105,
R_MIPS16_TLS_GD = 106,
R_MIPS16_TLS_LDM = 107,
R_MIPS16_TLS_DTPREL_HI16= 108,
R_MIPS16_TLS_DTPREL_LO16= 109,
R_MIPS16_TLS_GOTTPREL = 110,
R_MIPS16_TLS_TPREL_HI16 = 111,
R_MIPS16_TLS_TPREL_LO16 = 112,
R_MIPS16_PC16_S1 = 113,
// For these two:
// http://sourceware.org/ml/binutils/2008-07/txt00000.txt
R_MIPS_COPY = 126,
R_MIPS_JUMP_SLOT = 127,
// from binutils/include/elf/mips.h
R_MICROMIPS_26_S1 = 133,
R_MICROMIPS_HI16 = 134,
R_MICROMIPS_LO16 = 135,
R_MICROMIPS_GPREL16 = 136,
R_MICROMIPS_LITERAL = 137,
R_MICROMIPS_GOT16 = 138,
R_MICROMIPS_PC7_S1 = 139,
R_MICROMIPS_PC10_S1 = 140,
R_MICROMIPS_PC16_S1 = 141,
R_MICROMIPS_CALL16 = 142,
R_MICROMIPS_GOT_DISP = 145,
R_MICROMIPS_GOT_PAGE = 146,
R_MICROMIPS_GOT_OFST = 147,
R_MICROMIPS_GOT_HI16 = 148,
R_MICROMIPS_GOT_LO16 = 149,
R_MICROMIPS_SUB = 150,
R_MICROMIPS_HIGHER = 151,
R_MICROMIPS_HIGHEST = 152,
R_MICROMIPS_CALL_HI16 = 153,
R_MICROMIPS_CALL_LO16 = 154,
R_MICROMIPS_SCN_DISP = 155,
R_MICROMIPS_JALR = 156,
R_MICROMIPS_HI0_LO16 = 157,
/* TLS relocations. */
R_MICROMIPS_TLS_GD = 162,
R_MICROMIPS_TLS_LDM = 163,
R_MICROMIPS_TLS_DTPREL_HI16 = 164,
R_MICROMIPS_TLS_DTPREL_LO16 = 165,
R_MICROMIPS_TLS_GOTTPREL = 166,
R_MICROMIPS_TLS_TPREL_HI16 = 169,
R_MICROMIPS_TLS_TPREL_LO16 = 170,
/* microMIPS GP- and PC-relative relocations. */
R_MICROMIPS_GPREL7_S2 = 172,
R_MICROMIPS_PC23_S2 = 173,
R_MIPS_PC32 = 248,
R_MIPS_EH = 249,
R_MIPS_GNU_REL16_S2 = 250,
R_MIPS_GNU_VTINHERIT = 253,
R_MIPS_GNU_VTENTRY = 254,
// artificial types for the complex 32bit relocs
R_MIPS_GPDISP_LO16 = 200,
R_MIPS_GPDISP_HI16 = 201,
R_MICROMIPS_GPDISP_HI16 = 202,
R_MICROMIPS_GPDISP_LO16 = 203,
};
enum elf_ET_MIPS
{
ET_IRX = 0xFF80u, // IRX file for PS2's IOP
ET_PSPEXEC = 0xFFA0u // Sony PSP executable file
};
enum elf_PHT_MIPS
{
PT_MIPS_IOPMOD = 0x70000080, // Sony PS2 IOP module extension
PT_MIPS_EEMOD = 0x70000090, // Sony PS2 EE module extension
PT_MIPS_PSPREL = 0x700000A0, // Sony PRX relocations (ELF-style)
PT_MIPS_PSPREL2 = 0x700000A1, // Sony PRX relocations (packed)
// From binutils-2.27/elfcpp/elfcpp.h
PT_MIPS_REGINFO = 0x70000000, // Register usage information. Identifies one .reginfo section.
PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table.
PT_MIPS_OPTIONS = 0x70000002, // .MIPS.options section.
PT_MIPS_ABIFLAGS = 0x70000003, // .MIPS.abiflags section.
};
enum elf_DTAG_MIPS
{
DT_MIPS_RLD_VERSION = 0x70000001, /* 32 bit version number for runtime linker interface. */
DT_MIPS_TIME_STAMP = 0x70000002, /* Time stamp. */
DT_MIPS_ICHECKSUM = 0x70000003, /* Checksum of external strings and common sizes. */
DT_MIPS_IVERSION = 0x70000004, /* Index of version string in string table. */
DT_MIPS_FLAGS = 0x70000005, /* 32 bits of flags. */
DT_MIPS_BASE_ADDRESS = 0x70000006, /* Base address of the segment. */
DT_MIPS_MSYM = 0x70000007, /* adress of the msym table */
DT_MIPS_CONFLICT = 0x70000008, /* Address of .conflict section. */
DT_MIPS_LIBLIST = 0x70000009, /* Address of .liblist section. */
DT_MIPS_LOCAL_GOTNO = 0x7000000a, /* Number of local global offset table entries. */
DT_MIPS_CONFLICTNO = 0x7000000b, /* Number of entries in the .conflict section. */
DT_MIPS_LIBLISTNO = 0x70000010, /* Number of entries in the .liblist section. */
DT_MIPS_SYMTABNO = 0x70000011, /* Number of entries in the .dynsym section. */
DT_MIPS_UNREFEXTNO = 0x70000012, /* Index of first external dynamic symbol not referenced locally. */
DT_MIPS_GOTSYM = 0x70000013, /* Index of first dynamic symbol in global offset table. */
DT_MIPS_HIPAGENO = 0x70000014, /* Number of page table entries in global offset table. */
DT_MIPS_RLD_MAP = 0x70000016, /* Address of run time loader map, used for debugging. */
DT_MIPS_DELTA_CLASS = 0x70000017, /* Delta C++ class definition. */
DT_MIPS_DELTA_CLASS_NO = 0x70000018, /* Number of entries in DT_MIPS_DELTA_CLASS. */
DT_MIPS_DELTA_INSTANCE = 0x70000019, /* Delta C++ class instances. */
DT_MIPS_DELTA_INSTANCE_NO = 0x7000001a, /* Number of entries in DT_MIPS_DELTA_INSTANCE. */
DT_MIPS_DELTA_RELOC = 0x7000001b, /* Delta relocations. */
DT_MIPS_DELTA_RELOC_NO = 0x7000001c, /* Number of entries in DT_MIPS_DELTA_RELOC. */
DT_MIPS_DELTA_SYM = 0x7000001d, /* Delta symbols that Delta relocations refer to. */
DT_MIPS_DELTA_SYM_NO = 0x7000001e, /* Number of entries in DT_MIPS_DELTA_SYM. */
DT_MIPS_DELTA_CLASSSYM = 0x70000020, /* Delta symbols that hold class declarations. */
DT_MIPS_DELTA_CLASSSYM_NO = 0x70000021, /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
DT_MIPS_CXX_FLAGS = 0x70000022, /* Flags indicating information about C++ flavor. */
DT_MIPS_PIXIE_INIT = 0x70000023, /* Pixie information (???). */
DT_MIPS_SYMBOL_LIB = 0x70000024, /* Address of .MIPS.symlib */
DT_MIPS_LOCALPAGE_GOTIDX = 0x70000025, /* The GOT index of the first PTE for a segment */
DT_MIPS_LOCAL_GOTIDX = 0x70000026, /* The GOT index of the first PTE for a local symbol */
DT_MIPS_HIDDEN_GOTIDX = 0x70000027, /* The GOT index of the first PTE for a hidden symbol */
DT_MIPS_PROTECTED_GOTIDX = 0x70000028, /* The GOT index of the first PTE for a protected symbol */
DT_MIPS_OPTIONS = 0x70000029, /* Address of `.MIPS.options'. */
DT_MIPS_INTERFACE = 0x7000002a, /* Address of `.interface'. */
DT_MIPS_DYNSTR_ALIGN = 0x7000002b, /* ??? */
DT_MIPS_INTERFACE_SIZE = 0x7000002c, /* Size of the .interface section. */
DT_MIPS_RLD_TEXT_RESOLVE_ADDR= 0x7000002d, /* Size of rld_text_resolve function stored in the GOT. */
DT_MIPS_PERF_SUFFIX = 0x7000002e, /* Default suffix of DSO to be added by rld on dlopen() calls. */
DT_MIPS_COMPACT_SIZE = 0x7000002f, /* Size of compact relocation section (O32). */
DT_MIPS_GP_VALUE = 0x70000030, /* GP value for auxiliary GOTs. */
DT_MIPS_AUX_DYNAMIC = 0x70000031, /* Address of auxiliary .dynamic. */
DT_MIPS_PLTGOT = 0x70000032, /* Address of the base of the PLTGOT */
DT_MIPS_RWPLT = 0x70000034, /* Points to the base of a writable PLT. */
};
enum elf_SHN_MIPS
{
SHN_MIPS_ACOMMON = 0xff00, // Defined and allocated common symbol. Value is virtual address.
SHN_MIPS_TEXT = 0xff01, // Defined and allocated text symbol. Value is virtual address.
SHN_MIPS_DATA = 0xff02, // Defined and allocated data symbol. Value is virtual address.
SHN_MIPS_SCOMMON = 0xff03, // Small common symbol.
SHN_MIPS_SUNDEFINED = 0xff04 // Small undefined symbol.
};
enum elf_SHF_MIPS
{
SHF_MIPS_GPREL = 0x10000000, // Section must be part of global data area.
SHF_MIPS_MERGE = 0x20000000, // Section data should be merged to eliminate duplication
SHF_MIPS_ADDR = 0x40000000, // Section data is addresses by default. Address size to be inferred from section entry size.
SHF_MIPS_STRING = 0x80000000, // Section data is string data by default
SHF_MIPS_NOSTRIP = 0x08000000, // Section data may not be stripped
SHF_MIPS_LOCAL = 0x04000000, // Section data local to process
SHF_MIPS_NAMES = 0x02000000, // Linker must generate implicit hidden weak names
SHF_MIPS_NODUPE = 0x01000000, // Section contains text/data which may be replicated in other sections. Linker must retain only one copy.
};
enum elf_SHT_MIPS
{
SHT_MIPS_LIBLIST = 0x70000000, // contains the set of dynamic shared objects used when statically linking.
SHT_MIPS_MSYM = 0x70000001, // unknown Irix5 usage
SHT_MIPS_CONFLICT = 0x70000002, // list of confliction symbols
SHT_MIPS_GPTAB = 0x70000003, // Section contains the global pointer table.
SHT_MIPS_UCODE = 0x70000004, // microcode information
SHT_MIPS_DEBUG = 0x70000005, // start of debugging information
SHT_MIPS_REGINFO = 0x70000006, // Section contains register usage information.
SHT_MIPS_RELD = 0x70000009, // Dynamic relocation?
SHT_MIPS_IFACE = 0x7000000B, // Subprogram interface information
SHT_MIPS_CONTENT = 0x7000000C, // Section content classification
SHT_MIPS_OPTIONS = 0x7000000D, // General options
SHT_MIPS_DELTASYM = 0x7000001B, // Delta C++: symbol table
SHT_MIPS_DELTAINST = 0x7000001C, // Delta C++: instance table
SHT_MIPS_DELTACLASS = 0x7000001D, // Delta C++: class table
SHT_MIPS_DWARF = 0x7000001E, // DWARF debugging section.
SHT_MIPS_DELTADECL = 0x7000001F, // Delta C++: declarations
SHT_MIPS_SYMBOL_LIB = 0x70000020, // unknown Irix6 usage
SHT_MIPS_EVENTS = 0x70000021, // Events section.
SHT_MIPS_TRANSLATE = 0x70000022, // ???
SHT_MIPS_PIXIE = 0x70000023, // Special pixie sections
SHT_MIPS_XLATE = 0x70000024, // Address translation table
SHT_MIPS_XLATE_DEBUG = 0x70000025, // SGI internal address translation table
SHT_MIPS_WHIRL = 0x70000026, // Intermediate code
SHT_MIPS_EH_REGION = 0x70000027, // C++ exception handling region info
SHT_MIPS_XLATE_OLD = 0x70000028, // Obsolete
SHT_MIPS_PDR_EXCEPTION = 0x70000029, // Runtime procedure descriptor table exception information (ucode)
SHT_MIPS_IOPMOD = 0x70000080, // .ipmod section for PS2 IRXs
SHT_MIPS_PSPREL = 0x700000A0, // PSP executable relocation section
// VU overlay table (PS2?)
SHT_DVP_OVERLAY_TABLE = 0x7FFFF420,
SHT_DVP_OVERLAY = 0x7FFFF421,
};
// Special values for the st_other field in the symbol table.
enum elf_STO_MIPS
{
// Two topmost bits denote the MIPS ISA for .text symbols:
// + 00 -- standard MIPS code,
// + 10 -- microMIPS code,
// + 11 -- MIPS16 code; requires the following two bits to be set too.
// Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.
STO_MIPS_ISA = 0xc0,
// The MIPS psABI was updated in 2008 with support for PLTs and copy
// relocs. There are therefore two types of nonzero SHN_UNDEF functions:
// PLT entries and traditional MIPS lazy binding stubs. We mark the former
// with STO_MIPS_PLT to distinguish them from the latter.
STO_MIPS_PLT = 0x8,
// This value is used to mark PIC functions in an object that mixes
// PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
// although MIPS16 symbols are never considered to be MIPS_PIC.
STO_MIPS_PIC = 0x20,
// This value is used for a mips16 .text symbol.
STO_MIPS16 = 0xf0,
// This value is used for a microMIPS .text symbol. To distinguish from
// STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
// mask is STO_MIPS_ISA.
STO_MICROMIPS = 0x80
};
// .MIPS.options descriptor kinds
enum elf_ODK_MIPS
{
ODK_NULL = 0, // Undefined
ODK_REGINFO = 1, // Register usage information
ODK_EXCEPTIONS = 2, // Exception processing options
ODK_PAD = 3, // Section padding options
ODK_HWPATCH = 4, // Hardware patches applied
ODK_FILL = 5, // Linker fill value
ODK_TAGS = 6, // Space for tool identification
ODK_HWAND = 7, // Hardware AND patches applied
ODK_HWOR = 8, // Hardware OR patches applied
ODK_GP_GROUP = 9, // GP group to use for text/data sections
ODK_IDENT = 10, // ID information
ODK_PAGESIZE = 11, // Page size information
};
// PSP-specific encoding of r_info field
// segment in which the relocation resides
// i.e. relocation is at pht[ofs_base].p_vaddr + r_offset
#define ELF32_R_OFS_BASE(i) (((i)>>8) & 0xFF)
// segment number with the target
// i.e. the final address should be adjusted with pht[ofs_base].p_vaddr
#define ELF32_R_ADDR_BASE(i) (((i)>>16) & 0xFF)
// MIPS ELF 64 relocation info access macros.
// they assume BE byte order of the packed r_type field
#define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
#define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
#define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
#define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
// Values found in the r_ssym field of a relocation entry.
// No relocation.
#define RSS_UNDEF 0
// Value of GP.
#define RSS_GP 1
// Value of GP in object being relocated.
#define RSS_GP0 2
// Address of location being relocated.
#define RSS_LOC 3
// MIPS .msym table entry
struct Elf32_Msym
{
uint32 ms_hash_value; // Contains the hash value computed from the name of the corresponding dynamic symbol
uint32 ms_info; // Contains both the dynamic relocation index and the symbol flags field.
};
#define ELF32_MS_REL_INDEX(i) ((i) >> 8)
#define ELF32_MS_FLAGS(i) ((i) & 0xff)
#define ELF32_MS_INFO(r,f) (((r) << 8) + ((f) & 0xff))
// MIPS .liblist entry
typedef struct
{
uint32 l_name; // Records the name of a shared library dependency.
// The value is a string table index. This name can be a
// full pathname, relative pathname, or file name.
uint32 l_time_stamp;// Records the time stamp of a shared library dependency.
uint32 l_checksum; // Records the checksum of a shared library dependency.
uint32 l_version; // Records the interface version of a shared library dependency.
// The value is a string table index.
uint32 l_flags;
} Elf64_Lib;
// bits for l_flags:
#define LL_NONE 0
#define LL_EXACT_MATCH 0x1 // Requires that the run-time dynamic shared library file match
// exactly the shared library file used at static link time.
#define LL_IGNORE_INT_VER 0x2 // Ignores any version incompatibility between the dynamic
// shared library file and the shared library file used at link time.
#define LL_REQUIRE_MINOR 0x4 // Marks shared library dependencies that should be loaded with
// a suffix appended to the name. The DT_SO_SUFFIX entry in
// the .dynamic section records the name of this suffix. This is
// used by object instrumentation tools to distinguish
// instrumented shared libraries.
#define LL_EXPORTS 0x8 // Marks entries for shared libraries that are not loaded as direct
// dependencies of an object.
#define LL_DELAY_LOAD 0x10
#define LL_DELTA 0x20
//.reginfo section
struct Elf32_RegInfo
{
uint32 ri_gprmask;
uint32 ri_cprmask[4];
uint32 ri_gp_value;
};
void set_mips_compact_encoding(ea_t ea, bool enable);
void relocate_psp_section(Elf64_Shdr *rsh, linput_t *li);
inline bool is_psp_file(const reader_t &reader)
{
return reader.get_header().e_machine == EM_MIPS
&& reader.get_header().e_type == ET_PSPEXEC;
}
#endif

383
idasdk76/ldr/elf/elfr_ppc.h Normal file
View File

@@ -0,0 +1,383 @@
#ifndef __ELFR_PPC_H__
#define __ELFR_PPC_H__
#ifndef __ELFBASE_H__
#include "elfbase.h"
#endif
#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */
#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag */
#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib flag */
// PowerPC 64 ABI version
#define EF_PPC64_ABI_MASK 3 // original function descriptor using ABI
#define EF_PPC64_UNK_ABI 0 // unspecified or not using any features
// affected by the differences
#define EF_PPC64_AIX_ABI 1 // original function descriptor using ABI
#define EF_PPC64_V2_ABI 2 // revised ABI without function descriptors
enum elf_ET_PPC
{
ET_PS3PRX = 0xFFA4, // Sony PS3 PRX
};
enum elf_SHT_PPC
{
SHT_PS3PRX_RELA = 0x700000A4, // Sony PS3 PRX relocations
};
enum elf_PHT_PPC
{
PHT_PS3PRX_RELA = 0x700000A4, // Sony PS3 PRX relocations
};
enum elf_DT_PPC
{
DT_PPC_GOT = (DT_LOPROC + 0x0), // address of _GLOBAL_OFFSET_TABLE_
};
// relocation field - word32 with HIGH BYTE FIRST!!!
// A- from Elf32_Rela
// B- Loading address of shared object
// G- offset into global objet table
// GOT- adress of global object table
// L- linkage table entry
// P- plase of storage unit (computed using r_offset)
// S- value of symbol
enum elf_RTYPE_ppc
{
R_PPC_NONE = 0, // No reloc
R_PPC_ADDR32 = 1, // S+A-P Direct 32 bit
R_PPC_ADDR24 = 2,
R_PPC_ADDR16 = 3,
R_PPC_ADDR16_LO = 4,
R_PPC_ADDR16_HI = 5,
R_PPC_ADDR16_HA = 6,
R_PPC_ADDR14 = 7,
R_PPC_ADDR14_BRTAKEN = 8,
R_PPC_ADDR14_BRNTAKEN = 9,
R_PPC_REL24 = 10, // S+A relative 24 bit
R_PPC_REL14 = 11,
R_PPC_REL14_BRTAKEN = 12,
R_PPC_REL14_BRNTAKEN = 13,
R_PPC_GOT16 = 14,
R_PPC_GOT16_LO = 15,
R_PPC_GOT16_HI = 16,
R_PPC_GOT16_HA = 17,
R_PPC_PLTREL24 = 18,
R_PPC_COPY = 19,
R_PPC_GLOB_DAT = 20,
R_PPC_JMP_SLOT = 21,
R_PPC_RELATIVE = 22,
R_PPC_LOCAL24PC = 23,
R_PPC_UADDR32 = 24,
R_PPC_UADDR16 = 25,
R_PPC_REL32 = 26,
R_PPC_PLT32 = 27,
R_PPC_PLTREL32 = 28,
R_PPC_PLT16_LO = 29,
R_PPC_PLT16_HI = 30,
R_PPC_PLT16_HA = 31,
R_PPC_SDAREL16 = 32,
R_PPC_SECTOFF = 33,
R_PPC_SECTOFF_LO = 34,
R_PPC_SECTOFF_HI = 35,
R_PPC_SECTOFF_HA = 36,
R_PPC_ADDR30 = 37, // word30 (S + A - P) >> 2
// some undocumented relocs used by freescale
// some seem to be the same as official VLE relocs below
// NB! they conflict with some PPC64 relocations
R_PPC_FVLE_REL8 = 38, // same as R_PPC_VLE_REL8?
R_PPC_FVLE_REL15 = 39, // same as R_PPC_VLE_REL15?
R_PPC_FVLE_REL24 = 40, // same as R_PPC_VLE_REL24?
R_PPC_FVLE_ADDR8 = 44, // ??
R_PPC_FVLE_ADDR4 = 45, // ??
R_PPC_FVLE_SDA = 47, // same as R_PPC_VLE_SDA21?
R_PPC_FVLE_LO16A = 49, // same as R_PPC_VLE_LO16A?
R_PPC_FVLE_HI16A = 50, // same as R_PPC_VLE_HI16A?
R_PPC_FVLE_HA16A = 51, // same as R_PPC_VLE_HA16A?
R_PPC_FVLE_LO16D = 56, // same as R_PPC_VLE_LO16D?
R_PPC_FVLE_HI16D = 57, // same as R_PPC_VLE_HI16D?
R_PPC_FVLE_HA16D = 58, // same as R_PPC_VLE_HA16D?
/* Relocs added to support TLS. */
R_PPC_TLS = 67,
R_PPC_DTPMOD32 = 68,
R_PPC_TPREL16 = 69,
R_PPC_TPREL16_LO = 70,
R_PPC_TPREL16_HI = 71,
R_PPC_TPREL16_HA = 72,
R_PPC_TPREL32 = 73,
R_PPC_DTPREL16 = 74,
R_PPC_DTPREL16_LO = 75,
R_PPC_DTPREL16_HI = 76,
R_PPC_DTPREL16_HA = 77,
R_PPC_DTPREL32 = 78,
R_PPC_GOT_TLSGD16 = 79,
R_PPC_GOT_TLSGD16_LO = 80,
R_PPC_GOT_TLSGD16_HI = 81,
R_PPC_GOT_TLSGD16_HA = 82,
R_PPC_GOT_TLSLD16 = 83,
R_PPC_GOT_TLSLD16_LO = 84,
R_PPC_GOT_TLSLD16_HI = 85,
R_PPC_GOT_TLSLD16_HA = 86,
R_PPC_GOT_TPREL16 = 87,
R_PPC_GOT_TPREL16_LO = 88,
R_PPC_GOT_TPREL16_HI = 89,
R_PPC_GOT_TPREL16_HA = 90,
R_PPC_GOT_DTPREL16 = 91,
R_PPC_GOT_DTPREL16_LO = 92,
R_PPC_GOT_DTPREL16_HI = 93,
R_PPC_GOT_DTPREL16_HA = 94,
R_PPC_TLSGD = 95,
R_PPC_TLSLD = 96,
R_PPC_EMB_NADDR32 = 101, // word32 (A - S)
R_PPC_EMB_NADDR16 = 102, // half16* (A - S)
R_PPC_EMB_NADDR16_LO = 103, // half16 #lo(A - S)
R_PPC_EMB_NADDR16_HI = 104, // half16 #hi(A - S)
R_PPC_EMB_NADDR16_HA = 105, // half16 #ha(A - S)
R_PPC_EMB_SDA_I16 = 106, // half16* T
R_PPC_EMB_SDA2_I16 = 107, // half16* U
R_PPC_EMB_SDA2REL = 108, // half16* S + A - _SDA2_BASE_
R_PPC_EMB_SDA21 = 109, // low21 Y || (X + A)
R_PPC_EMB_MRKREF = 110, // none See below
R_PPC_EMB_RELSEC16 = 111, // half16* V + A
R_PPC_EMB_RELST_LO = 112, // half16 #lo(W + A)
R_PPC_EMB_RELST_HI = 113, // half16 #hi(W + A)
R_PPC_EMB_RELST_HA = 114, // half16 #ha(W + A)
R_PPC_EMB_BIT_FLD = 115, // word32* See below
R_PPC_EMB_RELSDA = 116, // half16* X + A. See below
R_PPC_EMB_RELOC_120 = 120, // half16* S + A
R_PPC_EMB_RELOC_121 = 121, // half16* Same calculation as U, except that the value 0 is used instead of _SDA2_BASE_.
/* The R_PPC_DIAB_SDA21_xx relocation modes work like the R_PPC_EMB_SDA21 mode
* and the R_PPC_DIAB_RELSDA_xx relocation modes work like the R_PPC_EMB_RELSDA mode
* with the following exceptions:
* If the symbol is in .data, .sdata, .bss, .sbss the symbol is DATA relative
(r13 base pointer/_SDA_BASE_ base address)
* If the symbol is in .text, .sdata2, .sbss2 the symbol is CODE relative
(r2 base pointer/_SDA_BASE2_ base address)
* Otherwise the symbol is absolute (r0 base pointer/0 base address)
*/
R_PPC_DIAB_SDA21_LO = 180, // half21 Y || #lo(X + A)
R_PPC_DIAB_SDA21_HI = 181, // half21 Y || #hi(X + A)
R_PPC_DIAB_SDA21_HA = 182, // half21 Y || #ha(X + A)
R_PPC_DIAB_RELSDA_LO = 183, // half16 #lo(X + A)
R_PPC_DIAB_RELSDA_HI = 184, // half16 #hi(X + A)
R_PPC_DIAB_RELSDA_HA = 185, // half16 #ha(X + A)
R_PPC_DIAB_IMTO = 186,
R_PPC_DIAB_IMT = 187,
R_PPC_DIAB_ADDR0 = 188,
R_PPC_DIAB_OVERRIDE0 = 189,
R_PPC_DIAB_VTBL32 = 190,
R_PPC_DIAB_LAST = 191,
R_PPC_EMB_SPE_DOUBLE = 201, // mid5* (#lo(S + A)) >> 3
R_PPC_EMB_SPE_WORD = 202, // mid5* (#lo(S + A)) >> 2
R_PPC_EMB_SPE_HALF = 203, // mid5* (#lo(S + A)) >> 1
R_PPC_EMB_SPE_DOUBLE_SDAREL = 204, // mid5* (#lo(S + A - _SDA_BASE_)) >> 3
R_PPC_EMB_SPE_WORD_SDAREL = 205, // mid5* (#lo(S + A - _SDA_BASE_)) >> 2
R_PPC_EMB_SPE_HALF_SDAREL = 206, // mid5* (#lo(S + A - _SDA_BASE_)) >> 1
R_PPC_EMB_SPE_DOUBLE_SDA2REL = 207, // mid5* (#lo(S + A - _SDA2_BASE_)) >> 3
R_PPC_EMB_SPE_WORD_SDA2REL = 208, // mid5* (#lo(S + A - _SDA2_BASE_)) >> 2
R_PPC_EMB_SPE_HALF_SDA2REL = 209, // mid5* (#lo(S + A - _SDA2_BASE_)) >> 1
R_PPC_EMB_SPE_DOUBLE_SDA0REL = 210, // mid5* (#lo(S + A)) >> 3
R_PPC_EMB_SPE_WORD_SDA0REL = 211, // mid5* (#lo(S + A)) >> 2
R_PPC_EMB_SPE_HALF_SDA0REL = 212, // mid5* (#lo(S + A)) >> 1
R_PPC_EMB_SPE_DOUBLE_SDA = 213, // mid10* Y || ((#lo(X + A)) >> 3)
R_PPC_EMB_SPE_WORD_SDA = 214, // mid10* Y || ((#lo(X + A)) >> 2)
R_PPC_EMB_SPE_HALF_SDA = 215, // mid10* Y || ((#lo(X + A)) >> 1)
R_PPC_VLE_REL8 = 216, // bdh8 (S + A - P) >> 1
R_PPC_VLE_REL15 = 217, // bdh15 (S + A - P) >> 1
R_PPC_VLE_REL24 = 218, // bdh24 (S + A - P) >> 1
R_PPC_VLE_LO16A = 219, // split16a #lo(S + A)
R_PPC_VLE_LO16D = 220, // split16d #lo(S + A)
R_PPC_VLE_HI16A = 221, // split16a #hi(S + A)
R_PPC_VLE_HI16D = 222, // split16d #hi(S + A)
R_PPC_VLE_HA16A = 223, // split16a #ha(S + A)
R_PPC_VLE_HA16D = 224, // split16d #ha(S + A)
R_PPC_VLE_SDA21 = 225, // low21, split20 Y || (X + A)
R_PPC_VLE_SDA21_LO = 226, // low21, split20 Y || #lo(X + A)
R_PPC_VLE_SDAREL_LO16A = 227, // split16a #lo(X + A)
R_PPC_VLE_SDAREL_LO16D = 228, // split16d #lo(X + A)
R_PPC_VLE_SDAREL_HI16A = 229, // split16a #hi(X + A)
R_PPC_VLE_SDAREL_HI16D = 230, // split16d #hi(X + A)
R_PPC_VLE_SDAREL_HA16A = 231, // split16a #ha(X + A)
R_PPC_VLE_SDAREL_HA16D = 232, // split16d #ha(X + A)
R_PPC_REL16DX_HA = 246,
R_PPC_IRELATIVE = 248, // GNU extension to support local ifunc.
/* GNU relocs used in PIC code sequences. */
R_PPC_REL16 = 249, // half16* S + A - P
R_PPC_REL16_LO = 250, // half16 #lo(S + A - P)
R_PPC_REL16_HI = 251, // half16 #hi(S + A - P)
R_PPC_REL16_HA = 252, // half16 #la(S + A - P)
R_PPC_GNU_VTINHERIT = 253,
R_PPC_GNU_VTENTRY = 254,
/* This is a phony reloc to handle any old fashioned TOC16 references
that may still be in object files. */
R_PPC_TOC16 = 255,
// PowerPC64 relocations. Many (but not all) of them are the same as for PPC32
R_PPC64_NONE = R_PPC_NONE,
R_PPC64_ADDR32 = R_PPC_ADDR32, /* 32bit absolute address. */
R_PPC64_ADDR24 = R_PPC_ADDR24, /* 26bit address, word aligned. */
R_PPC64_ADDR16 = R_PPC_ADDR16, /* 16bit absolute address. */
R_PPC64_ADDR16_LO = R_PPC_ADDR16_LO, /* lower 16bits of abs. address. */
R_PPC64_ADDR16_HI = R_PPC_ADDR16_HI, /* high 16bits of abs. address. */
R_PPC64_ADDR16_HA = R_PPC_ADDR16_HA, /* adjusted high 16bits. */
R_PPC64_ADDR14 = R_PPC_ADDR14, /* 16bit address, word aligned. */
R_PPC64_ADDR14_BRTAKEN = R_PPC_ADDR14_BRTAKEN,
R_PPC64_ADDR14_BRNTAKEN = R_PPC_ADDR14_BRNTAKEN,
R_PPC64_REL24 = R_PPC_REL24, /* PC relative 26 bit, word aligned. */
R_PPC64_REL14 = R_PPC_REL14, /* PC relative 16 bit. */
R_PPC64_REL14_BRTAKEN = R_PPC_REL14_BRTAKEN,
R_PPC64_REL14_BRNTAKEN = R_PPC_REL14_BRNTAKEN,
R_PPC64_GOT16 = R_PPC_GOT16,
R_PPC64_GOT16_LO = R_PPC_GOT16_LO,
R_PPC64_GOT16_HI = R_PPC_GOT16_HI,
R_PPC64_GOT16_HA = R_PPC_GOT16_HA,
R_PPC64_PLTREL24 = R_PPC_PLTREL24,
R_PPC64_COPY = R_PPC_COPY,
R_PPC64_GLOB_DAT = R_PPC_GLOB_DAT,
R_PPC64_JMP_SLOT = R_PPC_JMP_SLOT,
R_PPC64_RELATIVE = R_PPC_RELATIVE,
R_PPC64_LOCAL24PC = R_PPC_LOCAL24PC,
R_PPC64_UADDR32 = R_PPC_UADDR32,
R_PPC64_UADDR16 = R_PPC_UADDR16,
R_PPC64_REL32 = R_PPC_REL32,
R_PPC64_PLT32 = R_PPC_PLT32,
R_PPC64_PLTREL32 = R_PPC_PLTREL32,
R_PPC64_PLT16_LO = R_PPC_PLT16_LO,
R_PPC64_PLT16_HI = R_PPC_PLT16_HI,
R_PPC64_PLT16_HA = R_PPC_PLT16_HA,
R_PPC64_SDAREL16 = R_PPC_SDAREL16,
R_PPC64_SECTOFF = R_PPC_SECTOFF,
R_PPC64_SECTOFF_LO = R_PPC_SECTOFF_LO,
R_PPC64_SECTOFF_HI = R_PPC_SECTOFF_HI,
R_PPC64_SECTOFF_HA = R_PPC_SECTOFF_HA,
R_PPC64_ADDR30 = 37, /* word30 (S + A - P) >> 2. */
R_PPC64_ADDR64 = 38, /* doubleword64 S + A. */
R_PPC64_ADDR16_HIGHER = 39, /* half16 #higher(S + A). */
R_PPC64_ADDR16_HIGHERA = 40, /* half16 #highera(S + A). */
R_PPC64_ADDR16_HIGHEST = 41, /* half16 #highest(S + A). */
R_PPC64_ADDR16_HIGHESTA = 42, /* half16 #highesta(S + A). */
R_PPC64_UADDR64 = 43, /* doubleword64 S + A. */
R_PPC64_REL64 = 44, /* doubleword64 S + A - P. */
R_PPC64_PLT64 = 45, /* doubleword64 L + A. */
R_PPC64_PLTREL64 = 46, /* doubleword64 L + A - P. */
R_PPC64_TOC16 = 47, /* half16* S + A - .TOC. */
R_PPC64_TOC16_LO = 48, /* half16 #lo(S + A - .TOC.). */
R_PPC64_TOC16_HI = 49, /* half16 #hi(S + A - .TOC.). */
R_PPC64_TOC16_HA = 50, /* half16 #ha(S + A - .TOC.). */
R_PPC64_TOC = 51, /* doubleword64 .TOC. */
R_PPC64_PLTGOT16 = 52, /* half16* M + A. */
R_PPC64_PLTGOT16_LO = 53, /* half16 #lo(M + A). */
R_PPC64_PLTGOT16_HI = 54, /* half16 #hi(M + A). */
R_PPC64_PLTGOT16_HA = 55, /* half16 #ha(M + A). */
R_PPC64_ADDR16_DS = 56, /* half16ds* (S + A) >> 2. */
R_PPC64_ADDR16_LO_DS = 57, /* half16ds #lo(S + A) >> 2. */
R_PPC64_GOT16_DS = 58, /* half16ds* (G + A) >> 2. */
R_PPC64_GOT16_LO_DS = 59, /* half16ds #lo(G + A) >> 2. */
R_PPC64_PLT16_LO_DS = 60, /* half16ds #lo(L + A) >> 2. */
R_PPC64_SECTOFF_DS = 61, /* half16ds* (R + A) >> 2. */
R_PPC64_SECTOFF_LO_DS = 62, /* half16ds #lo(R + A) >> 2. */
R_PPC64_TOC16_DS = 63, /* half16ds* (S + A - .TOC.) >> 2. */
R_PPC64_TOC16_LO_DS = 64, /* half16ds #lo(S + A - .TOC.) >> 2. */
R_PPC64_PLTGOT16_DS = 65, /* half16ds* (M + A) >> 2. */
R_PPC64_PLTGOT16_LO_DS = 66, /* half16ds #lo(M + A) >> 2. */
/* PowerPC64 relocations defined for the TLS access ABI. */
R_PPC64_TLS = 67, /* none (sym+add)@tls */
R_PPC64_DTPMOD64 = 68, /* doubleword64 (sym+add)@dtpmod */
R_PPC64_TPREL16 = 69, /* half16* (sym+add)@tprel */
R_PPC64_TPREL16_LO = 70, /* half16 (sym+add)@tprel@l */
R_PPC64_TPREL16_HI = 71, /* half16 (sym+add)@tprel@h */
R_PPC64_TPREL16_HA = 72, /* half16 (sym+add)@tprel@ha */
R_PPC64_TPREL64 = 73, /* doubleword64 (sym+add)@tprel */
R_PPC64_DTPREL16 = 74, /* half16* (sym+add)@dtprel */
R_PPC64_DTPREL16_LO = 75, /* half16 (sym+add)@dtprel@l */
R_PPC64_DTPREL16_HI = 76, /* half16 (sym+add)@dtprel@h */
R_PPC64_DTPREL16_HA = 77, /* half16 (sym+add)@dtprel@ha */
R_PPC64_DTPREL64 = 78, /* doubleword64 (sym+add)@dtprel */
R_PPC64_GOT_TLSGD16 = 79, /* half16* (sym+add)@got@tlsgd */
R_PPC64_GOT_TLSGD16_LO = 80, /* half16 (sym+add)@got@tlsgd@l */
R_PPC64_GOT_TLSGD16_HI = 81, /* half16 (sym+add)@got@tlsgd@h */
R_PPC64_GOT_TLSGD16_HA = 82, /* half16 (sym+add)@got@tlsgd@ha */
R_PPC64_GOT_TLSLD16 = 83, /* half16* (sym+add)@got@tlsld */
R_PPC64_GOT_TLSLD16_LO = 84, /* half16 (sym+add)@got@tlsld@l */
R_PPC64_GOT_TLSLD16_HI = 85, /* half16 (sym+add)@got@tlsld@h */
R_PPC64_GOT_TLSLD16_HA = 86, /* half16 (sym+add)@got@tlsld@ha */
R_PPC64_GOT_TPREL16_DS = 87, /* half16ds* (sym+add)@got@tprel */
R_PPC64_GOT_TPREL16_LO_DS = 88, /* half16ds (sym+add)@got@tprel@l */
R_PPC64_GOT_TPREL16_HI = 89, /* half16 (sym+add)@got@tprel@h */
R_PPC64_GOT_TPREL16_HA = 90, /* half16 (sym+add)@got@tprel@ha */
R_PPC64_GOT_DTPREL16_DS = 91, /* half16ds* (sym+add)@got@dtprel */
R_PPC64_GOT_DTPREL16_LO_DS = 92, /* half16ds (sym+add)@got@dtprel@l */
R_PPC64_GOT_DTPREL16_HI = 93, /* half16 (sym+add)@got@dtprel@h */
R_PPC64_GOT_DTPREL16_HA = 94, /* half16 (sym+add)@got@dtprel@ha */
R_PPC64_TPREL16_DS = 95, /* half16ds* (sym+add)@tprel */
R_PPC64_TPREL16_LO_DS = 96, /* half16ds (sym+add)@tprel@l */
R_PPC64_TPREL16_HIGHER = 97, /* half16 (sym+add)@tprel@higher */
R_PPC64_TPREL16_HIGHERA = 98, /* half16 (sym+add)@tprel@highera */
R_PPC64_TPREL16_HIGHEST = 99, /* half16 (sym+add)@tprel@highest */
R_PPC64_TPREL16_HIGHESTA = 100, /* half16 (sym+add)@tprel@highesta */
R_PPC64_DTPREL16_DS = 101, /* half16ds* (sym+add)@dtprel */
R_PPC64_DTPREL16_LO_DS = 102, /* half16ds (sym+add)@dtprel@l */
R_PPC64_DTPREL16_HIGHER = 103, /* half16 (sym+add)@dtprel@higher */
R_PPC64_DTPREL16_HIGHERA = 104, /* half16 (sym+add)@dtprel@highera */
R_PPC64_DTPREL16_HIGHEST = 105, /* half16 (sym+add)@dtprel@highest */
R_PPC64_DTPREL16_HIGHESTA = 106, /* half16 (sym+add)@dtprel@highesta */
#if 0
// These relocation types appear in David Anderson's libdwarf and
// dwarfdump only. The PPC 64-Bit ELF V2 ABI uses these numbers for
// different types (see below).
R_PPC64_TOC32 = 107, /* word32 (.TOC. & 0xffff_ffff) */
R_PPC64_DTPMOD32 = 108, /* word32 (@dtpmod & 0xffff_ffff) */
R_PPC64_TPREL32 = 109, /* word32 (@tprel & 0xffff_ffff) */
R_PPC64_DTPREL32 = 110, /* word32 (@dtprel & 0xffff_ffff) */
#else
// The PPC 64-Bit ELF V2 ABI uses these numbers for different types
R_PPC64_TLSGD = 107, // used as markers on thread local
R_PPC64_TLSLD = 108, // storage (TLS) code sequences
R_PPC64_TOCSAVE = 109, // this relocation type indicates a
// position where a TOC save may be
// inserted in the function to avoid a
// TOC save as part of the PLT stub code
R_PPC64_ADDR16_HIGH = 110, // half16 #hi(S + A)
R_PPC64_ADDR16_HIGHA = 111, // half16 #ha(S + A)
R_PPC64_TPREL16_HIGH = 112, // half16 #hi(@tprel)
R_PPC64_TPREL16_HIGHA = 113, // half16 #ha(@tprel)
R_PPC64_DTPREL16_HIGH = 114, // half16 #hi(@dtprel)
R_PPC64_DTPREL16_HIGHA = 115, // half16 #ha(@dtprel)
R_PPC64_REL24_NOTOC = 116, // low24* (S + A - P) >> 2
R_PPC64_ADDR64_LOCAL = 117, // doubleword64 S + A (see 3.5.4)
#endif
R_PPC64_JMP_IREL = 247, // GNU extension to support local ifunc
// The PPC 64-Bit ELF V2 ABI
R_PPC64_IRELATIVE = 248, // It is used to implement the
// STT_GNU_IFUNC framework
R_PPC64_REL16 = R_PPC_REL16, // half16* S + A - P
R_PPC64_REL16_LO = R_PPC_REL16_LO, // half16 #lo(S + A - P)
R_PPC64_REL16_HI = R_PPC_REL16_HI, // half16* #hi(S + A - P)
R_PPC64_REL16_HA = R_PPC_REL16_HA, // half16* #la(S + A - P)
};
// flags for VLE code
#define SHF_PPC_VLE 0x10000000 /* section header flag */
#define PF_PPC_VLE 0x10000000 /* program header flag */
// patching GOT loading,
// discard auxiliary values in plt/got
// can present offset bypass segment
#define ELF_RPL_PPC_DEFAULT (ELF_RPL_GL | ELF_DIS_OFFW | ELF_DIS_GPLT)
#endif

3558
idasdk76/ldr/elf/reader.cpp Normal file
View File

File diff suppressed because it is too large Load Diff