Spellchecking converter README files.
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tmk
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@@ -16,7 +16,7 @@ Connector
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(receptacle)
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Wiring: You can change this with ediging config.h.
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Wiring: You can change this with editing config.h.
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Pin mini DIN MCU
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----------------------------------
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@@ -34,7 +34,7 @@ Wiring: You can change this with ediging config.h.
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Protocol
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--------
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Singnal: Asynchronous, Positive logic, 19200baud, Least bit first
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Signal: Asynchronous, Positive logic, 19200baud, Least bit first
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Frame format: 1-Start bit(Lo), 8-Data bits, Odd-Parity, 1-Stop bit
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This converter uses software method for testing purpose. AVR UART engine will work better.
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